Patents by Inventor Yusuke Nonaka

Yusuke Nonaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9548468
    Abstract: Emission efficiency of a light-emitting element is improved. The light-emitting element has a pair of electrodes and an EL layer between the pair of electrodes. The EL layer includes a first light-emitting layer and a second light-emitting layer. The first light-emitting layer includes a fluorescent material and a host material. The second light-emitting layer includes a phosphorescent material, a first organic compound, and a second organic compound. An emission spectrum of the second light-emitting layer has a peak in a yellow wavelength region. The first organic compound and the second organic compound form an exciplex.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: January 17, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Takahiro Ishisone, Nobuharu Ohsawa, Yusuke Nonaka, Toshiki Sasaki
  • Publication number: 20170012232
    Abstract: A tandem light-emitting element employing an inverted-structure is provided. The light-emitting element includes a cathode, a first EL layer over the cathode, a second EL layer over the first EL layer, an anode over the second EL layer, and an intermediate layer. The intermediate layer is between the first EL layer and the second EL layer. The intermediate layer includes a first layer, a second layer over the first layer, and a third layer over the second layer. The first layer includes a hole-transport material and an electron acceptor. The third layer includes an alkali metal or an alkaline earth metal. The second layer includes an electron-transport material.
    Type: Application
    Filed: January 28, 2015
    Publication date: January 12, 2017
    Inventors: Riho KATAISHI, Toshiki SASAKI, Yusuke NONAKA, Hiromi SEO
  • Publication number: 20170005126
    Abstract: An imaging device with excellent imaging performance is provided. An imaging device that easily performs imaging under a low illuminance condition is provided. A low power consumption imaging device is provided. An imaging device with small variations in characteristics between its pixels is provided. A highly integrated imaging device is provided. A photoelectric conversion element includes a first electrode, and a first layer, a second layer, and a third layer. The first layer is provided between the first electrode and the third layer. The second layer is provided between the first layer and the third layer. The first layer contains selenium. The second layer contains a metal oxide. The third layer contains a metal oxide and also contains at least one of a rare gas atom, phosphorus, and boron. The selenium may be crystalline selenium. The second layer may be a layer of an In—Ga—Zn oxide including c-axis-aligned crystals.
    Type: Application
    Filed: June 27, 2016
    Publication date: January 5, 2017
    Inventors: Shunpei YAMAZAKI, Yusuke NONAKA, Riho KATAISHI, Hiroshi OHKI, Yuichi SATO, Daisuke MATSUBAYASHI
  • Patent number: 9535864
    Abstract: The present invention is a clustered storage system with which, even when access to the processor of another controller is sent from the processor of one controller, the processor of the second controller is able to prioritize processing of this access so that I/O processing is also prevented from being delayed. With the storage system of the present invention, the first processor of the first controller transmits request information which is to be processed by the second processor of the second controller to the second processor by differentiating between request information for which processing is to be prioritized by the second processor and request information for which processing is not to be prioritized, and the second processor acquires the request information by differentiating between request information for which processing is to be prioritized and request information for which processing is not to be prioritized.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: January 3, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Shintaro Kudo, Yusuke Nonaka
  • Publication number: 20160380223
    Abstract: To increase emission efficiency of a fluorescent light-emitting element by efficiently utilizing a triplet exciton generated in a light-emitting layer. The light-emitting layer of the light-emitting element includes at least a host material and a guest material. The triplet exciton generated from the host material in the light-emitting layer is changed to a singlet exciton by triplet-triplet annihilation (TTA). The guest material (fluorescent dopant) is made to emit light by energy transfer from the singlet exciton. Thus, the emission efficiency of the light-emitting element is improved.
    Type: Application
    Filed: September 7, 2016
    Publication date: December 29, 2016
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yusuke Nonaka, Satoshi SEO, Harue OSAKA, Tsunenori SUZUKI, Takeyoshi WATABE
  • Patent number: 9530895
    Abstract: To suppress a decrease in on-state current in a semiconductor device including an oxide semiconductor. A semiconductor device includes an insulating film containing silicon, an oxide semiconductor film over the insulating film, a gate insulating film containing silicon over the oxide semiconductor film, a gate electrode which is over the gate insulating film and overlaps with at least the oxide semiconductor film, and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In the semiconductor device, the oxide semiconductor film which overlaps with at least the gate electrode includes a region in which a concentration of silicon distributed from an interface with the insulating film is lower than or equal to 1.1 at. %. In addition, a concentration of silicon contained in a remaining portion of the oxide semiconductor film except the region is lower than the concentration of silicon contained in the region.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: December 27, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Honda, Masashi Tsubuku, Yusuke Nonaka, Takashi Shimazu
  • Patent number: 9515279
    Abstract: A multicolor light-emitting element that utilizes fluorescence and phosphorescence and is advantageous for practical application is provided. The light-emitting element has a stacked-layer structure of a first light-emitting layer containing a host material and a fluorescent substance and a second light-emitting layer containing two kinds of organic compounds and a substance that can convert triplet excitation energy into luminescence. Note that light emitted from the first light-emitting layer has an emission peak on the shorter wavelength side than light emitted from the second light-emitting layer.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: December 6, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro Ishisone, Satoshi Seo, Yusuke Nonaka, Nobuharu Ohsawa
  • Publication number: 20160351713
    Abstract: A semiconductor device includes an n channel conductivity type FET having a channel formation region formed in a first region on a main surface of a semiconductor substrate and a p channel conductivity type FET having a channel formation region formed in a second region of the main surface, which second region is different from the first region. An impurity concentration of a gate electrode of the n channel FET has an impurity concentration greater than an impurity concentration of the gate electrode of the p channel FET to thereby create a tensile stress in the direction of flow of a drain current in the channel forming region of the n channel FET. The tensile stress in the flow direction of the drain current in the channel forming region of the n channel FET is greater than a tensile stress in the direction of flow of a drain current in the channel forming region of the p channel FET.
    Type: Application
    Filed: August 9, 2016
    Publication date: December 1, 2016
    Inventors: Akihiro SHIMIZU, Nagatoshi OOKI, Yusuke NONAKA, Katsuhiko ICHINOSE
  • Publication number: 20160342512
    Abstract: The invention provides a technique for improving processing performance of I/O commands in a storage system in which ownership of each LU is introduced. The storage system includes: a disk device having storage regions that are managed as a plurality of logical units; a plurality of processors that process read commands to the disk device; and a cache that the processors can use to process the read commands. An owner processor that is in charge of processing to each logical unit is allocated to each logical unit. When decision is made that dirty data is not present in the cache in a target region of the read command, there are a case where the owner processor of a logical unit that includes the target region processes the read command, and a case where a non-owner processor, as the processor other than the owner processor, processes the read command.
    Type: Application
    Filed: January 21, 2014
    Publication date: November 24, 2016
    Inventors: Yuki SAKASHITA, Shintaro KUDO, Yoshihiro YOSHII, Yusuke NONAKA
  • Patent number: 9496413
    Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: November 15, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Yusuke Nonaka, Noritaka Ishihara, Masashi Oota, Hideyuki Kishida
  • Patent number: 9490351
    Abstract: An object is to provide a highly reliable semiconductor device having stable electric characteristics by using an oxide semiconductor film having stable electric characteristics. Another object is to provide a semiconductor device having higher mobility by using an oxide semiconductor film having high crystallinity. A crystalline oxide semiconductor film is formed over and in contact with an insulating film whose surface roughness is reduced, whereby the oxide semiconductor film can have stable electric characteristics. Accordingly, the highly reliable semiconductor device having stable electric characteristics can be provided. Further, the semiconductor device having higher mobility can be provided.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: November 8, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Honda, Takatsugu Omata, Yusuke Nonaka
  • Publication number: 20160308156
    Abstract: A light-emitting element includes a stack of a first light-emitting layer emitting fluorescent light and a second light-emitting layer emitting phosphorescent light between a pair of electrodes. The second light-emitting layer includes a first layer in which an exciplex is formed, a second layer in which an exciplex is formed, and a third layer in which an exciplex is formed. The second layer is located over the first layer, and the third layer is located over the second layer. An emission peak wavelength of the second layer is longer than an emission peak wavelength of the first layer and an emission peak wavelength of the third layer.
    Type: Application
    Filed: June 10, 2016
    Publication date: October 20, 2016
    Inventors: Takuya KAWATA, Nobuharu OHSAWA, Yusuke NONAKA, Takahiro ISHISONE, Satoshi SEO
  • Patent number: 9471434
    Abstract: When a failure occurs in a storage system controller, the controller reboots after completing prescribed failure processing for respective control parts. Upon detecting a failure, first, second, and third control parts of the controller perform respective failure processing. The first control part controls block access requests, the second control part controls file system access, and the third control part manages the second control part. The first control part and third control part write prescribed information to a storage area and reboot at least a portion of the controller upon detecting the failure.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: October 18, 2016
    Assignee: HITACHI, LTD.
    Inventors: Akihiko Araki, Yusuke Nonaka, Masanori Takada
  • Patent number: 9461180
    Abstract: The concentration of impurity elements included in an oxide semiconductor film in the vicinity of a gate insulating film is reduced. Further, crystallinity of the oxide semiconductor film in the vicinity of the gate insulating film is improved. A semiconductor device includes an oxide semiconductor film over a substrate, a source electrode and a drain electrode over the oxide semiconductor film, a gate insulating film which includes an oxide containing silicon and is formed over the oxide semiconductor film, and a gate electrode over the gate insulating film. The oxide semiconductor film includes a region in which the concentration of silicon is lower than or equal to 1.0 at. %, and at least the region includes a crystal portion.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: October 4, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Honda, Masashi Tsubuku, Yusuke Nonaka, Takashi Shimazu, Shunpei Yamazaki
  • Publication number: 20160268536
    Abstract: An object of one embodiment of the present invention is to provide a multicolor light-emitting element that utilizes fluorescence and phosphorescence and is advantageous for practical application. The light-emitting element has a stacked-layer structure of a first light-emitting layer containing a host material and a fluorescent substance, a separation layer containing a substance having a hole-transport property and a substance having an electron-transport property, and a second light-emitting layer containing two kinds of organic compounds that form an exciplex and a substance that can convert triplet excitation energy into luminescence. Note that a light-emitting element in which light emitted from the first light-emitting layer has an emission spectrum peak on the shorter wavelength side than an emission spectrum peak of the second light-emitting layer is more effective.
    Type: Application
    Filed: May 24, 2016
    Publication date: September 15, 2016
    Inventors: Nobuharu OHSAWA, Yusuke NONAKA, Takahiro ISHISONE, Satoshi SEO, Takuya KAWATA
  • Patent number: 9444063
    Abstract: To increase emission efficiency of a fluorescent light-emitting element by efficiently utilizing a triplet exciton generated in a light-emitting layer. The light-emitting layer of the light-emitting element includes at least a host material and a guest material. The triplet exciton generated from the host material in the light-emitting layer is changed to a singlet exciton by triplet-triplet annihilation (TTA). The guest material (fluorescent dopant) is made to emit light by energy transfer from the singlet exciton. Thus, the emission efficiency of the light-emitting element is improved.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: September 13, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yusuke Nonaka, Satoshi Seo, Harue Osaka, Tsunenori Suzuki, Takeyoshi Watabe
  • Publication number: 20160240694
    Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm?1 and less than or equal to 0.7 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm?1 and less than or equal to 4.1 nm?1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm?1 and less than or equal to 1.4 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm?1 and less than or equal to 7.1 nm?1.
    Type: Application
    Filed: April 25, 2016
    Publication date: August 18, 2016
    Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Kengo AKIMOTO, Hiroki OHARA, Tatsuya HONDA, Takatsugu OMATA, Yusuke NONAKA, Masahiro TAKAHASHI, Akiharu MIYANAGA
  • Patent number: 9412669
    Abstract: A semiconductor device includes an n channel conductivity type FET having a channel formation region formed in a first region on a main surface of a semiconductor substrate and a p channel conductivity type FET having a channel formation region formed in a second region of the main surface, which second region is different from the first region. An impurity concentration of a gate electrode of the n channel FET has an impurity concentration greater than an impurity concentration of the gate electrode of the p channel FET to thereby create a tensile stress in the direction of flow of a drain current in the channel forming region of the n channel FET. The tensile stress in the flow direction of the drain current in the channel forming region of the n channel FET is greater than a tensile stress in the direction of flow of a drain current in the channel forming region of the p channel FET.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: August 9, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Akihiro Shimizu, Nagatoshi Ooki, Yusuke Nonaka, Katsuhiko Ichinose
  • Publication number: 20160204271
    Abstract: To manufacture a highly reliable semiconductor device by giving stable electric characteristics to a transistor. An oxide semiconductor film is deposited by a sputtering method with the use of a polycrystalline sputtering target. In that case, partial pressure of water in a deposition chamber before or in the deposition is set to be lower than or equal to 10?3 Pa, preferably lower than or equal to 10?4 Pa, more preferably lower than or equal to 10?5 Pa. Thus, a dense oxide semiconductor film is obtained. The density of the oxide semiconductor film is higher than 6.0 g/cm3 and lower than 6.375 g/cm3.
    Type: Application
    Filed: March 24, 2016
    Publication date: July 14, 2016
    Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Yusuke NONAKA, Hiroshi KANEMURA
  • Publication number: 20160196184
    Abstract: When a failure occurs, the present invention makes it possible to reboot after completing prescribed failure processing for respective control parts. A storage system 10 comprises a controller 100 and a logical volume 23. The controller 100 comprises a processor 140 and a memory 150 that is used by the processor, and uses the processor to realize a plurality of control parts 101, 102, and 103. A block OS 101, which is an example of a first control part, controls a block access request to a disk device 21 (logical volume 23). A file OS 103, which is an example of a second control part, is managed by a hypervisor 102. When a failure has occurred inside the controller, the controller reboots after confirming that prescribed failure processing has been completed for each OS 101, 102, and 103.
    Type: Application
    Filed: July 22, 2013
    Publication date: July 7, 2016
    Applicant: HITACHI, LTD.
    Inventors: Akihiko ARAKI, Yusuke NONAKA, Masanori TAKADA