Abstract: In a method for manufacturing a semiconductor device by using a gate replacement technology, a gate space constituted by dielectric material portions, in which a semiconductor fin channel layer is exposed, is formed. The surfaces of the dielectric material portions are made hydrophobic. A first dielectric layer is formed on the semiconductor fin channel layer, while maintaining the surfaces of the dielectric material portions hydrophobic. A surface of the formed first dielectric layer is hydrophilic. A first conductive layer is formed over the first dielectric layer, while maintaining the surfaces of the dielectric material portions hydrophobic. A second conductive layer is formed over the first conductive layer and on the hydrophobic surfaces of the dielectric material portions, thereby filling the gate space.

Abstract: A method of fabricating a semiconductor device includes forming a semiconductor fin comprising a channel region for a fin field effect transistor (finFET). A gate oxide layer is then formed on the channel. The gate oxide layer is treated with a nitrogen containing agent so as to form a nitrogenous layer and an interfacial layer. The nitrogenous layer is then removed. A high-k dielectric layer is formed on the interfacial layer. A metal gate is formed on the high-k dielectric layer. The nitrogenous layer is removed by rinsing the semiconductor fin with deionized water. The gate oxide and interfacial layer contains the same material.

Abstract: A method includes forming a semiconductor fin on a semiconductor substrate, the semiconductor fin comprising germanium, silicon, silicon germanium or any of III-V elements; forming a mask layer on a top portion of the semiconductor fin; and trimming the semiconductor fin, wherein trimming the semiconductor fin comprises: immersing the semiconductor substrate in a first electrolyte bath; and laterally removing a first portion of the semiconductor fin by supplying a first voltage to a counter electrode in the electrolyte bath and a second voltage to the semiconductor substrate, wherein the second voltage is negative.

Abstract: In a method for manufacturing a semiconductor device by using a gate replacement technology, a gate space constituted by dielectric material portions, in which a semiconductor fin channel layer is exposed, is formed. The surfaces of the dielectric material portions are made hydrophobic. A first dielectric layer is formed on the semiconductor fin channel layer, while maintaining the surfaces of the dielectric material portions hydrophobic. A surface of the formed first dielectric layer is hydrophilic. A first conductive layer is formed over the first dielectric layer, while maintaining the surfaces of the dielectric material portions hydrophobic. A second conductive layer is formed over the first conductive layer and on the hydrophobic surfaces of the dielectric material portions, thereby filling the gate space.

Abstract: A method includes forming a semiconductor fin on a semiconductor substrate, the semiconductor fin comprising germanium, silicon, silicon germanium or any of III-V elements; forming a mask layer on a top portion of the semiconductor fin; and trimming the semiconductor fin, wherein trimming the semiconductor fin comprises: immersing the semiconductor substrate in a first electrolyte bath; and laterally removing a first portion of the semiconductor fin by supplying a first voltage to a counter electrode in the electrolyte bath and a second voltage to the semiconductor substrate, wherein the second voltage is negative.

Abstract: A method including forming a first insulating film over a first fin structure. The method further includes removing the first insulating film to expose a portion of the first fin structure. The method further includes forming a first oxide film over the exposed portion of the first fin structure using a non-aqueous solvent-based chemical.

Abstract: A method includes etching a semiconductor substrate to form a fin. An isolation structure is formed over the semiconductor substrate and around the fin. The isolation structure and the semiconductor substrate are etched to form a recess. A barrier layer is deposited over a bottom surface and a sidewall of the recess. A conductive layer is deposited over the barrier layer. The conductive layer is recessed to form a conductive line, in which a top surface of the conductive line is lower than a top surface of the isolation structure. A dielectric cap layer is formed over the conductive line. The isolation structure and the dielectric cap layer are recessed, such that the fin protrudes from the recessed isolation structure.

Abstract: In a method for manufacturing a semiconductor device by using a gate replacement technology, a gate space constituted by dielectric material portions, in which a semiconductor fin channel layer is exposed, is formed. The surfaces of the dielectric material portions are made hydrophobic. A first dielectric layer is formed on the semiconductor fin channel layer, while maintaining the surfaces of the dielectric material portions hydrophobic. A surface of the formed first dielectric layer is hydrophilic. A first conductive layer is formed over the first dielectric layer, while maintaining the surfaces of the dielectric material portions hydrophobic. A second conductive layer is formed over the first conductive layer and on the hydrophobic surfaces of the dielectric material portions, thereby filling the gate space.

Abstract: A method includes holding a semiconductor substrate by a substrate holder of an electrochemical apparatus. The electrochemical apparatus includes a reaction cell and a counter electrode, and the semiconductor substrate has an exposed surface containing germanium, silicon, silicon germanium or any of III-V elements. The exposed surface of the semiconductor substrate is immersed in an electrolyte bath in the reaction cell. A portion of the semiconductor substrate is removed by supplying a first current to the counter electrode and a second current to the semiconductor substrate. The second current has a negative bias. The negative bias is smaller than 0V and equal to or larger than minus 5V.

Abstract: A method of manufacturing a semiconductor device includes forming a first insulating film over a first fin structure and a second insulating film over a second fin structure, coating a protective layer over the second insulating film, removing the first insulating film to expose a portion of the first fin structure, and forming a first oxide film over the exposed portion of the first fin structure using a non-aqueous solvent-based chemical.

Abstract: A method includes etching a semiconductor substrate to form a fin. An isolation structure is formed over the semiconductor substrate and around the fin. The isolation structure and the semiconductor substrate are etched to form a recess. A barrier layer is deposited over a bottom surface and a sidewall of the recess. A conductive layer is deposited over the barrier layer. The conductive layer is recessed to form a conductive line, in which a top surface of the conductive line is lower than a top surface of the isolation structure. A dielectric cap layer is formed over the conductive line. The isolation structure and the dielectric cap layer are recessed, such that the fin protrudes from the recessed isolation structure.

Abstract: A method includes holding a semiconductor substrate by a substrate holder of an electrochemical apparatus. The electrochemical apparatus includes a reaction cell and a counter electrode, and the semiconductor substrate has an exposed surface containing germanium, silicon, silicon germanium or any of III-V elements. The exposed surface of the semiconductor substrate is immersed in an electrolyte bath in the reaction cell. A portion of the semiconductor substrate is removed by supplying a first current to the counter electrode and a second current to the semiconductor substrate. The second current has a negative bias. The negative bias is smaller than 0V and equal to or larger than minus 5V.

Abstract: A method of fabricating a semiconductor device includes forming a semiconductor fin comprising a channel region for a fin field effect transistor (finFET). A gate oxide layer is then formed on the channel. The gate oxide layer is treated with a nitrogen containing agent so as to form a nitrogenous layer and an interfacial layer. The nitrogenous layer is then removed. A high-k dielectric layer is formed on the interfacial layer. A metal gate is formed on the high-k dielectric layer. The nitrogenous layer is removed by rinsing the semiconductor fin with deionized water. The gate oxide and interfacial layer contains the same material.

Abstract: A device is disclosed that includes a memory bit cell, a first word line, a pair of metal islands and a pair of connection metal lines. The first word line is disposed in a first metal layer and is electrically coupled to the memory bit cell. The pair of metal islands are disposed in the first metal layer at opposite sides of the word line and are electrically coupled to a power supply. The pair of connection metal lines are disposed in a second metal layer and are configured to electrically couple the metal islands to the memory bit cell respectively.

Abstract: Methods for manufacturing semiconductor structures are provided. The method for manufacturing a semiconductor structure includes forming a source/drain structure over a substrate and forming a metal layer over the source/drain structure. The method for manufacturing a semiconductor structure further includes reacting a portion of the metal layer with the source/drain structure to form a metallic layer by using an etching solvent. In addition, the etching solvent includes (a) a first component and (b) a second component. The first component includes an acid, and the second component includes propylene carbonate (PC), ethylene carbonate (EC), diethyl carbonate (DEC), or a combination thereof.

Abstract: In a method for manufacturing a semiconductor device by using a gate replacement technology, a gate space constituted by dielectric material portions, in which a semiconductor fin channel layer is exposed, is formed. The surfaces of the dielectric material portions are made hydrophobic. A first dielectric layer is formed on the semiconductor fin channel layer, while maintaining the surfaces of the dielectric material portions hydrophobic. A surface of the formed first dielectric layer is hydrophilic. A first conductive layer is formed over the first dielectric layer, while maintaining the surfaces of the dielectric material portions hydrophobic. A second conductive layer is formed over the first conductive layer and on the hydrophobic surfaces of the dielectric material portions, thereby filling the gate space.

Abstract: A method for fabricating a semiconductor device includes forming a first high-k (HK) dielectric layer over a substrate, performing a wet treatment process to the first HK dielectric layer. The wet treatment includes a dopant. The method also includes performing an annealing process to the first HK dielectric layer such that the dopant diffuses into the first HK dielectric layer to form a modified HK dielectric layer. Therefore the modified HK dielectric layer has a second dielectric constant which is different than the first dielectric constant.

Abstract: A method of manufacturing a semiconductor device includes forming a first insulating film over a first fin structure and a second insulating film over a second fin structure, coating a protective layer over the second insulating film, removing the first insulating film to expose a portion of the first fin structure, and forming a first oxide film over the exposed portion of the first fin structure using a non-aqueous solvent-based chemical.

Abstract: A semiconductor structure and a method for forming the same are provided. The method includes forming a source/drain structure in a substrate and forming a metal layer over the source/drain structure. The method for manufacturing a semiconductor structure further includes performing an annealing process such that a portion of the metal layer reacts with the source/drain structure to form a metallic layer on the source/drain structure. The method for manufacturing a semiconductor structure further includes performing an etching process to remove an unreacted portion of the metal layer on the metallic layer and forming a contact over the metallic layer. In addition, the etching process includes using an etching solvent, and the etching solvent includes (a) a first component, including H2SO4, HCl, HF, H3PO4, or NH4OH and (b) a second component, including propylene carbonate, ethylene carbonate, diethyl carbonate, acetonitrile, or a combination thereof.

Abstract: In a method for manufacturing a semiconductor device by using a gate replacement technology, a gate space constituted by dielectric material portions, in which a semiconductor fin channel layer is exposed, is formed. The surfaces of the dielectric material portions are made hydrophobic. A first dielectric layer is formed on the semiconductor fin channel layer, while maintaining the surfaces of the dielectric material portions hydrophobic. A surface of the formed first dielectric layer is hydrophilic. A first conductive layer is formed over the first dielectric layer, while maintaining the surfaces of the dielectric material portions hydrophobic. A second conductive layer is formed over the first conductive layer and on the hydrophobic surfaces of the dielectric material portions, thereby filling the gate space.