Abstract: The present disclosure provides a semiconductor structure in accordance with some embodiments. The semiconductor structure includes a semiconductor feature, a passivation layer that includes indium sulfide formed over a surface of the semiconductor feature. More particularly, the surface of the semiconductor feature comprises indium-based III-V compound semiconductor material.

Abstract: A method of forming a semiconductor structure includes the following operations: (i) forming a fin structure on a substrate; (ii) epitaxially growing an epitaxy structure from the fin structure; (iii) forming a sacrificial structure surrounding the epitaxy structure; (iv) forming a dielectric layer covering the sacrificial structure; (v) forming an opening passing through the dielectric layer to partially expose the sacrificial structure; (vi) removing a portion of the sacrificial structure to expose a portion of the epitaxy structure; and (vii) forming a contact structure in contact with the exposed portion of the epitaxy structure. A semiconductor structure is disclosed herein as well.

Abstract: A method of forming a semiconductor structure includes the following operations: (i) forming a fin structure on a substrate; (ii) epitaxially growing an epitaxy structure from the fin structure; (iii) forming a sacrificial structure surrounding the epitaxy structure; (iv) forming a dielectric layer covering the sacrificial structure; (v) forming an opening passing through the dielectric layer to partially expose the sacrificial structure; (vi) removing a portion of the sacrificial structure to expose a portion of the epitaxy structure; and (vii) forming a contact structure in contact with the exposed portion of the epitaxy structure. A semiconductor structure is disclosed herein as well.

Abstract: A method to provide an isolation feature over a semiconductor structure is disclosed. The method includes forming a fin structure over a semiconductor substrate, forming an oxide layer over the fin structure, wherein forming the oxide layer includes performing a wet chemical oxidation process on the fin structure with a solvent mixture, forming a dielectric layer over the oxide layer, and forming at least one isolation feature over the semiconductor structure.

Abstract: The present disclosure provides a semiconductor structure in accordance with some embodiments. The semiconductor structure includes a semiconductor feature, a passivation layer that includes indium sulfide formed over a surface of the semiconductor feature. More particularly, the surface of the semiconductor feature comprises indium-based III-V compound semiconductor material.

Abstract: A semiconductor structure and a method for forming the same are provided. The method includes forming a source/drain structure in a substrate and forming a metal layer over the source/drain structure. The method for manufacturing a semiconductor structure further includes performing an annealing process such that a portion of the metal layer reacts with the source/drain structure to form a metallic layer on the source/drain structure. The method for manufacturing a semiconductor structure further includes performing an etching process to remove an unreacted portion of the metal layer on the metallic layer and forming a contact over the metallic layer. In addition, the etching process includes using an etching solvent, and the etching solvent includes (a) a first component, including H2SO4, HCl, HF, H3PO4, or NH4OH and (b) a second component, including propylene carbonate, ethylene carbonate, diethyl carbonate, acetonitrile, or a combination thereof.

Abstract: Embodiments of the present disclosure relate generally to a method of passivating and/or removing oxides on a semiconductor surface by using ammonium sulfide, the ammonium sulfide is formed by reacting ammonia and hydrogen sulfide in a semiconductor processing chamber, therefore the ammonium sulfide can be used to clean and remove oxides on a semiconductor surface without the concern of ESH and storage, the ammonium sulfide can also be used to passivate a semiconductor surface by forming a layer of sulfur, and thus preventing the reformation of native oxides, the layer of sulfur can be optionally removed to reduce the thickness of the semiconductor material.

Abstract: A semiconductor structure and a method for forming the same are provided. The method includes forming a source/drain structure in a substrate and forming a metal layer over the source/drain structure. The method for manufacturing a semiconductor structure further includes performing an annealing process such that a portion of the metal layer reacts with the source/drain structure to form a metallic layer on the source/drain structure. The method for manufacturing a semiconductor structure further includes performing an etching process to remove an unreacted portion of the metal layer on the metallic layer and forming a contact over the metallic layer. In addition, the etching process includes using an etching solvent, and the etching solvent includes (a) a first component, including H2SO4, HCl, HF, H3PO4, or NH4OH and (b) a second component, including propylene carbonate, ethylene carbonate, diethyl carbonate, acetonitrile, or a combination thereof.

Abstract: A method for fabricating a semiconductor device includes forming a first high-k (HK) dielectric layer over a substrate, performing a wet treatment process to the first HK dielectric layer. The wet treatment includes a dopant. The method also includes performing an annealing process to the first HK dielectric layer such that the dopant diffuses into the first HK dielectric layer to form a modified HK dielectric layer. Therefore the modified HK dielectric layer has a second dielectric constant which is different than the first dielectric constant.

Abstract: A semiconductor structure and a method for forming the same are provided. The method for manufacturing a semiconductor structure includes forming a source/drain structure over a substrate and forming a metal layer on the source/drain structure. The method for manufacturing a semiconductor structure further includes reacting a portion of the metal layer with the source/drain structure to form a metallic layer on the source/drain structure. The method for manufacturing a semiconductor structure further includes removing an unreacted portion of the metal layer on the metallic layer by an etching process. In addition, the etching process includes using an etchant including HF and propylene carbonate, and the volume ratio of HF to propylene carbonate in the etchant is in a range from about 1:10 to about 1:10000.

Abstract: A semiconductor structure and a method for forming the same are provided. The method includes forming a source/drain structure in a substrate and forming a metal layer over the source/drain structure. The method for manufacturing a semiconductor structure further includes performing an annealing process such that a portion of the metal layer reacts with the source/drain structure to form a metallic layer on the source/drain structure. The method for manufacturing a semiconductor structure further includes performing an etching process to remove an unreacted portion of the metal layer on the metallic layer and forming a contact over the metallic layer. In addition, the etching process includes using an etching solvent, and the etching solvent includes (a) a first component, including H2SO4, HCl, HF, H3PO4, or NH4OH and (b) a second component, including propylene carbonate, ethylene carbonate, diethyl carbonate, acetonitrile, or a combination thereof.

Abstract: Embodiments of the present disclosure relate generally to a method of passivating and/or removing oxides on a semiconductor surface by using ammonium sulfide, the ammonium sulfide is formed by reacting ammonia and hydrogen sulfide in a semiconductor processing chamber, therefore the ammonium sulfide can be used to clean and remove oxides on a semiconductor surface without the concern of ESH and storage, the ammonium sulfide can also be used to passivate a semiconductor surface by forming a layer of sulfur, and thus preventing the reformation of native oxides, the layer of sulfur can be optionally removed to reduce the thickness of the semiconductor material.

Abstract: A semiconductor device is provided, which comprises a semiconductor structure having a surface, the semiconductor structure comprising a material whose oxide is water soluble; and an oxide layer formed on the surface of the semiconductor structure by a wet chemical oxidation treatment utilizing a solvent mixture that comprises a water soluble substance and an aprotic solvent. The layer of oxide may be as thin as approximately 0.7 nanometers in width or less. The semiconductor structure comprises at least one of Ge, SiGe, and III-V compound semiconductor materials. A solution mixture for oxidizing selective semiconductor materials is also provided, which comprises a solvent mixture that includes: a water soluble oxidizing agent; and an aprotic solvent.

Abstract: A method includes performing a first probing on a sample integrated circuit structure to generate a first Raman spectrum. During the first probing, a first laser beam having a first wavelength is projected on the sample integrated circuit structure. The method further includes performing a second probing on the sample integrated circuit structure to generate a second Raman spectrum, wherein a Tip-Enhanced Raman Scattering (TERS) method is used to probe the sample integrated circuit structure. During the second probing, a second laser beam having a second wavelength different from the first wavelength is projected on the sample integrated circuit structure. A stress in a first probed region of the sample integrated circuit structure is then from the first Raman spectrum and the second Raman spectrum.

Abstract: A method of forming a semiconductor structure is provided. The method comprises mixing a water soluble substance with an aprotic solvent to form a solvent mixture and forming a thin layer of oxide around a semiconductor surface by performing wet chemical oxidation operations on the semiconductor surface with the solvent mixture. The aprotic solvent may comprise propylene carbonate, dimethyl sulfoxide, ethylene carbonate or diethyl carbonate. The water soluble substance may comprise H2O2, O3, or parts per million (ppm) level H2O. The method may further comprise removing the oxide from the semiconductor surface to reduce the roughness of the semiconductor surface. The method may further comprise forming a second thin layer of oxide around the semiconductor surface by performing wet chemical oxidation operations with the solvent mixture and removing the second layer of oxide from the semiconductor surface to smoothen the semiconductor surface.

Abstract: A method includes performing a first probing on a sample integrated circuit structure to generate a first Raman spectrum. During the first probing, a first laser beam having a first wavelength is projected on the sample integrated circuit structure. The method further includes performing a second probing on the sample integrated circuit structure to generate a second Raman spectrum, wherein a Tip-Enhanced Raman Scattering (TERS) method is used to probe the sample integrated circuit structure. During the second probing, a second laser beam having a second wavelength different from the first wavelength is projected on the sample integrated circuit structure. A stress in a first probed region of the sample integrated circuit structure is then from the first Raman spectrum and the second Raman spectrum.