Abstract: A grinding wheel is for use in a grinding machine, and is attached on a wheel spindle of the grinding machine for simultaneously grinding at least two parts of a workpiece. The grinding wheel includes at least two wheel cores. Each of wheel cores has a disk-like shape. An abrasive layer is disposed on a circumferential surface of each of the wheel cores. A spacer portion is inseparably fixed on at least one of the wheel cores for keeping a space between the abrasive layers of the wheel cores. And a first labyrinth portion located on one of side surfaces of one of the wheel cores for forming a labyrinth seal with a second labyrinth portion arranged on the grinding machine. The number of separable parts of the grinding wheel are extremely decreased in consideration of imbalance of every part. The spacer portion is integral with at least one of the wheel cores.

Abstract: A nonvolatile semiconductor memory device and writing method of the same having a planarly dispersed charge storing means, which improve the programming disturbance characteristic, wherein gate electrodes of a plurality of memory elements are connected to a plurality of word lines, source regions or drain regions are connected with a common line (for example, a bit line or a source line) which crosses the word lines in an electrically insulated state, and the memory device includes a write inhibit voltage supplying means for supplying a source region and/or drain region of a memory element connected to the selected word line with a reverse bias voltage placing the source/drain region in a reverse bias state to the channel forming region via the common line and a non-selected word line biasing means for supplying a non-selected word line with a voltage in the polarity placing the non-selected word, line in a reverse bias state to the channel forming region.

Abstract: A stage apparatus comprising a support device for supporting a table at its center of gravity and a drive device for driving the table at positions apart from the center of gravity of the table without contacting with the table. The stage apparatus effectively reduces stresses created in the table and/or any thermal deformation of the table. The table is connected to three pairs of table support bars on the stage through three respective plate springs so as to minimize any harmful deformation of the table, which could otherwise occur when the table is driven for motion or displacement in the Z-direction or for adjustment of the tilt of the table. The stage apparatus includes three drive units with respective drive pins for driving the stage. For example, when the three drive pins are driven simultaneously by the associated drive units, the table is caused thereby to translate along the Z-axis.

Abstract: A light valve device has a drive substrate integrated with a drive electrode. A transistor is connected to the drive electrode and a driving circuit energizes the drive electrode through the transistor. An opposed substrate is provided opposed to the drive electrode, and an electrooptical material layer is disposed between the drive substrate and the opposed substrate. The drive substrate has a structure comprising a substrate layer and a semiconductor single crystal thin film layer. The semiconductor single crystal thin film layer is made by thinning a semiconductor single crystal wafer which has been bonded to the substrate layer. The light valve device has a small size and high pixel density and can be formed using miniaturization technology. The light valve can be used for a small size, high resolution video projector and a color matrix display device.

Abstract: An insulated-gate field effect transistor comprising a channel forming region, source/drain regions, a gate region, a bias supplying means, and a capacitive element, wherein a potential for controlling a gate threshold voltage of the insulated-gate field effect transistor in an off-state thereof is applied to the channel forming region through the bias supplying means, and a signal having approximately the same phase as a phase of a signal supplied to the gate region is supplied to the channel forming region through the capacitive element.

Abstract: A jacket is provided to surround coils in a stationary member of a linear motor. An inlet of the jacket is directed toward the optical path of a laser beam from a laser interferometer, and a temperature-controlled fluid is circulated through the jacket. Temperature sensors are provided at the outlet and inlet, respectively, of a temperature controller. The temperature of the fluid supplied to the stationary member is controlled so as to become equal to the temperature around the optical path of the laser beam on the basis of the values of temperature measured by the temperature sensors, thereby suppressing fluctuations of air in the optical path of the laser beam. An exhaust groove is provided in a guide bar transport member so as to surround a bearing surface around a gas outlet, and partition walls flush with the bearing surface are provided outside the exhaust groove.

Abstract: A method of fabricating a semiconductor device comprises the steps of sequentially forming a first gate electrode and an insulating film over a transparent support substrate, forming a through-hole in the insulating film, forming a semiconductor single crystal silicon thin film over the transparent support substrate by epitaxial growth in the through-hole of the insulating film, forming a transistor element having a channel region formed in the semiconductor single crystal silicon thin film, and forming a second gate electrode over and electrically insulated from the channel region of the transistor element.

Abstract: A semiconductor memory device wherein source lines of a memory cell array constituted by a plurality of memory cells arranged in the form of a matrix at intersecting points of word lines and bit lines are arranged in a row direction or a column direction and the source lines of the nonselected rows or the nonselected columns are inversely biased with respect to the semiconductor substrate, thereby to prevent erroneous reading by the leakage current at the time of reading data and further reduce the write current at the time of writing. Further, the read operation is kept from deteriorating by reducing the amplitude of the source line at the time of reading by setting the inverse bias voltage at a minimum constant voltage smaller than the power source voltage.

Abstract: A machining apparatus for machining a workpiece by moving a tool in direction relative to the workpiece comprises, tool moving means for moving the tool in the direction relative to the workpiece, tool movable range setting means for setting a movable range for the tool to inhibit the workplace from exceeding a reference size by inputting the reference size, and halting means for halting a movement of the tool when a position of said tool exceeds the tool movable range set by said tool movable range setting means.

Abstract: Methods are disclosed for decreasing the time and expense needed to design, develop, and manufacture a new or modified microlithography exposure apparatus, and for enabling the transfer precision of the various kinetic systems of the apparatus to be accurately estimated before having to actually fabricate and assemble the apparatus. The method comprises generating an overall computer-simulation model of the kinetic system of the apparatus. The model includes characteristic data (e.g., vibration transmission characteristics) of the mechanical assemblies comprising the kinetic system, the mechanical assemblies including the reticle and wafer stages as well as columns for supporting the stages. The model also includes characteristic data of the control system of the kinetic system.

Abstract: The semiconductor nonvolatile memory has integrated memory cells, each being operative to carry out writing and reading of information in random-access basis and having an electric charge storage structure effective to memorize the information in nonvolatile state. The information is temporarily written into each memory cell in volatile state, and thereafter the temporarily written information is written at one into the respective electric charge storage structure of each memory cell, thereby effecting quick writing of nonvolatile information into the respective memory cells of multi-bits.

Abstract: A current switching circuit in an integrated semiconductor circuit includes a load connected to a positive power supply; a first pnp bipolar transistor having a collector electrode connected to the load, and a base electrode connected to a DC bias source and an emitter electrode; and a first n channel MOS transistor having a drain electrode connected to the emitter electrode of the first npn bipolar transistor, a source electrode connected to the ground, and a gate electrode connected to an input terminal, the first MOS transistor turning on and off in response to a voltage applied to the input terminal.

Abstract: A linear motor has two relatively members moveable a coil mounted to one of the two members, a magnet mounted to the other of the two members, a circulating pump for circulating a cooling medium via a circulating pipe in an outer tube surrounding the coil, a pressure detecting device for detecting the pressure of the cooling medium, and a control system for controlling the operation of the circulating pump based on the detected pressure value from the pressure detecting device.

Abstract: A non-volatile semiconductor memory device including a plurality of non-volatile memory cells and a plurality of reference cells provided for corresponding to storage states in the non-volatile memory cell, generating a reference current which is a current between two output currents of at least two reference cells or a current proportional to the current when data reading from the non-volatile memory cell, and comparing the reference current and a current from the non-volatile memory cell to read out a data stored in the non-volatile memory cell.

Abstract: A method of fabricating a semiconductor device comprises the steps of preparing a transparent support substrate, forming a first gate electrode comprising semiconductor single crystal silicon by epitaxial growth on the transparent support substrate, forming an insulating film over the first gate electrode, forming a through-hole in the insulating film to expose a portion of the first gate electrode, laterally and epitaxially growing a semiconductor single crystal silicon thin film over the transparent substrate by epitaxial growth in the through-hole of the insulating film, forming a transistor element having a channel region formed in the semiconductor single crystal silicon thin film, and forming a second gate electrode over and electrically insulated from the channel region.

Abstract: A non-volatile memory device in which gate electrodes are formed on an upper surface and a lower surface of the channel via insulating layers, respectively, one of them is used as a read electrode and the other is used as a write electrode, whereby, at a read operation the reading is carried out without exerting an influence upon stored charges stored at the time of writing. Particularly, it has a structure in which a source and drain region of the non-volatile semiconductor memory device in formed in the semiconductor layer formed on the insulating layer and, at the same time, one of the read electrode and write electrode is buried in the insulating layer.

Abstract: An ultraviolet laser beam emitted from a laser beam source 1 is subjected to on/off control at an AOM 3, is linearly scanned at an equal speed by a polygon mirror 5 and an f.THETA. lens 6, is collected by an object lens 7, and is selectively spot-irradiated to a memory cell array of a semiconductor chip 8 on an XY stage 9 two-dimensionally moved by a control device 10 so as to write a pattern corresponding to desired data, whereby a custom ROM can be supplied in flexible production on a timely basis meeting market trends.

Abstract: A photoelectric cell of the present invention comprises a first conduction type first semiconductor region; a second conduction type second semiconductor region formed in the surface of the first semiconductor region so as to form a pn junction together with the first semiconductor region; a first conductive region formed in the surface of the first semiconductor region so as to be separated from the second semiconductor region and to form a first rectifier junction together with the first semiconductor region; a second conductive region formed in the surface of the first semiconductor region so as to be separated from the first conductive region and to be electrically connected to the second semiconductor region to form a second rectifier junction together with the first semiconductor region; a third conductive region formed in the surface of the second semiconductor region so as to form a third rectifier junction together with the second semiconductor region; a first insulated gate formed on a first channel

Abstract: The invention provides a semi-conductor light valve device and a process for fabricating the same. The device comprises a composite substrate having a supporte substrate, a light-shielding thin film formed on said supporte substrate and semiconductive thin film disposed on the light-shielding thin film with interposing an insulating thin film. A switching element made of a transistor and a transparent electrode for driving light valve are formed on the semiconductive thin film, and the switching element and the transparent electrode are connected electrically with each other. The transistor includes a channel region in the semiconductive thin film and a main gate electrode for controlling the conduction in the channel region, and the light-shielding thin film layer is so formed as to cover the channel region on the side opposite to said channel region, so as to prevent effectively a back channel and shut off the incident light.

Abstract: A rewritable nonvolatile semiconductor memory device having a plurality of memory cells which are electrically and reversably variable in threshold values and one pair of reference cells, provided for each predetermined number of memory cells, having the same cross-sectional structure as the memory cells, the pair of reference cells having written in them data of opposite phases, and, at the time of reading, the currents of the pair of reference cells being combined to produce a reference current and the data being determined by comparing this with the signal current of the memory cell.