Abstract: A biological activity detection sensor is provided that includes a motion detection sensor that detects motion of a living body, a tremor sensor that detects a tremor of the living body, and a base member that can be mounted on the living body. The base member includes a first member that is deformable in accordance with a mounted state on the living body, and a second member that is less deformable than the first member. The tremor sensor is provided in the first member, and the motion detection sensor is provided in the second member.

Abstract: An action state estimation apparatus is provided that includes a sampling portion, a statistic calculation portion, an action state model storage, and an estimation calculation portion. The sampling portion samples a displacement measurement signal within a predetermined time and generates displacement measurement data. The statistic calculation portion calculates a statistic of the displacement measurement data. The action state model storage stores an action state model modeled by associating the statistic with a loaded state of a muscle of the test subject. The estimation calculation portion estimates the loaded state by setting the statistic as an input vector and using the action state model.

Abstract: An action state estimation apparatus is provided that includes a sampling portion, an action state model storage, and an estimation calculation portion. The sampling portion samples a displacement measurement signal within a predetermined time and generates displacement measurement data based on the sampled displacement measurement signal. The action state model storage stores an action state model modeled by associating the displacement measurement data with a loaded state of a muscle of the test subject. The estimation calculation portion then estimates the loaded state by setting the displacement measurement data as an input vector and using the action state model.

Abstract: A physical activity monitoring device is provided that includes a muscle activity sensor, an acceleration sensor, and a computation unit. The acceleration sensor can be attached to a leg and can output a first monitoring signal corresponding to an activity of the leg. The muscle activity sensor can be attached to the leg and can output a second monitoring signal corresponding to an activity of a muscle and/or a tendon of the leg. The computation unit can detect the load condition of the body of a wearer or user that includes the body position of the wearer or user by using the first monitoring signal and the second monitoring signal.

Abstract: A muscle activity observation apparatus that includes a sensor module and a detection module. The sensor module includes a piezoelectric sensor. Moreover, the piezoelectric sensor has an output that changes in accordance with a tremor of a tendon or a muscle, and an output that changes in accordance with contraction and relaxation of the tendon or the muscle. A detector of the detection module detects an activity state of the tendon or the muscle using a tremor signal and a contraction-relaxation signal output from the piezoelectric sensor.

Abstract: An imaging panel having a plurality of pixels, for picking up scintillation light obtained by converting X-ray projected from an X-ray source, with use of a scintillator, includes photodiodes, TFTs, and an organic film. The photodiodes are provided at the pixels, respectively, for receiving the scintillation light and converting the same into charges. The TFTs are provided at the pixels, respectively, for reading the charges obtained through the conversion by the photodiodes. In one pixel area of the pixels, an area where the organic film is not provided exists in a layer at an upper position with respect to the TFTs, other than an area where a contact hole CH1 for connecting the photodiode and the drain electrode is provided.

Abstract: In a semiconductor device including a semiconductor layer made of an oxide semiconductor, occurrence of variance in the characteristics of TFTs is suppressed. In a manufacturing process of a semiconductor device (100) where a passivation film (17) is to be formed at an upper layer of a semiconductor layer (11) made of an oxide semiconductor, deposition conditions of the passivation film (17) are set such that the proportion of pure metal (the ratio of pure metal to all the components of the semiconductor layer (11)) at an interface of the semiconductor layer (11) to the passivation film (17) becomes higher than the proportion of pure metal in the bulk of the semiconductor layer (11).

Abstract: One of the upper surface and the lower surface of a semiconductor layer (7) of a thin-film transistor (101) in a semiconductor device (100) is in contact with a gate insulating layer (5), and the other is in contact with a first insulating layer (11) containing silicon oxide. The semiconductor layer (7) includes a first and second oxide semiconductor layers (7A, 7B). The first oxide semiconductor layer (7A) is arranged on a gate insulating layer side of the second oxide semiconductor layer (7B) and is in contact with the second oxide semiconductor layer. The second oxide semiconductor layer (7B) contains In and Ga and does not contain Sn. The first oxide semiconductor layer (7A) contains In, Sn, and Zn. The percentage of Zn in the first oxide semiconductor layer (7A) in the depth direction does not have a maximum value in the vicinity of a surface of the first oxide semiconductor layer adjacent to the second oxide semiconductor layer.

Abstract: A semiconductor device includes, a plurality of oxide semiconductor TFTs including a first gate electrode, a first insulating layer in contact with the first gate electrode, an oxide semiconductor layer opposing the first gate electrode via the first insulating layer, a source electrode and a drain electrode which are connected with the oxide semiconductor layer, and an organic insulating layer covering only some of the plurality of oxide semiconductor TFTs, wherein the plurality of oxide semiconductor TFTs include a first TFT which is covered with the organic insulating layer and a second TFT which is not covered with the organic insulating layer, and the second TFT includes a second gate electrode opposing the oxide semiconductor layer via a second insulating layer, the second gate electrode being arranged to overlap with at least a portion of the first gate electrode with the oxide semiconductor layer interposed therebetween.

Abstract: In a semiconductor device including a semiconductor layer made of an oxide semiconductor, occurrence of variance in the characteristics of TFTs is suppressed. In a manufacturing process of a semiconductor device (100) where a passivation film (17) is to be formed at an upper layer of a semiconductor layer (11) made of an oxide semiconductor, deposition conditions of the passivation film (17) are set such that the proportion of pure metal (the ratio of pure metal to all the components of the semiconductor layer (11)) at an interface of the semiconductor layer (11) to the passivation film (17) becomes higher than the proportion of pure metal in the bulk of the semiconductor layer (11).

Abstract: One of the upper surface and the lower surface of a semiconductor layer (7) of a thin-film transistor (101) in a semiconductor device (100) is in contact with a gate insulating layer (5), and the other is in contact with a first insulating layer (11) containing silicon oxide. The semiconductor layer (7) includes a first and second oxide semiconductor layers (7A, 7B). The first oxide semiconductor layer (7A) is arranged on a gate insulating layer side of the second oxide semiconductor layer (7B) and is in contact with the second oxide semiconductor layer. The second oxide semiconductor layer (7B) contains In and Ga and does not contain Sn. The first oxide semiconductor layer (7A) contains In, Sn, and Zn. The percentage of Zn in the first oxide semiconductor layer (7A) in the depth direction does not have a maximum value in the vicinity of a surface of the first oxide semiconductor layer adjacent to the second oxide semiconductor layer.

Abstract: A semiconductor device (1001) includes a thin-film transistor (101) including a gate electrode (3), an oxide semiconductor layer (7), a gate insulating layer (5), a source electrode (9s), and a drain electrode (9d); a metal oxide layer (8) including a conductor region (70c) and formed from an oxide film from which the oxide semiconductor layer (7) is also formed; an interlayer insulating layer (13) covering the thin-film transistor and the metal oxide layer (8); and a transparent conductive layer (15) disposed on the interlayer insulating layer and electrically connected to the drain electrode, wherein the oxide semiconductor layer (7) and the metal oxide layer (8) contain indium, tin, and zinc, and the transparent conductive layer (15) overlaps at least a portion of the conductor region (70c) with the interlayer insulating layer (13) therebetween.

Abstract: In a semiconductor device including a semiconductor layer made of an oxide semiconductor, occurrence of variance in the characteristics of TFTs is suppressed. In a manufacturing process of a semiconductor device (100) where a passivation film (17) is to be formed at an upper layer of a semiconductor layer (11) made of an oxide semiconductor, deposition conditions of the passivation film (17) are set such that the proportion of pure metal (the ratio of pure metal to all the components of the semiconductor layer (11)) at an interface of the semiconductor layer (11) to the passivation film (17) becomes higher than the proportion of pure metal in the bulk of the semiconductor layer (11).

Abstract: An oxide semiconductor film etching method includes the step of: preparing a substrate (1) with an oxide semiconductor formed on a surface thereof, the oxide semiconductor film (7) containing In, Sn, and Zn; and etching the oxide semiconductor film (7) using an etching solution containing ammonium fluoride.

Abstract: A semiconductor device (100A) includes a substrate (11); a TFT (10A) supported on the substrate, the TFT including an oxide semiconductor layer (16); an organic insulating layer (24) covering the TFT; a lower layer electrode (32) on the organic insulating layer; a dielectric layer (34) on the lower layer electrode; an upper layer electrode on the dielectric layer; and an upper layer electrode (36) including a portion opposing the lower layer electrode via the dielectric layer. The dielectric layer is a silicon nitride film having a hydrogen content of 5.33×1021 atoms/cm3 or less.

Abstract: A semiconductor device includes: a first substrate; a gate electrode on the first substrate; a gate insulating layer on the gate electrode; an oxide semiconductor film including a channel region disposed over the gate electrode through the gate insulating layer and lowered-resistance region contacting the channel region; a source electrode and a drain electrode on the channel region; a first insulating film covering at least the channel region and including a contact hole that exposes the lowered-resistance region; and a second insulating film having reducing characteristics and disposed above the first insulating film across the contact hole, the second insulating film contacting the lowered-resistance region inside the contact hole.

Abstract: A semiconductor device (1001) includes a thin-film transistor (101) including a gate electrode (3), an oxide semiconductor layer (7), a gate insulating layer (5), a source electrode (9s), and a drain electrode (9d); a metal oxide layer (8) including a conductor region (70c) and formed from an oxide film from which the oxide semiconductor layer (7) is also formed; an interlayer insulating layer (13) covering the thin-film transistor and the metal oxide layer (8); and a transparent conductive layer (15) disposed on the interlayer insulating layer and electrically connected to the drain electrode, wherein the oxide semiconductor layer (7) and the metal oxide layer (8) contain indium, tin, and zinc, and the transparent conductive layer (15) overlaps at least a portion of the conductor region (70c) with the interlayer insulating layer (13) therebetween.

Abstract: A shift of a threshold voltage of a thin film transistor upon X-ray irradiation is suppressed. An imaging panel having a plurality of pixels, for picking up scintillation light obtained by converting X-ray projected from an X-ray source, with use of a scintillator, includes photodiodes 15, TFTs 14, and an organic film 43. The photodiodes 15 are provided at the pixels, respectively, for receiving the scintillation light and converting the same into charges. The TFTs 14 are provided at the pixels, respectively, for reading the charges obtained through the conversion by the photodiodes 15. Each TFT 14 includes an oxide semiconductor layer 142, a gate electrode 141, as well as a source electrode 143S and a drain electrode 143D formed on a part of the oxide semiconductor layer 142.

Abstract: Provided is an imaging panel and an imaging device with which the amount of irradiated X-ray can be reduced, and at the same time, the threshold voltage of a TFT during X-ray irradiation can be prevented from shifting. The imaging panel includes an imaging part that includes a plurality of pixels 13 that generate charges based on X-ray projected from an X-ray source, and a thin film transistor 14 for reading out the charges generated at the pixel 13. The thin film transistor 14 has a gate 141 and an oxide semiconductor layer 142, as well as a source 143S and a drain 143D formed on a part of the oxide semiconductor layer 142 by wet etching with respect to a metal film formed on the oxide semiconductor layer 142. The oxide semiconductor layer 142 contains indium, tin, gallium, and oxygen.

Abstract: A semiconductor device includes an oxide semiconductor film, a first insulating film, and a second insulating film. The oxide semiconductor film is made of oxide semiconductor material. The oxide semiconductor film includes a low resistance portion having an electrical resistance lower than another portion. The low resistance portion is separated from the other portion. The first insulating film is formed in an upper layer relative to the oxide semiconductor film. The first insulating film includes a hole at a position overlapping the low resistance portion. The second insulating film is formed in an upper layer relative to the first insulating film. The second insulating film and contains hydrogen.