Patents by Inventor Yu-Wu Wang

Yu-Wu Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128955
    Abstract: An integrated circuit includes a semiconductor substrate and a plurality of circuit elements in or on the substrate. The circuit elements are defined by standard layout cells selected from a cell library. The circuit elements including a plurality of flip-flops. Each flip-flop has a data input terminal, a data output terminal, a clock input terminal, and a clock output terminal. A first one of the flip-flops directly abuts a second flip-flop such that the clock output terminal of the first flip-flop electrically connects with the clock input terminal of the second flip-flop.
    Type: Application
    Filed: April 24, 2023
    Publication date: April 18, 2024
    Inventors: Shao-Yu Steve Wang, Chien-Te Wu, Shang-Chih Hsieh, Nick Tsai
  • Patent number: 7666764
    Abstract: A compound semiconductor material for forming an active layer of a thin film transistor device is disclosed, which has a group II-VI compound doped with a dopant ranging from 0.1 to 30 mol %, wherein the dopant is selected from a group consisting of alkaline-earth metals, group IIIA elements, group IVA elements, group VA elements, group VIA elements, and transitional metals. The method for forming an active layer of a thin film transistor device by using the compound semiconductor material of the present invention is disclosed therewith.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: February 23, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Jia-Chong Ho, Jen-Hao Lee, Cheng-Chung Lee, Yu-Wu Wang, Chun-Tao Lee, Pzng Lin
  • Patent number: 7599025
    Abstract: A vertical pixel structure for emi-flective display and a method thereof are provided. The vertical pixel structure has a substrate, a emitting pixel unit arranged on the substrate and a reflective pixel unit arranged on the emitting pixel unit. By using the vertical pixel structure the aperture of the display can be increased, and the power consumption can be reduced as well.
    Type: Grant
    Filed: January 2, 2006
    Date of Patent: October 6, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yung-Hui Yeh, Yu-Wu Wang, Yu-Lung Liu, Chi-Chang Liao, Hsing-Lung Wang
  • Patent number: 7582898
    Abstract: This invention provides a circuit structure with a double-gate organic thin film transistor device and application thereof. A protection layer covered on an organic thin film transistor structure having a bottom gate is used as another gate insulating layer. A metal layer is formed on this gate insulating layer to serve as another gate. A double-gate structure is hence accomplished. The double-gate structure can be used in a circuit. By the double-gate structure the threshold voltage of the organic thin film transistor can be adjusted, and advantageously changing the characteristic of the organic thin film transistor to improve the accuracy of signal transmission.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: September 1, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Wu Wang, Yi-Kai Wang, Chen-Pang Kung, Chih-Wen Hsiao
  • Patent number: 7576736
    Abstract: A pixel structure for a vertical emissive-reflective (emi-flective) display is provided. The pixel structure has a substrate, a self-light emitting pixel unit arranged on the substrate, and a reflective pixel unit arranged on the self-light emitting pixel unit. By using the vertical pixel structure, the aperture of the display can be increased, and the power consumption can also be decreased.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: August 18, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yung-Hui Yeh, Yu-Wu Wang, Chih-Ming Lai, Chi-Chang Liao, Hsing-Lung Wang
  • Publication number: 20090053851
    Abstract: An organic thin film transistor array substrate including a substrate divided into an LCD region and an OTFT region; a first dielectric layer formed on the substrate in the LCD region and having a first uneven portion; an organic semiconducting layer formed on the substrate in the OTFT region; a gate, source, and drain formed in the OTFT region, wherein the source and drain are in contact with the organic semiconducting layer to form a channel between the source and drain; and a pixel electrode formed on the first uneven portion of the first dielectric layer in the LCD region.
    Type: Application
    Filed: October 30, 2008
    Publication date: February 26, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yih-Jun Wong, Horng-Long Cheng, Yu-Wu Wang
  • Patent number: 7482185
    Abstract: A vertical pixel structure for emi-flective display and a method thereof are provided. The vertical pixel structure has a substrate, a emitting pixel unit arranged on the substrate and a reflective pixel unit arranged on the emitting pixel unit. By using the vertical pixel structure the aperture of the display can be increased, and the power consumption can be reduced as well.
    Type: Grant
    Filed: January 2, 2006
    Date of Patent: January 27, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yung-Hui Yeh, Yu-Wu Wang, Yu-Lung Liu, Chi-Chang Liao, Hsing-Lung Wang
  • Publication number: 20080296569
    Abstract: A compound semiconductor material for forming an active layer of a thin film transistor device is disclosed, which has a group II-VI compound doped with a dopant ranging from 0.1 to 30 mol %, wherein the dopant is selected from a group consisting of alkaline-earth metals, group IIIA elements, group IVA elements, group VA elements, group VIA elements, and transitional metals. The method for forming an active layer of a thin film transistor device by using the compound semiconductor material of the present invention is disclosed therewith.
    Type: Application
    Filed: April 28, 2008
    Publication date: December 4, 2008
    Applicant: Industrial Technology Research Institute
    Inventors: Jia-Chong Ho, Jen-Hao Lee, Cheng-Chung Lee, Yu-Wu Wang, Chun-Tao Lee, Pang Lin
  • Patent number: 7456912
    Abstract: An organic thin film transistor array substrate including a substrate divided into an LCD region and an OTFT region; a first dielectric layer formed on the substrate in the LCD region and having a first uneven portion; an organic semiconducting layer formed on the substrate in the OTFT region; a gate, source, and drain formed in the OTFT region, wherein the source and drain are in contact with the organic semiconducting layer to form a channel between the source and drain; and a pixel electrode formed on the first uneven portion of the first dielectric layer in the LCD region.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: November 25, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Yih-Jun Wong, Horng-Long Cheng, Yu-Wu Wang
  • Publication number: 20070257252
    Abstract: This invention provides a circuit structure with a double-gate organic thin film transistor device and application thereof. A protection layer covered on an organic thin film transistor structure having a bottom gate is used as another gate insulating layer. A metal layer is formed on this gate insulating layer to serve as another gate. A double-gate structure is hence accomplished. The double-gate structure can be used in a circuit. By the double-gate structure the threshold voltage of the organic thin film transistor can be adjusted, and advantageously changing the characteristic of the organic thin film transistor to improve the accuracy of signal transmission.
    Type: Application
    Filed: July 20, 2006
    Publication date: November 8, 2007
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Wu Wang, Yi-Kai Wang, Chen-Pang Kung, Chih-Wen Hsiao
  • Patent number: 7253848
    Abstract: An organic thin film transistor array substrate including a substrate divided into an LCD region and an OTFT region; a first dielectric layer formed on the substrate in the LCD region and having a first uneven portion; an organic semiconducting layer formed on the substrate in the OTFT region; a gate, source, and drain formed in the OTFT region, wherein the source and drain are in contact with the organic semiconducting layer to form a channel between the source and drain; and a pixel electrode formed on the first uneven portion of the first dielectric layer in the LCD region.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: August 7, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Yih-Jun Wong, Horng-Long Cheng, Yu-Wu Wang
  • Publication number: 20070032000
    Abstract: A vertical pixel structure for emi-flective display and a method thereof are provided. The vertical pixel structure has a substrate, a emitting pixel unit arranged on the substrate and a reflective pixel unit arranged on the emitting pixel unit. By using the vertical pixel structure the aperture of the display can be increased, and the power consumption can be reduced as well.
    Type: Application
    Filed: January 2, 2006
    Publication date: February 8, 2007
    Inventors: Yung-Hui Yeh, Yu-Wu Wang, Yu-Lung Liu, Chi-Chang Liao, Hsing-Lung Wang
  • Publication number: 20070030571
    Abstract: A vertical pixel structure for emi-flective display and a method thereof are provided. The vertical pixel structure has a substrate, a emitting pixel unit arranged on the substrate and a reflective pixel unit arranged on the emitting pixel unit. By using the vertical pixel structure the aperture of the display can be increased, and the power consumption can be reduced as well.
    Type: Application
    Filed: January 2, 2006
    Publication date: February 8, 2007
    Inventors: Yung-Hui Yeh, Yu-Wu Wang, Yu-Lung Liu, Chi-Chang Liao, Hsing-Lung Wang
  • Patent number: 7161289
    Abstract: A triode structure of a field emission display and fabrication method thereof. A plurality of cathode layers arranged in a matrix is formed overlying a dielectric layer. A plurality of emitting layers arranged in a matrix is formed overlying the cathode layers, respectively. A plurality of lengthwise-extending gate lines is formed on the dielectric layer, in which each of the gate layers is disposed between two adjacent columns of the cathode layers.
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: January 9, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Chun-Tao Lee, Cheng-Chung Lee, Jyh-Rong Sheu, Yu-Yang Chang, Jia-Chong Ho, Yu-Wu Wang
  • Publication number: 20070001956
    Abstract: A pixel structure for a vertical emissive-reflective (emi-flective) display is provided. The pixel structure has a substrate, a self-light emitting pixel unit arranged on the substrate, and a reflective pixel unit arranged on the self-light emitting pixel unit. By using the vertical pixel structure, the aperture of the display can be increased, and the power consumption can also be decreased.
    Type: Application
    Filed: September 13, 2005
    Publication date: January 4, 2007
    Inventors: Yung-Hui Yeh, Yu-Wu Wang, Chih-Ming Lai, Chi-Chang Liao, Hsing-Lung Wang
  • Patent number: 7156715
    Abstract: A triode structure of a field emission display and fabrication method thereof. A plurality of cathode layers arranged in a matrix is formed overlying a dielectric layer. A plurality of emitting layers arranged in a matrix is formed overlying the cathode layers, respectively. A plurality of lengthwise-extending gate lines is formed on the dielectric layer, in which each of the gate layers is disposed between two adjacent columns of the cathode layers.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: January 2, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Chun-Tao Lee, Cheng-Chung Lee, Jyh-Rong Sheu, Yu-Yang Chang, Jia-Chong Ho, Yu-Wu Wang
  • Publication number: 20060270197
    Abstract: A compound semiconductor material for forming an active layer of a thin film transistor device is disclosed, which has a group II-VI compound doped with a dopant ranging from 0.1 to 30 mol %, wherein the dopant is selected from a group consisting of alkaline-earth metals, group IIIA elements, group IVA elements, group VA elements, group VIA elements, and transitional metals. The method for forming an active layer of a thin film transistor device by using the compound semiconductor material of the present invention is disclosed therewith.
    Type: Application
    Filed: July 20, 2006
    Publication date: November 30, 2006
    Applicant: Industrial Technology Research Institute
    Inventors: Jia-Chong Ho, Jen-Hao Lee, Cheng-Chung Lee, Yu-Wu Wang, Chun-Tao Lee, Pang Lin
  • Patent number: 7090555
    Abstract: A field emission display (FED) having a grid plate with spacer structure and fabrication method thereof. A first wplate having first electrodes and electron emitters on a first surface is provided. A second plate having second electrodes and phosphor regions on a second surface is also provided, wherein the second surface is opposite the first surface. A grid plate with spacer structure and passages having grid electrodes is positioned between the two plates to maintain a predetermined interval. When a specific voltage is applied between the first electrode and the second electrode, electrons extracted from the electron emitters are accelerated by the grid electrodes through the passages to impact the phosphor regions.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: August 15, 2006
    Assignee: Industrial Technology Research Institute
    Inventors: Chun-Tao Lee, Ming-Chun Hsiao, Wei-Yi Lin, Yu-Yang Chang, Yu-Wu Wang
  • Publication number: 20060113888
    Abstract: A novel protection structure for protecting field emission elements in a field emission display device from burnout damage due to electrical current surges induced to the device cathode by ionized gases in the device. The protection structure includes one or multiple reduction plates or electrodes which are typically provided on the cathode. The reduction plate or plates are negatively-charged and attract positively charged gas ions. Consequently, induction of electrical current surges to the cathode is avoided, thereby preventing burnout damage to the field emission elements.
    Type: Application
    Filed: December 1, 2004
    Publication date: June 1, 2006
    Inventors: Huai-Yuan Tseng, Chun-Yao Huang, Yu-Wu Wang, Yung-Hui Yeh
  • Patent number: 7026644
    Abstract: The invention provides an organic thin film transistor array substrate, comprising: a substrate, having a liquid crystal display area and an organic thin film transistor area; a pixel electrode, formed on the substrate in the LCD area; a first alignment film, formed on the pixel electrode; a second alignment film, formed on the substrate in the OTFT area; an organic semiconductor layer, formed on the second alignment film, wherein the organic semiconductor layer is aligned along the direction of the second alignment film; and a gate, a source and a drain, formed in the OTFT area, wherein the source and the drain are in contact with the organic semiconductor layer and a channel is formed between the source and the drain.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: April 11, 2006
    Assignee: Industrial Technology Research Institute
    Inventors: Horng-Long Cheng, Wei-Yang Chou, Yih-Jun Wong, Yu-Wu Wang, Cheng-Chung Lee