Abstract: A ground fault circuit interrupter includes a reset key, a reset mechanism, a conductive assembly configured to connect a power supply input side to a load side, a leakage signal detection circuit, and an electromagnetic tripping mechanism. The reset mechanism comprises a reset support and a support return mechanism. The reset support comprises a reset bracket and a support reset spring. The support return mechanism comprises a reset pole, a reset key spring, a compression spring, a reset block, a compression spring container, a reset slider, and a contact conductive part. The contact conductive part is disposed at a lower end of the reset slider and is configured to align with a position of a switch contact on a first PCB board. A state of contact or separation between the contact conductive part and the switch contact is configured to control an on-off state of the conductive assembly.

Abstract: An electric field buffer layer is formed so as to surround an active region. The electric field buffer layer includes a plurality of P-type impurity layers. Each of the P-type impurity layers includes P-type implantation layers and P-type diffusion layers that are formed so as to respectively surround the P-type implantation layers and contain P-type impurities at a concentration lower than that of the P-type implantation layers. A first P-type implantation layer is formed to be in contact with or to partially overlap the active region. Each of the P-type diffusion layers is formed to have an expansion to a degree to which the first P-type diffusion layer is in contact with or overlaps a second P-type diffusion layer. Intervals between the P-type implantation layers increase from the active region toward the outer peripheral portion of the semiconductor substrate.

Abstract: A manufacturing method of a two-dimensional transition-metal chalcogenide thin film includes providing a substrate, providing a reaction film, providing a source and providing a microwave. The substrate is made of material having dipole moments. The reaction film, disposed on the substrate, has a predefined thickness and includes a transition-metal compound. The source includes S, Se, or Te. The substrate is heated by the microwave to produce a heat energy to the reaction film and the source; thus a chemical reaction takes place and the two-dimensional transition-metal chalcogenide thin film is formed on the substrate. The two-dimensional transition-metal thin film includes a plurality of elements, and each of the elements aligns along a predefined direction by controlling a value of the predefined thickness.

Abstract: A semiconductor device includes a semiconductor substrate in which an active region and an edge termination region are defined, a semiconductor element formed in the active region, and first to fourth P layers formed in a region spanning from an edge portion of the active region to the edge termination region in the surface of the semiconductor substrate. The first to fourth P layers respectively have surface concentrations P(1) to P(4) that decrease in this order, bottom-end distances D(1) to D(4) that increase in this order, and distances B(1) to B(4) to the edge of the semiconductor substrate that increase in this order. The surface concentration P(4) is 10 to 1000 times the impurity concentration of the semiconductor substrate, and the bottom-end distance D(4) is in the range of 15 to 30 ?m.

Abstract: The termination region includes a ring region (LNFLR). A plurality of ring-shaped P-type ring layers are regularly arranged in the ring region (LNFLR). The ring region (LNFLR) is divided into a plurality of units which include the plurality of P-type ring layers respectively. A width of each unit is constant. A total number of P-type impurities in the ring region (LNFLR) is N, the target withstand voltage is BV [V], a width of each unit is SandL [?m], and the number of the plurality of units is num, following relationships are satisfied. N?(M×BV)?, M=104 to 105, ?=0.55 to 1.95, SandL×num×Ecri?2×?×BV, Ecri=2.0 to 3.0×105 [V/cm], ?=100 to 101. Widths of the P-type ring layers of the plurality of units linearly decrease toward an outside of the termination region.

Abstract: The present disclosure relates to a reverse grounding protection circuit and a ground fault circuit interrupter. The reverse grounding protection circuit may include a power supply circuit, a leakage signal amplifying circuit, a leakage grounding detection circuit, a power supply indicator circuit, a manual detection circuit, a tripping mechanism control circuit, a reverse connection detection and execution circuit, and a power-on driving signal generating circuit. A ground fault circuit interrupter may comprise an interrupter body and a reverse grounding protection circuit in the interrupter body. The practice of the present disclosure may avoid the risk from reverse connection of the ground fault circuit interrupter and output of power of reverse connection, and thus improve safety of the ground fault circuit interrupter.

Abstract: A semiconductor device includes a semiconductor substrate in which an active region and an edge termination region are defined, a semiconductor element formed in the active region, and first to fourth P layers formed in a region spanning from an edge portion of the active region to the edge termination region in the surface of the semiconductor substrate. The first to fourth P layers respectively have surface concentrations P(1) to P(4) that decrease in this order, bottom-end distances D(1) to D(4) that increase in this order, and distances B(1) to B(4) to the edge of the semiconductor substrate that increase in this order. The surface concentration P(4) is 10 to 1000 times the impurity concentration of the semiconductor substrate, and the bottom-end distance D(4) is in the range of 15 to 30 ?m.

Abstract: An apparatus for segregating and positioning work-pieces and other objects at different desired positions includes a main body, a segregating system, and a plurality of dispensing channels defined in the main body. The segregating system has a receiving chamber and a plurality of gas inlets both defined in the main body. The receiving chamber is configured to house the work-pieces. The gas inlets are configured to allow a high-pressure gas fed therethrough into the receiving chamber. Each dispensing channel has a connecting end communicating with the receiving chamber and a positioning end opposite to the connecting end. The work-pieces are able to be driven by the high-pressure gas to move to the positioning ends through the connecting end.

Abstract: A suction device includes a baseplate, a mounting board, and at least one suction assembly. The mounting board is spaced from the baseplate. The at least one suction assembly includes two bearings and a pole. The two bearings are secured on the baseplate and the mounting board, respectively. The pole is a hollow structure and passes through the two bearings. A suction head and a connection assembly are coupled to two opposite ends of the pole. The connection assembly connects to a vacuum pump to generate a vacuum in the suction head.

Abstract: The termination region includes a ring region (LNFLR). A plurality of ring-shaped P-type ring layers (12a˜120 are regularly arranged in the ring region (LNFLR). The ring region (LNFLR) is divided into a plurality of units which include the plurality of P-type ring layers (12a˜120 respectively. A width of each unit is constant. A total number of P-type impurities in the ring region (LNFLR) is N, the target withstand voltage is BV [V], a width of each unit is SandL [?m], and the number of the plurality of units is num, following relationships are satisfied. N?(M×BV)?, M=104 to 105, ?=0.55 to 1.95, SandL×num×Ecri?2×?×BV, Ecri=2.0 to 3.0×105 [V/cm], ?=100 to 101. Widths of the P-type ring layers (12a˜12f) of the plurality of units linearly decrease toward an outside of the termination region.

Abstract: An insulated gate bipolar transistor having a gate electrode (7) and an emitter electrode (9) is provided in a transistor region. A termination region is arranged around the transistor region. A first N type buffer layer (18) is provided below an N type drift layer (1) in the transistor region. A P type collector layer (19) is provided below the first N type buffer layer (18). A second N type buffer layer (20) is provided below the N type drift layer (1) in the termination region. A collector electrode (21) is directly connected to the P type collector layer (19) and the second N type buffer layer (20). An impurity concentration of the second N type buffer layer (20) decreases as a distance from the collector electrode (21) decreases. The second N type buffer layer (20) does not form any ohmic contact with the collector electrode (21).

Abstract: An electric field buffer layer (13) is formed so as to surround an active region (12) from an outer peripheral portion of the active region (12) toward an outer peripheral portion of a semiconductor substrate (11). The electric field buffer layer (13) includes a plurality of P-type impurity layers (21 to 25). Each of the P-type impurity layers (21 to 25) includes P-type implantation layers (21a to 25a) and P-type diffusion layers (21b to 25b) that are formed so as to respectively surround the P-type implantation layers (21a to 25a) and contain P-type impurities at a concentration lower than that of the P-type implantation layers (21a to 25a). A first P-type implantation layer (21a) is formed to be in contact with or to partially overlap the active region (12). Each of the P-type diffusion layers (21b to 25b) is formed to have an expansion to a degree to which the first P-type diffusion layer (21b) is in contact with or overlaps a second P-type diffusion layer (22b).

Abstract: A suction device includes a baseplate, a mounting board, and at least one suction assembly. The mounting board is spaced from the baseplate. The at least one suction assembly includes two bearings and a pole. The two bearings are secured on the baseplate and the mounting board, respectively. The pole is a hollow structure and passes through the two bearings. A suction head and a connection assembly are coupled to two opposite ends of the pole. The connection assembly connects to a vacuum pump to generate a vacuum in the suction head.

Abstract: A clamp apparatus includes a mounting module, a clamp module, and an actuator. The clamp module includes two facing arms and a cam clamped between the two arms. Each arm is rotatably mounted to the mounting module and has a clamp end. The clamp module is configured to have a clamped configuration in which each clamp end is engaged with the object and an open configuration in which the object is free from each of the clamp ends, and further configured to operate between the clamped configuration and the open configuration. The actuator is configured to drive the cam thereby imparting motive force to the two arms during the operation between the clamped configuration and the open configuration.

Abstract: An insulated gate bipolar transistor having a gate electrode (7) and an emitter electrode (9) is provided in a transistor region. A termination region is arranged around the transistor region. A first N type buffer layer (18) is provided below an N type drift layer (1) in the transistor region. A P type collector layer (19) is provided below the first N type buffer layer (18). A second N type buffer layer (20) is provided below the N type drift layer (1) in the termination region. A collector electrode (21) is directly connected to the P type collector layer (19) and the second N type buffer layer (20). An impurity concentration of the second N type buffer layer (20) decreases as a distance from the collector electrode (21) decreases. The second N type buffer layer (20) does not form any ohmic contact with the collector electrode (21).

Abstract: A semiconductor device includes a semiconductor substrate in which an active region and an edge termination region are defined, a semiconductor element formed in the active region, and first to fourth P layers formed in a region spanning from an edge portion of the active region to the edge termination region in the surface of the semiconductor substrate. The first to fourth P layers respectively have surface concentrations P(1) to P(4) that decrease in this order, bottom-end distances D(1) to D(4) that increase in this order, and distances B(1) to B(4) to the edge of the semiconductor substrate that increase in this order. The surface concentration P(4) is 10 to 1000 times the impurity concentration of the semiconductor substrate, and the bottom-end distance D(4) is in the range of 15 to 30 ?m.

Abstract: An apparatus for segregating and positioning work-pieces and other objects at different desired positions includes a main body, a segregating system, and a plurality of dispensing channels defined in the main body. The segregating system has a receiving chamber and a plurality of gas inlets both defined in the main body. The receiving chamber is configured to house the work-pieces. The gas inlets are configured to allow a high-pressure gas fed therethrough into the receiving chamber. Each dispensing channel has a connecting end communicating with the receiving chamber and a positioning end opposite to the connecting end. The work-pieces are able to be driven by the high-pressure gas to move to the positioning ends through the connecting end.

Abstract: A ground fault circuit interrupter comprises a reset key, a reset locking mechanism, a reset mechanism, a reset bracket, a bracket reset mechanism, a bracket homing mechanism, a reset linkage mechanism, and a reset linkage clutching mechanism. A conductive assembly is configured to selectively connect or disconnect electrical continuity between the power input side and the load side. The conductive assembly comprises pairs of short-circuit conductive strips with conductive movable contacts, power input connection assemblies with input conductive stationary contacts, wiring output assemblies, receptacle output assemblies with output stationary contacts, and a first short-circuit conductor and a second short-circuit conductor.

Abstract: A breaker circuit is provided with failure self-detection functions. The circuit may comprise line and neutral power supply lines, line and neutral power output lines, a test magnetic coil, a neutral magnetic coil, a first electronic switch, and a first rectifier DC power unit comprising a bridge rectifier and a filter circuit. A leakage signal detection circuit may comprise a leakage signal amplification integrated circuit as its core component. An electromagnetic tripping mechanism may work under the control of the leakage signal detection circuit. The electromagnetic tripping mechanism may comprise an electromagnetic coil. A self-detection control circuit may comprise a second rectifier DC power unit, an analog leakage circuit comprising a series branch circuit comprising a first current-limiting resistor and a second electronic switch, and a micro-processing circuit composed of a microcontroller as its core component. The circuit may also comprise a self-detection alarming circuit.

Abstract: An insulated gate bipolar transistor having a gate electrode (7) and an emitter electrode (9) is provided in a transistor region. A termination region is arranged around the transistor region. A first N type buffer layer (18) is provided below an N type drift layer (1) in the transistor region. A P type collector layer (19) is provided below the first N type buffer layer (18). A second N type buffer layer (20) is provided below the N type drift layer (1) in the termination region. A collector electrode (21) is directly connected to the P type collector layer (19) and the second N type buffer layer (20). An impurity concentration of the second N type buffer layer (20) decreases as a distance from the collector electrode (21) decreases. The second N type buffer layer (20) does not form any ohmic contact with the collector electrode (21).