Abstract: An alignment logic together with an MFI extractor are adapted to compensate for differential delays. The MFI extractor extracts the MFI disposed in the path overhead of each constituent time-slot. The alignment logic uses the extracted MFI to align corresponding data words (i.e., data words that are transmitted during the same time period) at the receiving end of virtually concatenated channels and that occupy different time-slots of the same channel. To perform alignment, the alignment logic stores each data word in a RAM location that is defined by an associated MFI. The data words so stored are aligned when read sequentially from their stored locations. The synchronization logic in the alignment logic synchronizes all the constituent time-slots.

Abstract: A data format conversion method and apparatus are presented to convert time-slot interleaved SONET/SDH data to per time-slot data for virtual concatenation processing. The converter consists of an input buffer and a matrix transposer. The input buffer discards the overhead and fixed stuff bytes of each SPE that it receives, while the matrix transposer packs the N payload bytes into N-byte words with alignment to a start-of-frame indicator. Because each N-byte word is associated with a different time slot, the N-byte words form per time-slot data.

Abstract: The invention concerns to an electrophoretic separation device comprising a separation channel having at least one in- and outlet opening at the beginning and at the end of the channel and one electrode in the region of the inlet opening and one electrode in the region of the outlet opening. As well the invention concerns to a method for electrophoretic separation. The invention is characterized in that said separation channel is subdivided into at least two sections in series being coupled mutually by a joint providing an electrical connection means having a ion-conductive material separating said channel from a reservoir being apart the channel and provided with an electrode.

Abstract: Multi-stage networks are used for data stream permutations involving merging and demultiplexing—providing arbitrary data unit time-space interchange that can be used to solve a range of problems particularly in the field of digital data communications, particularly in digital data communication involving advanced networks for exchanging data in packets, cells, or other data units.

Abstract: A transmit virtual concatenation processor for multiplexing channelized data onto a SONET/SDH frame is disclosed. The processor is scalable and is able to handle mapping a number of data channels to a number of different frame sizes including STS-12, STS-48, STS-192 and STS-768. The processor supports virtual concatenation with arbitrary channel mapping at both STS-1 and STS-3c granularities. The processor also supports contiguous concatenation with STS-12c, STS-24c, STS-48c, STS-192c, etc. capacities (i.e., STS-Nc where N is a multiple of 3). In addition, the processor supports mixed concatenation where some channels are using contiguous concatenation and some other channels are using STS-3c-Xv virtual concatenation. Alternatively, the processor is able to support any virtual concatenation, any contiguous concatenation and any mixed concatenation.

Abstract: An alignment logic together with an MFI extractor are adapted to compensate for differential delays. The MFI extractor extracts the MFI disposed in the path overhead of each constituent time-slot. The alignment logic uses the extracted MFI to align corresponding data words (i.e., data words that are transmitted during the same time period) at the receiving end of virtually concatenated channels and that occupy different time-slots of the same channel. To perform alignment, the alignment logic stores each data word in a RAM location that is defined by an associated MFI. The data words so stored are aligned when read sequentially from their stored locations. The synchronization logic in the alignment logic synchronizes all the constituent time-slots.

Abstract: A transmit virtual concatenation processor for multiplexing channelized data onto a SONET/SDH frame is disclosed. The processor is scalable and is able to handle mapping a number of data channels to a number of different frame sizes including STS-12, STS-48, STS-192 and STS-768. The processor supports virtual concatenation with arbitrary channel mapping at both STS-1 and STS-3c granularities. The processor also supports contiguous concatenation with STS-12c, STS-24c, STS-48c, STS-192c, etc. capacities (i.e., STS-Nc where N is a multiple of 3). In addition, the processor supports mixed concatenation where some channels are using contiguous concatenation and some other channels are using STS-3c-Xv virtual concatenation. Alternatively, the processor is able to support any virtual concatenation, any contiguous concatenation and any mixed concatenation.

Abstract: According to the invention, an ATM cell format extender or converter includes a memory and write and read state machines which are symmetric as facilitated by the memory and signals applied to the state machines. The write state machine receives information defining the format of an incoming ATM cell, and, in response, sequences through a first selected state sequence. While in each state of the selected sequence, the write state machine decodes a particular address in memory in which an associated byte of the incoming cell is stored. The read state machine receives information defining the format of an outgoing ATM cell, and, in response, sequences through a second selected state sequence. While in each state of the selected sequence, the read state machine decodes a particular address in the memory from which an associated byte of the outgoing cell is retrieved, thereby to construct the outgoing cell. The read and write state machines are preferably identical.

Abstract: A catalyst suitable for the treatment of automotive engine exhaust exhibiting enhanced oxygen storage capacity. The catalyst composition contains, in addition to a catalytic material such as one or more of platinum, rhodium and palladium dispersed on an activated alumina support, an oxygen storage component ("OSC") which is an intimately mixed oxide of ceria and praseodymia having a Pr:Ce atomic ratio in the range of about 2:100 to 100:100 and optionally containing one or more other rare earth metal oxides. The OSC is segregated from the catalytic material and may optionally have dispersed thereon a limited amount of a second catalytic metal component, such as platinum, rhodium and/or palladium. The intimately mixed oxide may be formed by co-precipitation by impregnation of bulk ceria particles with a praseodymium precursor, or any other method to form an intimately mixed oxide. The OSC may comprise at least about 5% by weight of the combined weight of the OSC and the catalytic component.

Abstract: A catalytic material effective for the reduction of NO.sub.x and the oxidation of at least carbon monoxide includes an oxygen storage component that provides superior oxygen storage function. The oxygen storage component includes an intimately combined mixed oxides including cerium, neodymium and zirconium. Typically, the ceria constitutes more than about 30 percent by weight of the ceria plus zirconia in the intimately combined mixed oxide, e.g., from about 32 to 44 weight percent. Preferably, the intimately combined mixed oxide also includes up to about 26 percent neodymia by weight of the ceria, e.g., from 18.6 to 23.5 percent. The intimately combined mixed oxide may be a co-formed material that may be prepared by, e.g., co-precipitating compounds of zirconium and the rare earth metal and calcining the co-precipitate.