Abstract: A method includes receiving from a client device a request for content, and transmitting to the client device a first content item, a second content item, and a script for displaying the first and second content items within an information resource. The script includes instructions that cause the client device to (1) display the first content item within a content slot having a first size occupying a first region of the information resource, (2) identify a user interaction associated with the first content item, (3) expand, responsive to the user interaction associated with the first content item, the content slot from a first size to a second size, and (4) display, responsive to the user interaction and in the expanded content slot, the first content item and the second content item and an actionable object configured to reduce the content slot from the second size to the first size.

Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a base structure. The semiconductor device structure also includes a first epitaxial structure and a second epitaxial structure sandwiching the channel structures. The semiconductor device structure further includes a gate stack wrapped around each of the channel structures and a backside conductive contact connected to the second epitaxial structure. A first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure. In addition, the semiconductor device structure includes an insulating spacer between a sidewall of the base structure and the backside conductive contact.

Abstract: A data retry-read method, a memory storage device, and a memory control circuit element are provided. The method includes: detecting a notification signal from a volatile memory module; in response to the notification signal, instructing the volatile memory module to execute N command sequences in a buffer; and after the volatile memory module executes the N command sequences, sending at least one read command sequence, according to M physical addresses involved in the N command sequences, to instruct the volatile memory module to read first data from the M physical addresses.

Abstract: The present disclosure describes a method to form a backside power rail (BPR) semiconductor device with an air gap. The method includes forming a fin structure on a first side of a substrate, forming a source/drain (S/D) region adjacent to the fin structure, forming a first S/D contact structure on the first side of the substrate and in contact with the S/D region, and forming a capping structure on the first S/D contact structure. The method further includes removing a portion of the first S/D contact structure through the capping structure to form an air gap and forming a second S/D contact structure on a second side of the substrate and in contact with the S/D region. The second side is opposite to the first side.

Abstract: The present disclosure relates to systems and methods for video analysis. The systems may obtain a video stream. For each of a plurality of frames in the video stream, the systems may determine a reference score corresponding to the frame based on a spatiotemporal feature of the frame. The spatiotemporal feature of the frame may associate a feature of the frame with a feature of at least one adjacent frame of the frame. The systems may determine, from the plurality of frames in the video stream, one or more target frames based on reference scores corresponding to the plurality of frames.

Abstract: Provided is a functional edible oil (FEO), a preparation method therefor and use thereof. The FEO is prepared by ternary transesterification of medium-chain triglycerides (MCTs), oils rich in linoleic acid, and oils rich in linolenic acid. The fatty acid composition and distribution of the FEO were determined and optimized via comparative analysis of indexes such as melting point, and effect of improving glucose and lipid metabolism as determined by animal tests. The FEO has a mass ratio of 2.3 to 4.0 for medium chain fatty acids (MCFAs) in MCTs to long chain fatty acids (LCFAs) in the oils rich in linoleic acid, and oils rich in linolenic acid and a mass ratio of 0.5 to 1.0 for linoleic acid to linolenic acid in the LCFAs, by mass of fatty acids. The FEO is added to food products at ?18.00%.

Abstract: A computing device includes a processor and a medium storing instructions. The instructions are executable by the processor to: in response to a receipt of an electronic request comprising one or more structured data fields and one or more unstructured data fields, identify a set of previous electronic requests using the one or more structured data fields of the received electronic request; train a probabilistic classification model using at least one structured data field of the identified set of previous electronic requests; execute the trained probabilistic classification model using the one or more unstructured data fields of the received electronic request; and automatically select a request handler using an output of the executed probabilistic classification model.

Abstract: Provided are a channel state information transmission method, a channel state information receiving method, a signaling information transmission method, a node and a medium. The channel state information sending method is applied to a first communication node and includes the following. M downlink measurement reference signal resources are determined, where M is a positive integer greater than 1; one set of channel state information is determined according to the M downlink measurement reference signal resources; and the one set of channel state information is sent.

Abstract: A display substrate includes an underlaying substrate, a display structure layer arranged on the underlaying substrate, and a light regulation layer arranged at a light exiting side of the display structure layer. The display structure layer includes multiple sub-pixels. An orthographic projection of the light regulation layer on the underlaying substrate does not overlap with opening regions of the multiple sub-pixels. The light regulation layer is configured to adjust an emergent direction of light of at least one color emitted from the display structure layer.

Abstract: This application relates to a pulse modulation control system, device, and method. The system includes a processor based on a RISC-V open-source instruction set architecture and a pulse modulation interface module. The processor is configured to receive an operation instruction of a user, and generate a data signal based on the operation instruction. The pulse modulation interface module is connected to the processor, and is configured to receive the data signal and output a preset waveform based on the data signal. Based on the RISC-V open-source instruction set architecture, the user may customize operations, which improves efficiency and flexibility of a pulse modulation process, and optimizes power consumption.

Abstract: Disclosed herein are methods and systems for generating a merged dataset, comprising: accessing data comprising a core dataset and an additional dataset; identifying a plurality of common attributes between the core dataset and the additional dataset; determining a plurality of similarity scores between an inquiring entity in the core dataset and a plurality of candidate entities in the additional dataset, including, for each candidate entity of the plurality of candidate entities: calculating a similarity score for the candidate entity based at least in part on a distance-based score and a weight influence score; selecting one or more matches for the inquiring entity in the core dataset from the plurality of candidate entities in the additional dataset based at least in part on the plurality of similarity scores; and generating the merged dataset by adding the one or more selected matches for the inquiring entity to the core dataset.

Abstract: A semiconductor device structure includes a source/drain feature comprising a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface. The structure also includes a dielectric layer having a continuous surface in contact with the entire second surface of the source/drain feature, a semiconductor layer having a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface, wherein the sidewall of the semiconductor layer is in contact with the sidewall of the source/drain feature. The structure also includes a gate dielectric layer in contact with the continuous surface of the dielectric layer and the second surface of the semiconductor layer, and a gate electrode layer surrounding a portion of the semiconductor layer.

Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.

Abstract: A full voltage sampling circuit includes a main sampling circuit, an assist sampling circuit and a processing circuit. The main sampling circuit receives first and second input voltages, and outputs a first sampling signal according to the first and second input voltages. The first sampling signal represents a differential voltage which indicates a difference between the first input voltage and the second input voltage. The assist sampling circuit receives the first and second input voltages, and outputs a second sampling signal according to the first and second input voltages. The second sampling signal represents the differential voltage. The processing circuit is coupled to the main sampling circuit and the assist sampling circuit, and selects a larger one of currents or voltages of the first and second sampling signals as a sampling result to be outputted.

Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.

Abstract: A method of forming a semiconductor transistor device. The method comprises forming a channel structure over a substrate and forming a first source/drain structure and a second source/drain structure on opposite sides of the fin structure. The method further comprises forming a gate structure surrounding the fin structure. The method further comprises flipping and partially removing the substrate to form a back-side capping trench while leaving a lower portion of the substrate along upper sidewalls of the first source/drain structure and the second source/drain structure as a protective spacer. The method further comprises forming a back-side dielectric cap in the back-side capping trench.

Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes a substrate. A gate electrode is over the substrate and a spacer structure laterally surrounds the gate electrode. A conductive via is disposed on the gate electrode. A liner is arranged along one or more sidewalls of the spacer structure. The conductive via has a bottommost surface that has a larger width than a part of the conductive via that is laterally adjacent to one or more interior sidewalls of the liner.

Abstract: Disclosed is a base oil for functional food oils and fats, a preparation method therefor and the use thereof. The base oil for functional food oils and fats is formed through ternary transesterification on medium-chain triglycerides, high-melting-point fat and oils rich in linolenic acid. The base oil for functional food oils and fats has a wide melting range, can significantly improve the glucose and lipid metabolism disorder, balance the essential and functional fatty acids in the body, and quickly replenish energy. Animal experiments were conducted and the fatty acid composition and distribution of the base oil were optimized and determined through comparative analysis based on evaluation indicators such as the improved effect in glucose and lipid metabolism and melting point.

Abstract: In some embodiments, the present disclosure relates to a method that includes forming a dielectric layer over a substrate and patterning the dielectric to form an opening in the dielectric layer. Further, a conductive material is formed within the opening of the dielectric layer. A planarization process is performed to remove portions of the conductive material arranged over the dielectric layer thereby forming a conductive feature within the opening of the dielectric layer. An anti-oxidation layer is formed on upper surfaces of the conductive feature, and then, the anti-oxidation layer is removed.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first insulating layer over a substrate. A first metal feature is formed in the first insulating layer and a second insulating layer is formed over the first insulating layer. A first metal via is formed through the second insulating layer to connect the first metal feature. A second metal feature is formed over the second insulating layer. The second metal feature has a convex top surface and a plane bottom surface, and the plane bottom is electrically connected to the first metal feature through the first metal via.