Abstract: A wear state online monitoring method and system based on transfer learning and multi-source information fusion are provided. The method includes: separately collecting data of a friction pair to be monitored in a friction and wear testing state and in an on-ship state; performing feature extraction on the data of the friction pair to be monitored; based on the extracted features, performing feature transferring through transfer learning to obtain successfully transferred features; training a random forest model by using the successfully transferred features, and performing wear state monitoring by using the trained random forest model. The application achieves online monitoring of the wear states of the shafting, gearbox, and wear-prone components in marine and aerospace power plants.

Abstract: A deep state space generative model is augmented with intervention prediction. The state space model provides a principled way to capture the interactions among observations, interventions, critical event occurrences, true states, and associated uncertainty. The state space model can include a discrete-time hazard rate model that provides flexible fitting of general survival time distributions. The state space model can output a joint prediction of event risk, observation and intervention trajectories based on patterns in temporal progressions, and correlations between past measurements and interventions.

Abstract: The application relates to an electrode layer, a capacitor and methods for electrode layer and capacitor manufacture. The method for electrode layer manufacture comprises the following steps: forming a first electrode layer, the first electrode layer comprising a doped Titanium Nitride (TiN) layer; and forming a second electrode layer on the surface of the first electrode layer, the second electrode layer comprising a TiN layer or a work function layer.

Abstract: A multifunctional controllable multi-layer co-extruded biodegradable mulching film and a preparation method thereof. The multifunctional controllable multi-layer co-extruded biodegradable mulching film sequentially includes a skeleton layer, a functional layer and a controlled release layer from top to bottom; the skeleton layer, functional layer and controlled release layer are all based on PBAT and PLA (polylactic acid) resin; the raw materials of the skeleton layer also include reinforcing and toughening master batches; the raw materials of the functional layer also include functional master batches; the raw materials of the controlled release layer also include starch-based derivatives. The mulching film is prepared by multi-layer co-extrusion technology.

Abstract: In one example, a semiconductor device includes a conductive layer, composite structures, conductive posts and first pads. The composite structures may be located on the conductive layer and stacked in a direction perpendicular to the plane in which the conductive layer is located. The composite structure may include a chip, an insulating layer surrounding around the chip, and at least one second pad electrically connected with the chip. The second pad is located on the insulating layer. The second pads of the composite structures are at different locations in the first direction. The first direction is perpendicular to the thickness direction of the composite structures. The conductive posts are located in the insulating layer of the composite structures and each conductive post is connected with one of the second pads and one of the first pads.

Abstract: An electrochemical device including a cathode, an anode and an electrolyte. The anode includes an anode active material layer, and the contact angle of the anode active material layer relative to a non-aqueous solvent is not greater than 60° as measured by a contact angle measurement. The electrochemical device has improved cycle performance.

Abstract: A package substrate may include a circuit and a leaky surface wave launcher. The circuit may perform engineering tests and end-user operations using sideband signals. The leaky surface wave launcher may perform near field wireless communication. The leaky surface wave launcher may include a via and a strip line. The via may be electrically coupled to the circuit. The via may provide the sideband signals to and receive the sideband signals from the circuit. The strip line may be electrically coupled to the via. The strip line may be excited by the sideband signals to wirelessly couple the leaky surface wave launcher with an external device. The strip line and the via may be unbalanced such that the strip line generates a leaky wave that propagates at least a portion of the package substrate and an environment proximate the package substrate.

Abstract: Disclosed herein is a lens antenna system that includes a reconfigurable aperture configured to receive a source beam. The reconfigurable aperture also provides an output beam based on a surface impedance distribution of the reconfigurable aperture and the received source beam. The control device is operatively coupled to the reconfigurable aperture, wherein the control device is configured to control the surface impedance distribution of the reconfigurable aperture to configure and reconfigure a beam pattern of the output beam. A plurality of antenna elements may be physically positioned proximate the reconfigurable aperture, wherein the plurality of antennas may be configured to generate the source beam.

Abstract: A route planning method includes displaying a perspective switching control and a current perspective display area on a route planning interface. The perspective switching control is configured to switch a current perspective image in the current perspective display area from a first perspective image to a second perspective image in response to a perspective switching instruction. The first perspective image is one of a plurality of perspective images including a first-person perspective image and a third-person perspective image. The second perspective image is another one of the plurality of perspective images. The method further includes, in response to a waypoint creation instruction, creating a waypoint based on a position of a movable platform in the current perspective image.

Abstract: A model establishment method and a related apparatus are provided. The method includes: obtaining projected coordinates of N vertices that are in an original model and that are projected on a target plane; determining M vertices from the N vertices, wherein m is a positive integer greater than or equal to 3 and less than or equal to N; and establishing, based on projected coordinates of the M vertices and height information of the original model, a proxy model corresponding to the original model. According to the application, the proxy model of the original model may be established. The proxy model retains details of the original model, but includes fewer vertices, which simplifies a structure.

Abstract: An embodiment of a semiconductor package apparatus may include technology to pre-process an image to simplify a background of the image, and perform object detection on the pre-processed image with the simplified background. For example, an embodiment of a semiconductor package may include technology to pre-process an image to subtract the background from the image and perform object detection on the pre-processed image with the background subtracted. Other embodiments are disclosed and claimed.

Abstract: The present disclosure relates to a potting adhesive, including: a component A and a component B, the component A including a first liquid organic adhesive containing dimethyl siloxane, the component B including a second liquid organic adhesive containing methyl hydrogen siloxane and silicone oil, at least one of the component A and the component B further including ceramic particles which are spherical particles with a particle size of 0.1 mm to 3 mm. The present disclosure further relates to a heat dissipation device, including an adhesive potting groove, a transformer provided in the adhesive potting groove, and a filling medium which fills and is consolidated in a gap between the transformer and the adhesive potting groove.

Abstract: A method for manufacturing a memory includes the following steps. A substrate and bit line contact layers are provided. Pseudo bit line structures are formed at tops of the bit line contact layers. Sacrificial layers filling regions between adjacent bit line structures are formed, and the sacrificial layers are located on side walls of the pseudo bit line structures and side walls of the bit line contact layers. After forming the sacrificial layers, the pseudo bit line structures are removed to form through holes exposing the bit line contact layers. Bit line conductive parts filling the through holes and covering the bit line contact layers are formed.

Abstract: The present application provides a detection method of metal impurity in wafer. The method comprises conducting a medium temperature thermal treatment for a first predicted time period to the wafer, cooling the wafer and conducting a low temperature thermal treatment for a second predicted time period, cooling the wafer to ambient temperature; providing a liquid of vapor phase decomposition on the wafer to collect metal impurities; atomizing the liquid containing the collected metal impurities, conducting an inductively coupled plasma mass spectrometry analysis and obtaining concentrations of the metal impurities. The present application applies the combination of various thermal treatment without an interrupt of cooling to ambient temperature to contemplate diffusions of various metal impurities to the wafer surface. Accordingly, the detection of metal impurities can be conducted with reduced time cost and enhanced efficiency.

Abstract: Methods, apparatus, systems and articles of manufacture to deduplicate duplicate memory in a cloud-computing environment are disclosed herein. An example apparatus to deduplicate duplicate memory comprises a parser to parse process information corresponding to instances of an application, a group generator to group process information into application groups based on the process information indicating instances corresponding to the same directory paths and application names, a data structure generator to generate a pair of binary search trees for an application group, and a merge controller to deduplicate duplicate memory contents detected in the application group.

Abstract: An apparatus may include a substrate including: a first antenna configured to form a first short range wireless interconnection with a first antenna of a further substrate, a second antenna spaced apart from the first antenna, the second antenna is configured to form a second short range wireless interconnection with a second antenna of the further substrate, and a metamaterial configured to form a surface with effective negative permeability within a space formed between a surface of the substrate and a surface of the further substrate for an established short range wireless interconnection of the first short range wireless interconnection and the second short range wireless interconnection.

Abstract: A power converter comprises a chassis and an AC connector, a low-voltage DC connector and a high-voltage DC connector at an exterior surface of the chassis. An AC-DC converter circuit is positioned at least partially within the chassis and is coupled to the AC connector. A first converter circuit is positioned at least partially within the chassis and is coupled to the AC-DC converter circuit and to a high-voltage DC bus. The high-voltage DC bus is connected to the high-voltage DC connector. A second converter circuit is positioned at least partially within the chassis and is coupled to the high-voltage DC bus to a low-voltage DC bus. The low-voltage DC bus is connected to the low-voltage DC connector.

Abstract: A substrate structure of the memory, and a method for preparing the substrate structure of the memory are provided. The method includes: providing a substrate; forming a first mask layer on the substrate, the first mask layer including a plurality of strip patterns extending in a direction and spaced apart from each other; forming a first dielectric layer covering the first mask layer; forming a plurality of sacrificial portions spaced apart from each other in the first dielectric layer and covering a portion of the plurality of strip patterns; filling gaps between the sacrificial portions with a second dielectric material; forming a second mask layer by removing the sacrificial portions while retaining the second dielectric material in the gaps; and performing layer-by-layer etching into the substrate to form a plurality of active areas arranged in an array.

Abstract: In various aspects, a package system includes at least a first package and a second package arranged on a same side of the package carrier. Each of the first package and the second package comprises an antenna to transmit and/or receive radio frequency signals. A cover may be arranged at a distance over the first package and the second package at the same side of the package carrier as the first package and the second package. The cover comprises at least one conductive element forming a predefined pattern on a side of the cover facing the first package and the second package. The predefined pattern is configured as a frequency selective surface. The package system further includes a radio frequency signal interface wirelessly connecting the antennas of the first package and the second package. The radio frequency signal interface comprises the at least one conductive element.

Abstract: A method for manufacturing a memory includes the following operations. A substrate and a plurality of separate initial bit line contact structures are provided, in which a plurality of active regions are formed in the substrate, and each of the initial bit line contact structures is electrically connected with the active regions, and each of the initial bit line contact structures is partially located in the substrate. Pseudo-bit line structures on the tops of the initial bit line contact structures are formed. The initial bit line contact structures are etched to form bit line contact layers and gaps between the substrate and the side walls of the bit line contact layers. First dielectric layers are formed on the side walls of the pseudo-bit line structures, in which the first dielectric layers are also located right above the gaps.