Abstract: Techniques are provided for reducing current consumption while programming non-volatile storage. A smart verify is performed using a subset of memory cells. By applying the smart verify to just a subset of the memory cells current is saved. The smart verify may be used to characterize programming speed. Results of the smart verify may be used to determine a magnitude of a dummy program pulse to be applied later in the programming process. The dummy program pulse is not followed by a program verify, which reduces current. If the dummy program pulse pushes threshold voltages high enough, then those memory cells will not conduct a current when verifying later in programming. Thus, current is saved during the program verify. Also, bit lines of memory cells that received the dummy pulses do not need to be pre-charged prior to a program pulse, which can save more current.

Abstract: Systems and methods for performing partial block erase operations on a subset of word lines within a memory array prior to performing data refreshing or open-block programming are described. In some cases, data stored in memory cells connected to a word line with a fail bit count above an error threshold (e.g., more than two bit errors per page or more than three bit errors per word line) may be refreshed by performing a read operation on the memory cells, generating corrected data for the memory cells, performing a partial block erase operation on one or more word lines including the word line, and then writing the corrected data into the memory cells. The one or more word lines may include the word line with the fail bit count above the error threshold and an adjacent word line that is adjacent to the word line.

Abstract: A memory device includes memory cells arranged in word lines. Due to variations in the fabrication process, with width and spacing between word lines can vary, resulting in widened threshold voltage distributions. In one approach, a programming parameter is optimized for each word line based on a measurement of the threshold voltage distributions in an initial programming operation. An adjustment to the programming parameter of a word line can be based, e.g., on measurements from adjacent word lines, and a position of the word line in a set of word lines. The programming parameter can include a programming mode such as a number of programming passes. Moreover, the programming parameters from one set of word lines can be used for another set of word lines having a similar physical layout due to the variations in the fabrication process.

Abstract: A storage device with a memory may include read disturb detection for open blocks. An open or partially programmed block may develop read disturb errors from reading of the programmed portion of the open block. The detection of any read disturb effects may be necessary for continued programming of the open block and may include verifying that wordlines in the unprogrammed portion of the open block are in the erase state. A modified erase verify operation for the open block is used in which programmed wordlines are subject to a higher erase verify read voltage, while the unprogrammed wordlines are subject to an erase verify bias voltage.

Abstract: A method is provided for programming non-volatile memory cells. The non-volatile memory cells are accessible by a plurality of word lines. The method includes using a four-pass programming technique to program a block of the non-volatile memory cells.

Abstract: A storage device with a memory may include read disturb detection for open blocks. An open or partially programmed block may develop read disturb errors from reading of the programmed portion of the open block. The detection of any read disturb effects may be necessary for continued programming of the open block and may include verifying that wordlines in the unprogrammed portion of the open block are in the erase state. A modified erase verify operation for the open block is used in which programmed wordlines are subject to a higher erase verify read voltage, while the unprogrammed wordlines are subject to an erase verify bias voltage.

Abstract: Techniques for recovery of partially programmed blocks in non-volatile storage are disclosed. After programming memory cells in an open region of a partially programmed block, a fail bit count with respect to programming the memory cells is performed. If the fail bit count is above a threshold, then a recovery operation is performed of other memory cells in the partially programmed block. The recovery operation (such as erase) may remove charges that are trapped in the tunnel dielectric of memory cells in the open region of the partially programmed block. Note that this erase operation may be performed on memory cells in the open region that are already erased. The erase operation may remove trapped charges from the tunnel dielectric. In a sense, this “resets” the memory cells. Thus, the memory cells can now be programmed more effectively. Both programming and date retention may be improved.

Abstract: Systems and methods for performing partial block erase operations on a subset of word lines within a memory array prior to performing data refreshing or open-block programming are described. In some cases, data stored in memory cells connected to a word line with a fail bit count above an error threshold (e.g., more than two bit errors per page or more than three bit errors per word line) may be refreshed by performing a read operation on the memory cells, generating corrected data for the memory cells, performing a partial block erase operation on one or more word lines including the word line, and then writing the corrected data into the memory cells. The one or more word lines may include the word line with the fail bit count above the error threshold and an adjacent word line that is adjacent to the word line.

Abstract: A method is provided for programming non-volatile memory cells. The non-volatile memory cells are accessible by a plurality of word lines. The method includes using a four-pass programming technique to program a block of the non-volatile memory cells.

Abstract: A water spray gun, including: a gun body, a valve switch, and a device for switching a spray pattern. The gun body includes: a water passage and double water hole. The valve switch includes: a button, a pressing piece including a unilaterally oblique plane, a rear plate including an inner guide rail, a rotating piece including a unilaterally oblique plane, a first spring, a front sealing ring, a switch rotating core, and a double sealing ring. The device for switching a spray pattern includes a water spray cap, a water spray plate, a decentered interface, a second spring, a wedge rotating piece for water diversion including a plurality of negative wedge blocks each including a negative wedge, a wedge push rod including a plurality of positive wedge blocks each including a positive wedge, a housing of a gun head, and a trigger.

Abstract: Techniques for efficiently programming non-volatile storage are disclosed. A second page of data may efficiently be programmed into memory cells that already store a first page. Data may be efficiently transferred from single bit cells to multi-bit cells. Memory cells are read using at least two different read levels. The results are compared to determine a count how many memory cells showed a different result between the two reads. If the count is less than a threshold, then data from the memory cells is stored into a set of data latches without attempting to correct for misreads. If the count is not less than the threshold, then data from the memory cells is stored into the set of data latches with attempting to correct for misreads. A programming operation may be performed based on the data stored in the set of data latches.

Abstract: Techniques are disclosed herein for performing an Internal Data Load (IDL) to sense non-volatile storage elements. Read pass voltages that are applied to the two neighbor word lines to a selected word line may be adjusted to result in a more accurate IDL. The read pass voltage for one neighbor may be increased by some delta voltage, whereas the read pass voltage for the other neighbor may be decreased by the same delta voltage. In one aspect, programming of an upper page of data into a word line that neighbors a target word line is halted to allow lower page data in the target memory cells to be read using an IDL and preserved in data latches while programming the upper page in the neighbor word completes. Preservation of the lower page data provides for a cleaner lower page when later programming the upper page into the target memory cells.

Abstract: A method of determining whether a page of NAND flash memory cells is in an erased condition includes applying a first set of read conditions to identify a first number of cells having threshold voltages above a discrimination voltage under the first set of read conditions, if the first number of cells is less than a first predetermined number, applying a second set of read conditions that is different from the first set of read conditions to identify a second number of cells having threshold voltages above the discrimination voltage under the second set of read conditions, and if the second number of cells exceeds a second predetermined number, marking the page of flash memory cells as partially programmed.

Abstract: Techniques for efficiently programming non-volatile storage are disclosed. A second page of data may efficiently be programmed into memory cells that already store a first page. Data may be efficiently transferred from single bit cells to multi-bit cells. Memory cells are read using at least two different read levels. The results are compared to determine a count how many memory cells showed a different result between the two reads. If the count is less than a threshold, then data from the memory cells is stored into a set of data latches without attempting to correct for misreads. If the count is not less than the threshold, then data from the memory cells is stored into the set of data latches with attempting to correct for misreads. A programming operation may be performed based on the data stored in the set of data latches.

Abstract: Techniques are disclosed herein for performing an Internal Data Load (IDL) to sense non-volatile storage elements. Read pass voltages that are applied to the two neighbor word lines to a selected word line may be adjusted to result in a more accurate IDL. The read pass voltage for one neighbor may be increased by some delta voltage, whereas the read pass voltage for the other neighbor may be decreased by the same delta voltage. In one aspect, programming of an upper page of data into a word line that neighbors a target word line is halted to allow lower page data in the target memory cells to be read using an IDL and preserved in data latches while programming the upper page in the neighbor word completes. Preservation of the lower page data provides for a cleaner lower page when later programming the upper page into the target memory cells.

Abstract: A water spray gun, including: a gun body, a valve switch, and a device for switching a spray pattern. The gun body includes: a water passage and double water hole. The valve switch includes: a button, a pressing piece including a unilaterally oblique plane, a rear plate including an inner guide rail, a rotating piece including a unilaterally oblique plane, a first spring, a front sealing ring, a switch rotating core, and a double sealing ring. The device for switching a spray pattern includes a water spray cap, a water spray plate, a decentered interface, a second spring, a wedge rotating piece for water diversion including a plurality of negative wedge blocks each including a negative wedge, a wedge push rod including a plurality of positive wedge blocks each including a positive wedge, a housing of a gun head, and a trigger.

Abstract: Techniques are disclosed herein for performing an Internal Data Load (IDL) to sense non-volatile storage elements. Read pass voltages that are applied to the two neighbor word lines to a selected word line may be adjusted to result in a more accurate IDL. The read pass voltage for one neighbor may be increased by some delta voltage, whereas the read pass voltage for the other neighbor may be decreased by the same delta voltage. In one aspect, programming of an upper page of data into a word line that neighbors a target word line is halted to allow lower page data in the target memory cells to be read using an IDL and preserved in data latches while programming the upper page in the neighbor word completes. Preservation of the lower page data provides for a cleaner lower page when later programming the upper page into the target memory cells.

Abstract: Techniques are disclosed herein for performing an Internal Data Load (IDL) to sense non-volatile storage elements. Read pass voltages that are applied to the two neighbor word lines to a selected word line may be adjusted to result in a more accurate IDL. The read pass voltage for one neighbor may be increased by some delta voltage, whereas the read pass voltage for the other neighbor may be decreased by the same delta voltage. In one aspect, programming of an upper page of data into a word line that neighbors a target word line is halted to allow lower page data in the target memory cells to be read using an IDL and preserved in data latches while programming the upper page in the neighbor word completes. Preservation of the lower page data provides for a cleaner lower page when later programming the upper page into the target memory cells.

Abstract: Memory cells that are indicated as being erased but are suspected of being partially programmed may be subject to a verification scheme that first performs a conventional read and then, if the conventional read does not indicate partial programming, performs a second read using lower read-pass voltage on at least one neighboring word line.

Abstract: Techniques for efficiently programming non-volatile storage are disclosed. A second page of data may efficiently be programmed into memory cells that already store a first page. Data may be efficiently transferred from single bit cells to multi-bit cells. Memory cells are read using at least two different read levels. The results are compared to determine a count how many memory cells showed a different result between the two reads. If the count is less than a threshold, then data from the memory cells is stored into a set of data latches without attempting to correct for misreads. If the count is not less than the threshold, then data from the memory cells is stored into the set of data latches with attempting to correct for misreads. A programming operation may be performed based on the data stored in the set of data latches.