Patents by Inventor Zhenming Zhou

Zhenming Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220115084
    Abstract: A first sequence of operations corresponding to an error recovery process of a memory sub-system is determined. A value corresponding to an operating characteristic of a memory sub-system is determined, the operating characteristic corresponding to execution of a first sequence of operations of an error recovery process. A determination is made that the value satisfies a condition. In response to the value satisfying the first condition, a second sequence of operations corresponding to the error recovery process is executed.
    Type: Application
    Filed: December 21, 2021
    Publication date: April 14, 2022
    Inventors: Zhongguang Xu, Murong Lang, Zhenming Zhou
  • Publication number: 20220066924
    Abstract: A processing device of a memory sub-system performs an operation including obtaining, at a first time, a first scaling factor for a data unit of a set of data units of a memory device. The first scaling factor is associated with a first number of write operations performed at the data unit and a first number of read operations performed at the data unit. The processing device also performs an operation including calculating a first media management metric based on at least the first scaling factor, the first number of write operations, and the first number of read operations. In response to determining that the first media management metric satisfies a media management criterion, the processing device performs a media management operation on the data unit.
    Type: Application
    Filed: August 27, 2020
    Publication date: March 3, 2022
    Inventors: Mikai Chen, Zhenlei Shen, Murong Lang, Zhenming Zhou
  • Publication number: 20220058070
    Abstract: A command to read specific data stored at a memory die is received. A read operation is performed while operating both a memory controller and the memory die simultaneously at a first frequency. A processor determines whether a first error rate associated with the memory die satisfies a first error threshold criterion (e.g., UECC). Responsive to determining that the first error rate satisfies the first error threshold criterion, the read operation is repeated while operating at least one of the memory controller or the memory die at a second frequency that is different from the first frequency. The processor determines whether a second error rate associated with the memory die satisfies a second error threshold criterion. Responsive to determining that the second error rate satisfies the second error threshold criterion (e.g. UECC persists), determining that the read operation has failed.
    Type: Application
    Filed: August 18, 2020
    Publication date: February 24, 2022
    Inventors: Jian HUANG, Zhenming ZHOU, Zhongguang Xu, Murong Lang
  • Publication number: 20220050618
    Abstract: A method includes performing a quantity of write cycles on memory components. The method can further include monitoring codewords, and, for each of the codewords including a first error parameter value, determining a second error parameter value. The method can further include determining a probability that each of the codewords is associated with a particular one of the second error parameter values at the first error parameter value and determining a quantity of each of the codewords that are associated with each of the determined probabilities. The method can further include determining a statistical boundary of the quantity of each of the codewords and determining a correlation between the quantity of write cycles performed and the corresponding determined statistical boundary of the quantity of each of the codewords.
    Type: Application
    Filed: August 11, 2020
    Publication date: February 17, 2022
    Inventors: Mikai Chen, Murong Lang, Zhenming Zhou
  • Publication number: 20220051749
    Abstract: A system includes a memory component, and a processing device coupled with the memory component. The processing device to identify a group of management units of the memory component, wherein the group of management units is included in a set of retired groups of management units, select a management unit from the group of management units, perform a media integrity check on the management unit to determine a failed bit count of the management unit, and in response to the failed bit count of the management unit failing to satisfy a threshold criterion, remove the group of management units from the set of retired groups of management units.
    Type: Application
    Filed: October 28, 2021
    Publication date: February 17, 2022
    Inventors: Jian Huang, Zhenming Zhou
  • Publication number: 20220043588
    Abstract: A processing device receives a series of commands associated with a memory device. The memory device includes memory cells that are distributed among multiple planes. The processing device identifies a respective plane to which each command is directed, and places a respective set of commands directed to the respective plane in a corresponding queue associated with the respective plane. A first set of commands placed in a first queue associated with a first plane are processed first. Responsive to determining that a predetermined criterion is satisfied, a second set of commands placed in a second queue associated with a second plane are processed. To minimize having to switch between different planes while responding to read/write commands, wear-leveling is restricted to each plane using overprovisioning capacity in each plane.
    Type: Application
    Filed: August 6, 2020
    Publication date: February 10, 2022
    Inventors: Jian HUANG, Zhenming ZHOU
  • Publication number: 20220043493
    Abstract: A method includes monitoring temperature characteristics for a plurality of memory components of a memory sub-system and determining that a temperature characteristic corresponding to at least one of the memory components has reached a threshold temperature. The method further includes determining a data reliability parameter for the at least one of the memory components that has reached the threshold temperature, determining whether the determined data reliability parameter is below a threshold data reliability parameter value for the at least one of the memory components that has reached the threshold temperature, and, based on determining that the data reliability parameter for the at least one of the memory components that has reached the threshold temperature is below the threshold data reliability parameter value, refraining from performing a thermal throttling operation.
    Type: Application
    Filed: August 10, 2020
    Publication date: February 10, 2022
    Inventors: Mikai Chen, Zhenming Zhou, Zhenlei Shen, Murong Lang
  • Publication number: 20220044757
    Abstract: A first sequence of operations corresponding to an error recovery process of a memory sub-system is determined. A value corresponding to an operating characteristic of the memory sub-system is determined. The value is compared to a threshold level corresponding to the first sequence of operations to determine whether a condition is satisfied. In response to satisfying the first condition, a second sequence of operations corresponding to the error recovery process is executed.
    Type: Application
    Filed: August 10, 2020
    Publication date: February 10, 2022
    Inventors: Zhongguang XU, Murong LANG, Zhenming ZHOU
  • Patent number: 11244740
    Abstract: A first sequence of operations corresponding to an error recovery process of a memory sub-system is determined. A value corresponding to an operating characteristic of the memory sub-system is determined. The value is compared to a threshold level corresponding to the first sequence of operations to determine whether a condition is satisfied. In response to satisfying the first condition, a second sequence of operations corresponding to the error recovery process is executed.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: February 8, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Zhongguang Xu, Murong Lang, Zhenming Zhou
  • Patent number: 11238950
    Abstract: An accelerated seasoning cycle criterion is associated with a memory die of a number of memory dies. The memory die is subjected to one or more accelerated seasoning conditions during accelerated seasoning cycles. Responsive to determining that the accelerated seasoning cycle criterion has been satisfied, a defect scan is performed on the memory die. The memory die is associated with a respective reliability bin of a plurality of reliability bins in view of a result of the defect scan, wherein the result of the defect scan satisfies one or more predetermined threshold reliability criteria corresponding to the respective reliability bin.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: February 1, 2022
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Zhongguang Xu, Murong Lang, Zhenming Zhou
  • Publication number: 20220027077
    Abstract: A first operating characteristic and a second operating characteristic of a memory sub-system are determined. A write-to-read delay time is set in view of the first operating characteristic and the second operating characteristic. A read operation associated with a memory unit is executed following a period of at least the write-to-read delay time from a time of an execution of a write operation associated with the memory unit.
    Type: Application
    Filed: July 21, 2020
    Publication date: January 27, 2022
    Inventors: Murong Lang, Tingjun Xie, Wei Wang, Frederick Adi, Zhenming Zhou, Jiangli Zhu
  • Patent number: 11231870
    Abstract: A method includes performing a quantity of write cycles on memory components. The method can further include monitoring codewords, and, for each of the codewords including a first error parameter value, determining a second error parameter value. The method can further include determining a probability that each of the codewords is associated with a particular one of the second error parameter values at the first error parameter value and determining a quantity of each of the codewords that are associated with each of the determined probabilities. The method can further include determining a statistical boundary of the quantity of each of the codewords and determining a correlation between the quantity of write cycles performed and the corresponding determined statistical boundary of the quantity of each of the codewords.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: January 25, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Mikai Chen, Murong Lang, Zhenming Zhou
  • Publication number: 20220019375
    Abstract: A set of temperature measurements corresponding to a set of memory dies of a memory sub-system is collected. The set of temperature measurements includes a temperature measurement determined for each memory die of the set of memory dies. A determination is made whether a first temperature measurement of the set of temperature measurements satisfies a first condition. It is determined whether a temperature variation of the set of temperature measurements satisfies a second condition. In response to a determination that the first temperature measurement satisfies the first condition or the temperature variation satisfies the second condition, a temperature related event is logged. A message is sent to a host system indicating the temperature related event.
    Type: Application
    Filed: July 14, 2020
    Publication date: January 20, 2022
    Inventors: Zhenming Zhou, Jiangli Zhu
  • Publication number: 20220019501
    Abstract: An error associated with a read operation corresponding to a target memory die of a memory sub-system is detected. In response to detecting the error, a first read throughput level of the memory sub-system is identified. The first read throughput level is adjusted to a second read throughput level. A read retry operation associated with the target memory die is executed at the second read throughput level.
    Type: Application
    Filed: July 14, 2020
    Publication date: January 20, 2022
    Inventors: Zhenming Zhou, Jian Huang, Jiangli Zhu
  • Publication number: 20220013192
    Abstract: A value corresponding to an operating characteristic of a memory sub-system is determined. The value is compared to a threshold level to determine whether a condition is satisfied. In response to satisfying the condition, a read scrub operation associated with the memory sub-system is executed.
    Type: Application
    Filed: September 7, 2021
    Publication date: January 13, 2022
    Inventors: Murong Lang, Zhongguang Xu, Zhenming Zhou
  • Publication number: 20220013185
    Abstract: An accelerated seasoning cycle criterion is associated with a memory die of a number of memory dies. The memory die is subjected to one or more accelerated seasoning conditions during accelerated seasoning cycles. Responsive to determining that the accelerated seasoning cycle criterion has been satisfied, a defect scan is performed on the memory die. The memory die is associated with a respective reliability bin of a plurality of reliability bins in view of a result of the defect scan, wherein the result of the defect scan satisfies one or more predetermined threshold reliability criteria corresponding to the respective reliability bin.
    Type: Application
    Filed: July 9, 2020
    Publication date: January 13, 2022
    Inventors: Zhongguang XU, Murong LANG, Zhenming ZHOU
  • Publication number: 20220012121
    Abstract: An initial level of sensing voltage is set based on one or more characteristics of the segment of the memory device. A count for operational cycles for a segment of a memory device is set. Responsive to determining that a number of operational cycles performed on the segment of the memory device has reached the set count of operational cycles, the sensing voltage is varied with respect to the initial level of sensing voltage. The sensing voltage is adjusted to a new level based on wearing of the segment of the memory device during the number of operational cycles performed on the segment of the memory device.
    Type: Application
    Filed: July 9, 2020
    Publication date: January 13, 2022
    Inventors: Zhongguang XU, Murong LANG, Zhenming ZHOU
  • Patent number: 11222710
    Abstract: A method includes determining, for a plurality of memory dice, a signal reliability characteristic and ranking the plurality of memory dice based, at least in part, on the determined reliability characteristics. The method can further include arranging the plurality of memory dice to form a memory device based, at least in part, on the ranking.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: January 11, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Mikai Chen, Zhenming Zhou, Zhenlei Shen, Murong Lang
  • Patent number: 11183267
    Abstract: A system includes a memory component, and a processing device coupled with the memory component. The processing device to identify a group of management units of the memory component, wherein the group of management units is included in a set of retired groups of management units, select a management unit from the group of management units, perform a media integrity check on the management unit to determine a failed bit count of the management unit, and in response to the failed bit count of the management unit failing to satisfy a threshold criterion, remove the group of management units from the set of retired groups of management units.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: November 23, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Jian Huang, Zhenming Zhou
  • Patent number: 11127481
    Abstract: A value corresponding to an operating characteristic of a memory sub-system is determined. The value is compared to a first threshold level to determine whether a first condition is satisfied. The value is also compared to a second threshold level to determine whether a second condition is satisfied. In response to satisfying the first condition, a read scrub operation associated with the memory sub-system is executed. In response to satisfying the second condition, a write scrub operation associated with the memory sub-system is executed.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: September 21, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Murong Lang, Zhongguang Xu, Zhenming Zhou