Patents by Inventor Zhi Qi
Zhi Qi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12101232Abstract: A method, computer system, and a computer program product are provided for dynamic viewing of an operation graph depicting a distributed workload in an Information Technology system. A list may be received as input and may include selected nodes. A sub-graph may be abstracted from a global graph. The sub-graph and the global graph may depict interactions among ops objects of the distributed workload using nodes and edges. First nodes may be removed from the global graph according to the list. Direct edges between remaining nodes from the global graph may be maintained. A first indirect edge may be generated based on the removed first nodes. The first indirect edge may run between a first remaining node and a second remaining node. The sub-graph may be presented removed from the global graph.Type: GrantFiled: December 8, 2020Date of Patent: September 24, 2024Assignee: International Business Machines CorporationInventors: Jia Qi Li, Fan Jing Meng, Zhi Shuai Han
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Publication number: 20240302262Abstract: A method and a system for identifying a glacial lake outburst debris flow (GLODF) are provided. The method is obtained based on considering induced influences of slopes of channels and particle sizes of source particles on the GLODF. The method not only compensates for deficiencies in identifying the GLODF, but also realizes determination of the GLODF, which provides data basis for disaster prevention and control layout such as monitoring and early warning on a glacial lake and assists preventing and managing disasters caused by the GLODF. Meanwhile, multiple parameters used in the method are easy and convenient to obtain, and the parameters can be directly used on site, which saves engineering cost, improves working efficiency, and has high practical and promotional value in environmental protection and disaster prevention and mitigation.Type: ApplicationFiled: March 8, 2024Publication date: September 12, 2024Inventors: Zhi-quan Yang, Zi-xu Zhang, Wen-qi Jiao, Ying-yan Zhu, Muhammad Asif Khan, Yong-shun Han, Li-ping Liao, Jie Zhang, Wen-fei Xi, Han-hua Xu, Tian-bing Xiang, Xin Zhao, Bi-hua Zhang, Shen-zhang Liu, Cheng-yin Ye
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Publication number: 20240252158Abstract: Disclosed is a device for extraction of a resected tissue or the like from a body comprising an elongate portion having a rounded end; a sleeve assembly comprising an anchor portion for contacting a region around the resected tissue when inflated, and a body portion shaped and dimensioned to receive the resected tissue; the body portion comprises a first end, a second end and a pliable sleeve; the first end and the second end each having a respective diameter greater than a desired diameter of the natural orifice or a tissue opening; wherein the pliable sleeve is disposed between the first end and the second end in a manner which a distance between the first end and the second end is adjustable.Type: ApplicationFiled: June 3, 2022Publication date: August 1, 2024Inventors: Fangzhou ZHOU, Zhi Qi YONG, Kobby GREENBERG, Eric HAAS, Barry SALKY, Surendra Kumar MANTOO
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Publication number: 20240258197Abstract: Designs and methods of design of the present disclosure utilize various forms of carbon allotropes to form a carbon allotrope structure such as a graphene foam filling the interior cavity of vias that form part of a semiconductor die. The carbon allotrope structure enables heat generated within a GaN-based device region of the semiconductor die to be dissipated away. In a different embodiment, utilizing other forms of carbon allotropes, a carbon allotrope layer such as graphene layers is formed. The carbon allotrope layer is disposed over a frontside surface of the semiconductor die to provide additional heat dissipation paths for the heat generated within the GaN-based device region. The higher thermal conductivity of the carbon allotrope foam and the carbon allotrope layer allows the heat to be dissipated away from heat-generating semiconductor devices forming part of the device region of the semiconductor die.Type: ApplicationFiled: January 30, 2023Publication date: August 1, 2024Inventors: Christo Bojkov, Michael Roberg, Zhi-Qi Li, Harold Isom
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Patent number: 12002866Abstract: RF devices, and more particularly RF devices with photo-imagable polymers for high frequency enhancements and related methods are disclosed. High frequency enhancements are realized by providing air cavities registered with one or more operating portions of RF devices. The air cavities are formed by photo-imagable polymer structures that provide separation from high dielectric constant materials associated with sealing materials, such as overmold materials, that are typically used for environmental and/or mechanical protection in RF devices. Related methods are disclosed that include forming the photo-imagable polymer structures and corresponding air cavities through various lamination and patterning of photo-imagable polymer layers. Further radiation hardening steps are disclosed that may be applied to the photo-imagable polymer structures after air cavities are formed to promote improved structural integrity of the air cavities during subsequent fabrication steps and during operation of the RF devices.Type: GrantFiled: July 16, 2021Date of Patent: June 4, 2024Assignee: Qorvo US, Inc.Inventors: Christo Bojkov, Zhi-Qi Li, Michael Roberg, Harold Isom
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Patent number: 11848649Abstract: An amplifier includes a first stage and a second stage. The first stage includes a floating current source to maintain current within a threshold. The first stage also includes a local common mode feedback configured to provide gain to an input signal. Moreover, the second stage includes a driver that provides a load current to a load coupled to the amplifier.Type: GrantFiled: April 1, 2022Date of Patent: December 19, 2023Assignee: Micron Technology, Inc.Inventors: Zhi Qi Huang, Wei Lu Chu
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Patent number: 11804255Abstract: A memory device includes a voltage generator configured to generate a reference voltage for transmission to at least one component of the memory device. The voltage generator includes a first input to receive a first signal having a first voltage value. The voltage generator also includes a second input to receive a second signal having a second voltage value. The voltage generator further includes a first circuit configured to generate third voltage and a second circuit coupled to the first circuit to receive the third voltage value, wherein the second circuit receives the first signal and the second signal and is configured to utilize the third voltage value to facilitate comparison of the first voltage value and the second voltage value to generate an output voltage.Type: GrantFiled: August 4, 2021Date of Patent: October 31, 2023Assignee: Micron Technology, Inc.Inventors: Zhi Qi Huang, Wei Lu Chu
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Publication number: 20230318536Abstract: An amplifier includes a first stage and a second stage. The first stage includes a floating current source to maintain current within a threshold. The first stage also includes a local common mode feedback configured to provide gain to an input signal. Moreover, the second stage includes a driver that provides a load current to a load coupled to the amplifier.Type: ApplicationFiled: April 1, 2022Publication date: October 5, 2023Inventors: Zhi Qi Huang, Wei Lu Chu
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Publication number: 20230178139Abstract: A system (100) for providing a timing signal with tunable temperature dependency in an electronic device may include a timing circuit (102) and an initial setting circuit (104). The timing circuit (102) may include a delay stage (106) and a gate stage (108). The delay stage (106) may be configured to receive an input signal and to produce a delayed signal by introducing a delay to the input signal. The gate stage (108) may be configured to receive the delayed signal and a threshold setting signal, to produce an output signal using the delayed signal and a logic threshold, and to set an initial value of the logic threshold according to the threshold setting signal. The initial setting circuit (104) may be configured to allow the threshold setting signal to be tuned for providing the time delay with a specified temperature dependency.Type: ApplicationFiled: May 29, 2020Publication date: June 8, 2023Inventors: Si Hong Kim, Ki-Jun Nam, Zhi Qi Huang, John David Porter
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Patent number: 11632084Abstract: Methods, systems, and devices for operating an amplifier with a controllable pull-down capability are described. A memory device may include a memory array and a power circuit that generates an internal signal for components in the memory array. The power circuit may include an amplifier and a power transistor that is coupled with the amplifier. A pull-down capability of the amplifier may be controllable using an external signal that is based on a difference between a reference signal and the internal signal. The power circuit may also include a comparator that is coupled with the amplifier and configured to compare the reference signal and the internal signal. Components of the comparator may be integrated with components of the amplifier, may share a bias circuit, and may use nodes within the amplifier to control the comparator. A signal output by the comparator may control the pull-down capability of the amplifier.Type: GrantFiled: December 18, 2020Date of Patent: April 18, 2023Assignee: Micron Technology, Inc.Inventors: Wei Lu Chu, Zhi Qi Huang, Dong Pan
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Patent number: 11587602Abstract: Methods, systems, and devices for timing signal delay compensation in a memory device are described. In some memory devices, operations for accessing memory cells may be performed with timing that is asynchronous relative to an input signal. To support asynchronous timing, a memory device may include delay components that support generating a timing signal having aspects that are delayed relative to an input signal. In accordance with examples as disclosed herein, a memory device may include delay components having a variable and configurable impedance, where the configurable impedance may be based at least in part on a configuration signal generated at the memory device. A configuration signal may be generated based on fabrication characteristics of the memory device, or based on operating conditions of the memory device, or various combinations thereof.Type: GrantFiled: November 15, 2021Date of Patent: February 21, 2023Assignee: Micron Technology, Inc.Inventors: Zhi Qi Huang, Wei Lu Chu, Dong Pan
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Publication number: 20230044187Abstract: A memory device includes a voltage generator configured to generate a reference voltage for transmission to at least one component of the memory device. The voltage generator includes a first input to receive a first signal having a first voltage value. The voltage generator also includes a second input to receive a second signal having a second voltage value. The voltage generator further includes a first circuit configured to generate third voltage and a second circuit coupled to the first circuit to receive the third voltage value, wherein the second circuit receives the first signal and the second signal and is configured to utilize the third voltage value to facilitate comparison of the first voltage value and the second voltage value to generate an output voltage.Type: ApplicationFiled: August 4, 2021Publication date: February 9, 2023Inventors: Zhi Qi Huang, Wei Lu Chu
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Patent number: 11571258Abstract: An artificial potential field path planning method and an apparatus based on obstacle classification solve the problem of path and motion uncertainty in steering a flexible needle in soft tissue. The apparatus includes an image sensing system, a control module, an execution system and an upper PC. Using the apparatus, the method includes: the image sensing system obtains real-time images of the puncture environment, identifies a target and obstacles from the real-time images, classifies the obstacles, and calculates total potential energy of points in the current environment based on artificial potential field. With a curvature constraint and an optimization index for the flexible needle, the path planning module carries out static path planning to obtain an initial path and the needle entry point, then conducts dynamic path planning to determine the path for steering the flexible needle in the soft tissue accordingly.Type: GrantFiled: April 21, 2020Date of Patent: February 7, 2023Assignees: BEIHANG UNIVERSITY, SHENZHEN FITCARE ELECTRONICS CO., LTD.Inventors: Hui Zhang, Zhi Qi, Yuedong Cao, Xiaobao Chen
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Publication number: 20230018673Abstract: RF devices, and more particularly RF devices with photo-imageable polymers for high frequency enhancements and related methods are disclosed. High frequency enhancements are realized by providing air cavities registered with one or more operating portions of RF devices. The air cavities are formed by photo-imageable polymer structures that provide separation from high dielectric constant materials associated with sealing materials, such as overmold materials, that are typically used for environmental and/or mechanical protection in RF devices. Related methods are disclosed that include forming the photo-imageable polymer structures and corresponding air cavities through various lamination and patterning of photo-imageable polymer layers. Further radiation hardening steps are disclosed that may be applied to the photo-imageable polymer structures after air cavities are formed to promote improved structural integrity of the air cavities during subsequent fabrication steps and during operation of the RF devices.Type: ApplicationFiled: July 16, 2021Publication date: January 19, 2023Inventors: Christo Bojkov, Zhi-Qi Li, Michael Roberg, Harold Isom
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Publication number: 20220200538Abstract: Methods, systems, and devices for operating an amplifier with a controllable pull-down capability are described. A memory device may include a memory array and a power circuit that generates an internal signal for components in the memory array. The power circuit may include an amplifier and a power transistor that is coupled with the amplifier. A pull-down capability of the amplifier may be controllable using an external signal that is based on a difference between a reference signal and the internal signal. The power circuit may also include a comparator that is coupled with the amplifier and configured to compare the reference signal and the internal signal. Components of the comparator may be integrated with components of the amplifier, may share a bias circuit, and may use nodes within the amplifier to control the comparator. A signal output by the comparator may control the pull-down capability of the amplifier.Type: ApplicationFiled: December 18, 2020Publication date: June 23, 2022Inventors: Wei Lu Chu, Zhi Qi Huang, Dong Pan
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Patent number: 11342906Abstract: Devices for generating a delay output signal are disclosed. A device may include a first delay circuit and a second delay circuit coupled in series between a first node and a second node in a delay path for the device, and having a third node therebetween. The device may also include a third circuit coupled to the third node and configured to charge the third node responsive to detecting a signal has passed through the first node and the third node. Associated semiconductor devices and methods are also disclosed.Type: GrantFiled: March 15, 2021Date of Patent: May 24, 2022Assignee: Micron Technology, Inc.Inventors: Hiroshi Akamatsu, Zhi Qi Huang
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Publication number: 20220157365Abstract: Methods, systems, and devices for timing signal delay for a memory device are described. In some memory devices, operations for accessing memory cells may be performed with timing that is asynchronous relative to an input signal. To support asynchronous timing, a memory device may include delay components that support generating a timing signal having aspects that are delayed relative to an input signal. A memory device may include delay components having a configurable impedance based at least in part on one or more fabrication characteristics of the memory device, one or more operating conditions of the memory device, one or more bias voltages, or a combination thereof.Type: ApplicationFiled: November 19, 2020Publication date: May 19, 2022Inventors: Zhi Qi Huang, Wei Lu Chu, Dong Pan
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Patent number: 11335396Abstract: Methods, systems, and devices for timing signal delay for a memory device are described. In some memory devices, operations for accessing memory cells may be performed with timing that is asynchronous relative to an input signal. To support asynchronous timing, a memory device may include delay components that support generating a timing signal having aspects that are delayed relative to an input signal. A memory device may include delay components having a configurable impedance based at least in part on one or more fabrication characteristics of the memory device, one or more operating conditions of the memory device, one or more bias voltages, or a combination thereof.Type: GrantFiled: November 19, 2020Date of Patent: May 17, 2022Assignee: Micron Technology, Inc.Inventors: Zhi Qi Huang, Wei Lu Chu, Dong Pan
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Patent number: 11325879Abstract: Certain bleached earths improve methods of fatty acid purification.Type: GrantFiled: October 5, 2020Date of Patent: May 10, 2022Assignee: The Procter & Gamble CompanyInventors: Rajesh Kumar Balasubramanian, Mohammad Rasoul Madadi, Jovina Zhi Qi Tan
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Publication number: 20220076720Abstract: Methods, systems, and devices for timing signal delay compensation in a memory device are described. In some memory devices, operations for accessing memory cells may be performed with timing that is asynchronous relative to an input signal. To support asynchronous timing, a memory device may include delay components that support generating a timing signal having aspects that are delayed relative to an input signal. In accordance with examples as disclosed herein, a memory device may include delay components having a variable and configurable impedance, where the configurable impedance may be based at least in part on a configuration signal generated at the memory device. A configuration signal may be generated based on fabrication characteristics of the memory device, or based on operating conditions of the memory device, or various combinations thereof.Type: ApplicationFiled: November 15, 2021Publication date: March 10, 2022Inventors: Zhi Qi Huang, Wei Lu Chu, Dong Pan