Patents by Inventor Zhi Qi

Zhi Qi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10998893
    Abstract: Methods and apparatus for generating a delayed output signal from an input signal applied to an RC delay circuit of a semiconductor device during an active mode. The RC delay circuit is configured to pull up a voltage level on a node responsive to a reset signal during a stand-by mode.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: May 4, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Hiroshi Akamatsu, Zhi Qi Huang
  • Publication number: 20210114965
    Abstract: Certain bleached earths improve methods of fatty acid purification.
    Type: Application
    Filed: October 5, 2020
    Publication date: April 22, 2021
    Inventors: Rajesh Kumar BALASUBRAMANIAN, Mohammad Rasoul MADADI, Jovina Zhi Qi TAN
  • Patent number: 10897244
    Abstract: Apparatus and methods are described for voltage dependent delay. An example apparatus includes an oscillator including a delay circuit that is configured to provide an oscillating output signal has a delay based on a delay of the delay circuit. The delay of the delay circuit is based on a voltage it receives. For example, the delay of the delay circuit increases for an increasing received voltage and decreases for a decreasing received voltage. As a result, the oscillating output signal provided by the oscillator is based on the received voltage. For example, a frequency of the oscillating output signal decreases for increasing received voltage and increases for decreasing received voltage. Described in another way, the frequency of the oscillating output signal is relatively low for relatively high received voltage and relatively high for relatively low received voltage.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: January 19, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Zhi Qi Huang, Wei Lu Chu, Dong Pan
  • Publication number: 20200330159
    Abstract: An artificial potential field path planning method and an apparatus based on obstacle classification solve the problem of path and motion uncertainty in steering a flexible needle in soft tissue. The apparatus includes an image sensing system, a control module, an execution system and an upper PC. Using the apparatus, the method includes: the image sensing system obtains real-time images of the puncture environment, identifies a target and obstacles from the real-time images, classifies the obstacles, and calculates total potential energy of points in the current environment based on artificial potential field. With a curvature constraint and an optimization index for the flexible needle, the path planning module carries out static path planning to obtain an initial path and the needle entry point, then conducts dynamic path planning to determine the path for steering the flexible needle in the soft tissue accordingly.
    Type: Application
    Filed: April 21, 2020
    Publication date: October 22, 2020
    Inventors: Hui Zhang, Zhi Qi, Yuedong Cao, Xiaobao Chen
  • Publication number: 20200304113
    Abstract: Methods and apparatus for generating a delayed output signal from an input signal applied to an RC delay circuit of a semiconductor device during an active mode. The RC delay circuit is configured to pull up a voltage level on a node responsive to a reset signal during a stand-by mode.
    Type: Application
    Filed: August 1, 2018
    Publication date: September 24, 2020
    Inventors: Hiroshi Akamatsu, Zhi Qi Huang
  • Publication number: 20200199097
    Abstract: Disclosed in the present invention are a Pomalidomide derivative and a preparation method therefor. Specifically, the present invention relates to the Pomalidomide derivative and a stereoisomer thereof, or a pharmaceutically acceptable salt, and applications thereof in the preparation of drugs for treating cancers.
    Type: Application
    Filed: August 21, 2017
    Publication date: June 25, 2020
    Applicant: NANJING NORATECH PHARMACEUTICALS CO., LTD
    Inventors: Fei LIU, Gang WU, Xin ZHAO, Pan CHEN, Yunpeng LIAO, Xiaobo WANG, Zhi QI, Xudong YANG
  • Patent number: 10643686
    Abstract: A memory device includes a memory array including a plurality of memory cells; and an array timer coupled to the memory array, configured to generate an output timing signal based on a fixed input and a reference signal, wherein: the fixed input is from a supply circuit, the reference signal is from a reference block, and the output timing signal is configured to control the memory array.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: May 5, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Zhi Qi Huang, Wei Lu Chu, Hiromasa Noda, Dong Pan
  • Publication number: 20190304533
    Abstract: A memory device includes a memory array including a plurality of memory cells; and an array timer coupled to the memory array, configured to generate an output timing signal based on a fixed input and a reference signal, wherein: the fixed input is from a supply circuit, the reference signal is from a reference block, and the output timing signal is configured to control the memory array.
    Type: Application
    Filed: June 20, 2019
    Publication date: October 3, 2019
    Inventors: Zhi Qi Huang, Wei Lu Chu, Hiromasa Noda, Dong Pan
  • Patent number: 10373670
    Abstract: A memory device includes a memory array including a plurality of memory cells; and an array timer coupled to the memory array, configured to generate an output timing signal based on a V-I stable input and an analog reference signal, wherein: the V-I stable input is from a bandgap supply circuit, the analog reference signal is from an analog reference block, and the output timing signal is configured to control the memory array.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: August 6, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Zhi Qi Huang, Wei Lu Chu, Hiromasa Noda, Dong Pan
  • Publication number: 20190003332
    Abstract: At least one embodiment of the present invention provides a sealing telemetry assembly used for a gas turbine. The gas turbine includes at least one turbine disk, and the sealing telemetry assembly includes a sealing cover and at least one power supply apparatus. The sealing cover is used to cover the turbine disk, and the sealing cover includes a cavity forming portion and a cover. At least one installation cavity is provided within the cavity forming portion, and the cover covers and is fixed to the cavity forming portion. The power supply apparatus is configured in the installation cavity. A gas turbine, a sealing cover, and a manufacturing method of a sealing telemetry assembly are also provided. They can improve working performance of the gas turbine, reduce production costs, and monitor an internal working environment of the gas turbine.
    Type: Application
    Filed: December 30, 2015
    Publication date: January 3, 2019
    Applicant: Siemens Aktiengesellschaft
    Inventors: Guo Feng CHEN, Rui Chun DUAN, Chang Peng LI, Zhi Qi YAO
  • Patent number: 9991332
    Abstract: An integrated circuit has a lateral flux capacitor assembly that includes a first metal layer having a capacitive portion with first and second lateral sides and first and second capacitive fingers, a first dummy metal lines portion positioned adjacent the first lateral side of the capacitive portion and a second dummy metal lines portion positioned adjacent the second lateral side of the capacitive portion. The first set of capacitive fingers is electrically connected to the first dummy metal lines portion and the second set of capacitive fingers is electrically connected to the second dummy metal lines portion. A method of making an integrated circuit assembly with a lateral flux capacitor includes electrically connecting a first plurality of capacitive fingers in a first metal layer to a first dummy metal lines portion of the first metal layer.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: June 5, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Zhi-Qi Li
  • Patent number: 9724383
    Abstract: Disclosed herein are trimeric polypeptide pharmaceutical compositions comprising three monomers, each monomer comprising a polypeptide having the amino acid sequence of the N-terminal heptad repeat (NHR or HR1) or C-terminal heptad repeat (CHR or HR2) of the transmembrane glycoprotein of human immunodeficiency virus (HIV) and a trimerization motif.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: August 8, 2017
    Assignee: New York Blood Center, Inc.
    Inventors: Shibo Jiang, Zhi Qi, Xi Chen, Chungen Pan
  • Publication number: 20170062553
    Abstract: An integrated circuit has a lateral flux capacitor assembly that includes a first metal layer having a capacitive portion with first and second lateral sides and first and second capacitive fingers, a first dummy metal lines portion positioned adjacent the first lateral side of the capacitive portion and a second dummy metal lines portion positioned adjacent the second lateral side of the capacitive portion. The first set of capacitive fingers is electrically connected to the first dummy metal lines portion and the second set of capacitive fingers is electrically connected to the second dummy metal lines portion. A method of making an integrated circuit assembly with a lateral flux capacitor includes electrically connecting a first plurality of capacitive fingers in a first metal layer to a first dummy metal lines portion of the first metal layer.
    Type: Application
    Filed: November 4, 2016
    Publication date: March 2, 2017
    Inventor: Zhi-Qi Li
  • Patent number: 9520461
    Abstract: An integrated circuit has a lateral flux capacitor assembly that includes a first metal layer having a capacitive portion with first and second lateral sides and first and second capacitive fingers, a first dummy metal lines portion positioned adjacent the first lateral side of the capacitive portion and a second dummy metal lines portion positioned adjacent the second lateral side of the capacitive portion. The first set of capacitive fingers is electrically connected to the first dummy metal lines portion and the second set of capacitive fingers is electrically connected to the second dummy metal lines portion. A method of making an integrated circuit assembly with a lateral flux capacitor includes electrically connecting a first plurality of capacitive fingers in a first metal layer to a first dummy metal lines portion of the first metal layer.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: December 13, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Zhi-Qi Li
  • Publication number: 20160340675
    Abstract: The presently disclosed subject matter provides anti-miRNAs for the treatment of diseases associated with atherogenesis and methods of treatment, and diagnosis and/or prognosis of these diseases using lipoprotein-associated miRNAs.
    Type: Application
    Filed: May 23, 2016
    Publication date: November 24, 2016
    Inventors: Kasey Vickers, Carrie Wiese, Valentina Kon, Zhi-Qi Xu
  • Publication number: 20160326771
    Abstract: A mute door lock includes a lower seat plate, a lining plate and an oriented plate disposed on the lower seat plate, wherein a latch bolt is mounted on the oriented plate via a guide rod at the tail end of the latch bolt, the latch bolt is inserted into a bolt hole of the lining plate, a spring is sheathed onto the guide rod, which abuts between the oriented plate and the latch bolt and always pushes the latch bolt outward. A tail part of the guide rod is provided with a reset plate which abuts against a linkage mechanism supported by a buffer cylinder, the linkage mechanism drives the buffer cylinder to stretch. The buffer cylinder is connected to the latch bolt via the linkage mechanism, which can make the latch bolt restore slowly, avoiding the noise generated when the traditional latch bolt is restored quickly.
    Type: Application
    Filed: August 20, 2015
    Publication date: November 10, 2016
    Applicant: GUANGDONG JUSEN HARDWARE PRECISION MANUFACTURING CO., LTD.
    Inventor: Zhi Qi
  • Patent number: 9455298
    Abstract: A wafer-level packaging method of BSI image sensors includes the following steps: S1: providing a wafer package body comprising a silicon base, an interconnect layer, a hollow wall and a substrate; S2: cutting the wafer package body via laser in a first cutting process to separate the interconnect layer of adjacent BSI image sensors; and S3: cutting the wafer package body via a blade in a second cutting process to obtain independent BSI image sensors. As a result, damage of the interconnect layer and the substrate may be decreased to improve performance and reliability of the BSI image sensor.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: September 27, 2016
    Assignee: China Wafer Level CSP Co., Ltd.
    Inventors: Zhi-Qi Wang, Qiong Yu, Wei Wang
  • Publication number: 20160148972
    Abstract: A wafer-level packaging method of BSI image sensors includes the following steps: S1: providing a wafer package body comprising a silicon base, an interconnect layer, a hollow wall and a substrate; S2: cutting the wafer package body via laser in a first cutting process to separate the interconnect layer of adjacent BSI image sensors; and S3: cutting the wafer package body via a blade in a second cutting process to obtain independent BSI image sensors. As a result, damage of the interconnect layer and the substrate may be decreased to improve performance and reliability of the BSI image sensor.
    Type: Application
    Filed: February 1, 2016
    Publication date: May 26, 2016
    Inventors: Zhi-Qi WANG, Qiong YU, Wei WANG
  • Patent number: 9305961
    Abstract: A wafer-level packaging method of BSI image sensors includes the following steps: S1: providing a wafer package body comprising a silicon base, an interconnect layer, a hollow wall and a substrate; S2: cutting the wafer package body via a first blade in a first cutting process to separate the interconnect layer of adjacent BSI image sensors; and S3: cutting the wafer package body via a second blade in a second cutting process to obtain independent BSI image sensors. As a result, damage of the interconnect layer and the substrate may be decreased to improve performance and reliability of the BSI image sensor.
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: April 5, 2016
    Assignee: China Wafer Level CSP Co., Ltd.
    Inventors: Zhi-Qi Wang, Qiong Yu, Wei Wang
  • Publication number: 20150306174
    Abstract: Disclosed herein are trimeric polypeptide pharmaceutical compositions comprising three monomers, each monomer comprising a polypeptide having the amino acid sequence of the N-terminal heptad repeat (NHR or HR1) or C-terminal heptad repeat (CHR or HR2) of the transmembrane glycoprotein of human immunodeficiency virus (HIV) and a trimerization motif.
    Type: Application
    Filed: July 10, 2015
    Publication date: October 29, 2015
    Inventors: Shibo Jiang, Zhi Qi, Xi Chen, Chungen Pan