Patents by Inventor Zhilong Peng

Zhilong Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220373835
    Abstract: A light-adjusting structure, a method for manufacturing the light-adjusting structure, and a light-adjusting module are provided, which belong to the field of display technology, the light-adjusting structure includes: a first flexible substrate and a second flexible substrate oppositely arranged; a first transparent electrode and a second transparent electrode which are located between the first flexible substrate and the second flexible substrate; a first alignment layer located on a side of the first flexible substrate facing towards the second flexible substrate; a second alignment layer located on a side of the second flexible substrate facing towards the first flexible substrate; and a spacer and a dye liquid crystal layer which are located between the first alignment layer and the second alignment layer. The solutions of the present disclosure can meet light-adjusting requirements of vehicle windows.
    Type: Application
    Filed: May 19, 2021
    Publication date: November 24, 2022
    Inventors: Juan CHEN, Jing YU, Chunlei WANG, Yifan WU, Yingliang ZHANG, Zhilong PENG, Wei LIU, Qiang LIU, Na LI, Chuncheng CHE, Xue CAO, Yue LI, Xinya ZHANG
  • Publication number: 20220240382
    Abstract: A flexible circuit board comprises: a flexible substrate, a lead layer, a first insulating layer and a pin layer. The lead layer comprises a plurality of leads provided at one side of the flexible substrate; the first insulating layer is provided at a side of the lead layer facing away from the flexible substrate, the first insulating layer is provided with a plurality of via holes, and the orthographic projection of each via hole on the flexible substrate at least partially overlaps with the orthographic projection of the corresponding lead on the flexible substrate; the pin layer comprises a plurality of pins provided at a side of the first insulating layer facing away from the flexible substrate, the plurality of pins are provided in one-to-one correspondence with the plurality of leads, and the pins are respectively connected to the corresponding leads through the via holes.
    Type: Application
    Filed: February 7, 2021
    Publication date: July 28, 2022
    Inventors: Dawei ZHANG, Zhilong PENG, Yingliang ZHANG
  • Patent number: 10725551
    Abstract: Embodiments of the present disclosure relate to a three-dimensional touch sensing method, a three-dimensional display device and a wearable device. The three-dimensional touch sensing method, comprising: receiving an electron beam being perpendicularly incident to a preset plane on the preset plane, the electron beam having a preset emission intensity; obtaining a reception position and a reception intensity of the electron beam; determining a projection position of a touch position on the preset plane according to the reception position of the electron beam; and calculating a distance from the touch position to the preset plane according to the reception intensity of the electron beam and the preset emission intensity.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: July 28, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Chong Liu, Wei Wang, Haisheng Zhao, Xiaoguang Pei, Zhilong Peng, Huanping Liu
  • Patent number: 10627685
    Abstract: An array substrate, a method for fabricating the same, a display panel and a display device are disclosed. The array substrate comprises leading wires, the plurality of leading wires form a plurality of grooves in a fanout area of the array substrate, the plurality of grooves are filled with a filler, and the filler filled in the grooves has an upper surface which is flush with leading wires surrounding the grooves. The filler is made from an insulating and transparent material.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: April 21, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Chong Liu, Haisheng Zhao, Xiaoguang Pei, Zhilian Xiao, Zhilong Peng, Hongxi Xiao, Wei Wang
  • Patent number: 10600814
    Abstract: There are provided an array substrate, a display panel and a display device. The array substrate includes a display area and a non-display area. The non-display area include: at least one first wiring configured to be connected with a signal line within the display area and with a driver integrated circuit disposed within the non-display area; and at least one second wiring configured to cause photoresist to be uniformly distributed during a spin coating process of the photoresist.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: March 24, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Anjia Yang, Lei Chen, Jiapeng Li, Shenghui Wang, Wukun Dai, Zhilong Peng
  • Patent number: 10495930
    Abstract: The present application provides an array electrode, which comprises: a plurality of gate lines, a plurality of data lines and a plurality of pixel units arranged in an array, wherein each pixel unit comprises a plate electrode, a slit electrode, and an insulating layer disposed between the plate electrode and the slit electrode. The slit electrode includes a plurality of electrode strips, with slits being formed between adjacent electrode strips, and an electrode strip that at least partially overlaps a projection of the data line on the array substrate being disconnected from other electrode strips. The present application also proposes a display device comprising said array substrate and a method for manufacturing said array substrate.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: December 3, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yu Cao, Haisheng Zhao, Zhilong Peng
  • Patent number: 10345658
    Abstract: The present disclosure provides a method for manufacturing a slit electrode, the slit electrode, and a display panel. The method includes steps of forming a first photoresist pattern on a passivation layer, the first photoresist pattern being of a shape identical to a slit of the slit electrode, forming a slit electrode pattern on the passivation layer with the first photoresist pattern, the slit electrode pattern being covering with a second photoresist pattern which has a shape identical to the slit electrode; and removing the first photoresist pattern and the second photoresist pattern.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: July 9, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yang An, Zhilong Peng, Wukun Dai
  • Patent number: 10297449
    Abstract: A method for manufacturing thin film transistor, a method for manufacturing array substrate, an array substrate and a display device are provided. The method for manufacturing thin film transistor includes forming an intermediate layer on a substrate, patterning the intermediate layer to form an intermediate layer reserved region and an intermediate layer unreserved region, where the intermediate layer unreserved region corresponds to a pattern of a first structure layer, forming, on the substrate with a pattern of the intermediate layer, a material layer from which the first structure layer is formed, and removing the intermediate layer, and forming the pattern of the first structure layer through a portion of the material layer remaining on the substrate.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: May 21, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zijin Lin, Haisheng Zhao, Xiaoguang Pei, Zhilong Peng, Dongjiang Sun
  • Patent number: 10228594
    Abstract: The present disclosure discloses an array substrate, a display panel and a display device. The array substrate includes gate regions, gate lines, data lines, pixel electrodes and common electrode lines. The common electrode lines and the gate lines have the same extension direction, the pixel electrodes are located in regions defined by adjacent gate lines and adjacent data lines, the gate lines traverse the gate regions in the extension direction that are located in the same row as the gate lines, and the pixel electrodes have a gap from the gate lines at ends thereof closer to the gate lines. As such, a portion of the gate region that extends to the pixel region has a reduced area and hence a reduced edge length. This way, during the cleaning of the active layer after formation, less active layer metal may remain at the edges of the gate region. Thereby, the array substrate fabrication process is improved, and a product yield rate of the array substrate is increased.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: March 12, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Chong Liu, Wei Wang, Haisheng Zhao, Zhilong Peng, Zhilian Xiao, Huanping Liu
  • Patent number: 10134778
    Abstract: A method for manufacturing an array substrate, including: forming a plurality of first metal layer patterns on a base substrate which are independent from each other, each of the plurality of first metal layer patterns including an end at a non-display region of the array substrate; forming an insulating layer on the plurality of first metal layer patterns; and forming a semiconductor pattern on the insulating layer, a portion of semiconductor pattern is disposed directly opposite to the end of the first metal layer patterns.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: November 20, 2018
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Optoelectronics Technology Co., Ltd.
    Inventors: Xiaoguang Pei, Chong Liu, Zhilian Xiao, Haisheng Zhao, Zhilong Peng
  • Publication number: 20180331131
    Abstract: A method for manufacturing thin film transistor, a method for manufacturing array substrate, an array substrate and a display device are provided. The method for manufacturing thin film transistor includes forming an intermediate layer on a substrate, patterning the intermediate layer to form an intermediate layer reserved region and an intermediate layer unreserved region, where the intermediate layer unreserved region corresponds to a pattern of a first structure layer, forming, on the substrate with a pattern of the intermediate layer, a material layer from which the first structure layer is formed, and removing the intermediate layer, and forming the pattern of the first structure layer through a portion of the material layer remaining on the substrate.
    Type: Application
    Filed: May 9, 2016
    Publication date: November 15, 2018
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zijin LIN, Haisheng ZHAO, Xiaoguang PEI, Zhilong PENG, Dongjiang SUN
  • Patent number: 10042216
    Abstract: An embodiment of the present disclosure discloses an array substrate, including a base substrate, a drain electrode of a thin film transistor and a pixel electrode corresponding to the drain electrode arranged on the base substrate, wherein the pixel electrode and the drain electrode are attached to each other.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: August 7, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yang An, Wukun Dai, Zhilong Peng, Huanping Liu
  • Patent number: 10020325
    Abstract: The present disclosure provides a method for producing a TFT array substrate, a TFT array substrate, and a display apparatus, and relates to a technical field of display. It can solve a problem of no signal transmission caused by fracture of a source signal line, without increasing a coupling capacitance of the TFT array substrate. The method for producing a TFT array substrate includes: forming a transparent conductive layer and a source-drain metal layer in sequence onto a base substrate; and patterning the source-drain metal layer and the transparent conductive layer in one patterning process to form a source signal line and a pixel electrode line overlapping with each other.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: July 10, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Lei Chen, Zhilong Peng, Wukun Dai, Lei Zhang, Miao Qiu
  • Publication number: 20180188573
    Abstract: An array substrate, a method for fabricating the same, a display panel and a display device are disclosed. The array substrate comprises leading wires, the plurality of leading wires form a plurality of grooves in a fanout area of the array substrate, the plurality of grooves are filled with a filler, and the filler filled in the grooves has an upper surface which is flush with leading wires surrounding the grooves. The filler is made from an insulating and transparent material.
    Type: Application
    Filed: April 25, 2017
    Publication date: July 5, 2018
    Inventors: Chong LIU, Haisheng ZHAO, Xiaoguang PEI, Zhilian XIAO, Zhilong PENG, Hongxi XIAO, Wei WANG
  • Publication number: 20180166465
    Abstract: There are provided an array substrate, a display panel and a display device. The array substrate includes a display area and a non-display area. The non-display area include: at least one first wiring configured to be connected with a signal line within the display area and with a driver integrated circuit disposed within the non-display area; and at least one second wiring configured to cause photoresist to be uniformly distributed during a spin coating process of the photoresist.
    Type: Application
    Filed: January 5, 2017
    Publication date: June 14, 2018
    Inventors: Anjia Yang, Lei Chen, Jiapeng Li, Shenghui Wang, Wukun Dai, Zhilong Peng
  • Patent number: 9991291
    Abstract: An array substrate is disclosed, which includes a display region and a drive circuit region; the drive circuit region includes GOA units, the GOA unit including a substrate, a gate electrode layer, an insulation layer, an active layer and a source/drain electrode layer, and the drive circuit region further includes a gate wire connecting to the gate electrode layer, and a source/drain layer wire at the same layer with the source/drain electrode layer, wherein the area between the portions of the gate wire and the source/drain layer wire which intercross with each other is only formed with the insulation layer. A manufacturing method of an array substrate and a display apparatus including the array substrate is further disclosed.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: June 5, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhilian Xiao, Haisheng Zhao, Chong Liu, Zhilong Peng
  • Patent number: 9947252
    Abstract: The present invention provides an array substrate and a detecting method therefor, a display panel and a display device. The array substrate comprises a plurality of data lines, a plurality of short circuit rings respectively provided at ends of the plurality of data lines, and a common wire connecting the plurality of short circuit rings in series, wherein, a switch unit is provided between the end of each data line and the corresponding short circuit ring, and the switch unit is configured to disconnect the data line with the corresponding short circuit ring in a testing stage. The present invention can improve the detection rate and accuracy rate in an array test.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: April 17, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Chong Liu, Tielin Zhang, Haisheng Zhao, Zhilong Peng, Huanping Liu
  • Publication number: 20180053793
    Abstract: An array substrate is disclosed, which includes a display region and a drive circuit region; the drive circuit region includes GOA units, the GOA unit including a substrate, a gate electrode layer, an insulation layer, an active layer and a source/drain electrode layer, and the drive circuit region further includes a gate wire connecting to the gate electrode layer, and a source/drain layer wire at the same layer with the source/drain electrode layer, wherein the area between the portions of the gate wire and the source/drain layer wire which intercross with each other is only formed with the insulation layer. A manufacturing method of an array substrate and a display apparatus including the array substrate is further disclosed.
    Type: Application
    Filed: November 2, 2017
    Publication date: February 22, 2018
    Inventors: Zhilian Xiao, Haisheng Zhao, Chong Liu, Zhilong Peng
  • Patent number: 9881533
    Abstract: Embodiments of the present invention disclose a method for detecting a bright spot of a liquid crystal display panel, which belongs to the field of display. The method can solve a technical problem of miss detecting by the bright spot detection method in the prior art which o can not detect a bright spot caused by the short circuit between a data line and a pixel electrode. The method for detecting a bright spot of a liquid crystal display panel comprises: scanning gate lines of the liquid crystal display panel, and simultaneously outputting low level signals by data lines of the liquid crystal display panel; and, stopping the scanning of the gate lines of the liquid crystal display panel, and simultaneously outputting high level signals by the data lines. The method may be used for detecting liquid crystal display panels of ADS type.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: January 30, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jia Li, Zhilong Peng, Qingzeng Shan
  • Patent number: 9865625
    Abstract: The present disclosure provides an array substrate and a method of manufacturing the same, and a display device. TA connecting portion is provided within the overlapping region between the first signal line and the second signal line, is electrically conductive and directly contacts the second signal line. Thus, even when the upper second signal line is broken due to the large step difference within the overlapping region between the first signal line and the second signal line, the connecting portion electrically connected with the broken second signal line can still electrically connect and conduct the broken second signal line, thereby avoiding transmission of signal from being adversely affected by the broken signal line within the overlapping region.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: January 9, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Lei Chen, Zhilong Peng, Wukun Dai, Huanping Liu