Abstract: Embodiments of 3D memory devices having staircase structures and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory array structure and a staircase structure in an intermediate of the memory array structure and laterally dividing the memory array structure into a first memory array structure and a second memory array structure. The staircase structure includes a first staircase zone and a bridge structure connecting the first memory array structure and the second memory array structure. The first staircase zone includes a first pair of staircases facing each other in a first lateral direction and at different depths. Each staircase includes a plurality of stairs. At least one stair in the first pair of staircases is electrically connected to at least one of the first memory array structure and the second memory array structure through the bridge structure.

Abstract: Embodiments of 3D memory devices having staircase structures and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory array structure and a staircase structure in an intermediate of the memory array structure and laterally dividing the memory array structure into a first memory array structure and a second memory array structure. The staircase structure includes a first staircase zone and a bridge structure connecting the first and second memory array structures. The bridge structure includes a lower wall portion and an upper staircase portion. The first staircase zone includes a first pair of staircases facing each other in a first lateral direction and at different depths. Each staircase includes stairs. At least one stair in the first pair of staircases is electrically connected to at least one of the first memory array structure and the second memory array structure through the bridge structure.

Abstract: The disclosed systems may include systems and methods for clock synchronization under random transmission delay conditions. Additionally, systems and methods for horizon leveling for wrist captured images may be disclosed. In addition, the disclosed may include methods, systems, and devices for batch message transfer. The disclosed methods may also include a mobile computing device receiving an indication to initiate an emergency voice call by a user of the mobile computing device and initiating an Internet Protocol Multimedia Subsystem (IMS) emergency call. In addition, systems, methods, and devices for automatic content display may be disclosed. Various other related methods and systems are also disclosed.

Abstract: Embodiments of 3D memory structures and methods for forming the same are disclosed. The fabrication method includes disposing an alternating dielectric stack on a substrate, wherein the alternating dielectric stack having first and second dielectric layers alternatingly stacked on top of each other. Next, a plurality of contact openings can be formed in the alternating dielectric stack such that a dielectric layer pair can be exposed inside at least one of the plurality of contact openings. The method further includes forming a film stack of alternating conductive and dielectric layers by replacing the second dielectric layer with a conductive layer, and forming a contact structure to contact the conductive layer in the film stack of alternating conductive and dielectric layers.

Abstract: Disclosed is a method for forming a staircase structure of 3D memory. The method includes providing a substrate, forming an alternating layer stack over the substrate, forming a plurality of block regions over a surface of the alternating layer stack, forming a first plurality of staircase structures to expose a portion of a first number of top-most layer stacks at each of the block regions and removing the first number of the layer stacks at a second plurality of staircase structures at each of the block regions.

Abstract: An improved method for making a P. vulgaris bean extract that results in an extract having high ?-amylase inhibitory activity and low hemagglutinin activity. The method involves treating the beans to selectively denature the hemagglutinin. A P. vulgaris bean extract is provided, having high ?-amylase inhibitory activity and low hemagglutinin activity. A treatment for diabetes or method for reducing blood glucose level is disclosed using the P. vulgaris bean extract disclosed herein.

Abstract: A method may include obtaining a video collected by a visual sensor, the video including a plurality of frames and detecting one or more objects from the video in at least a portion of the plurality of frames. The method may also include determining a first detection result associated with the one or more objects with a trained self-learning model. The method may further include selecting a target moving object of interest from the one or more objects at least in part based on the first detection result. The trained self-learning model may be provided based on a plurality of training samples collected by the visual sensor.

Abstract: In one embodiment, a method includes generating embeddings for social-networking entities by training the embeddings using a training algorithm, where an embedding corresponding to an entity represents a point in a d-dimensional embedding space, identifying a subset of entities having one or more common attributes that is not encoded in the generated embeddings, encoding, for each entity in the subset, values of the one or more common attributes into a j-dimensional additional embedding, creating, for each entity in the subset, a (d+j)-dimensional embedding by concatenating the generated d-dimensional embedding with the j-dimensional additional embedding, detecting a need to identify entities similar to a reference entity that is a member of the subset, computing k-nearest neighbors of an embedding corresponding to the reference entity in the (d+j)-dimensional embedding space, identifying entities corresponding to the computed k-nearest neighbors, and providing information regarding the corresponding entities

Abstract: The present disclosure provides a three-dimensional (3D) memory device and a method for forming the same. The 3D memory device can comprise a channel structure region including a plurality of channel structures; a first staircase structure in a first staircase region including a plurality of division block structures arranged along a first direction on a first side of the channel structure, and a second staircase structure in a second staircase region including a plurality of division block structures arranged along the first direction on a second side of the channel structure. A first vertical offset defines a boundary between adjacent division block structures. Each division block structure includes a plurality of staircases arranged along a second direction that is different from the first direction. Each staircase includes a plurality of steps arranged along the first direction.

Abstract: A semiconductor device is provided that can include a stack formed of word line layers and insulating layers that are alternatingly stacked over a substrate. A first staircase of a first block can be formed in the stack and extend between first array regions of the first block. A second staircase of a second block can be formed in the stack and extend between second array regions of the second block. The semiconductor device further can have a connection region that is formed in the stack between the first staircase and second staircase.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stack of word line layers and insulating layers that are stacked alternatingly over the substrate, and channel structures formed in a first array region and a second array region of the stack. The first array region and the second array region are positioned at opposing sides of the stack. A first staircase is formed in a connection region of the stack over the substrate, where the connection region is arranged between the first and second array regions. A second staircase is formed in the connection region of the stack over the substrate, and the connection region in the stack includes a separation region between the first and second staircases.

Abstract: This application discloses a method and an apparatus for adjusting a data sending rate. In the method, when determining that a return time of feedback information of a first data packet has timed out, a terminal reduces a data sending rate of a connection to which the first data packet belongs from a first value to a second value. Then the terminal detects return times of feedback information of a plurality of subsequent data packets after the first data packet and determines a cause of the timeout of the feedback information of the first data packet. The terminal further increases a data sending rate from a current third value to a fourth value when determining that the timeout is caused by a packet loss on a wireless link in a communications link.

Abstract: The disclosure provides a three-dimensional (3D) memory device. In an example, the 3D memory device includes a memory array structure and a staircase structure. The staircase structure includes a first staircase region including a first plurality of stairs. Each of the first plurality of stairs includes a first number of divisions at different depths in a first direction. The staircase structure also includes a second staircase region including a second plurality of stairs farther away from the memory array structure than the first plurality of stairs in a second direction perpendicular to the first direction. Each of the second plurality of stairs also includes the first number of the divisions. The staircase structure further includes at least one intermediate stair disposed between the first staircase region and the second staircase region in the second direction.

Abstract: An atmospheric pressure water ion generating device is arranged in a triphase organic matter pyrolysis system which includes a steam generating device and a pyrolysis and carbonization reaction device. The water ion generating device includes a connecting pipe connected with the steam generating device, and having an interior that is penetrated, a heating tube having a first end connected with the connecting pipe and having an interior provided with an air channel, and a spraying head connected with a second end of the heating tube, and having an interior that is tapered. The air channel has a surface provided with an alloy catalyst layer. The spraying head is provided with a nozzle which is connected with the pyrolysis and carbonization reaction device.

Abstract: A portable computing device includes a housing having a region with a plurality of physical features configured to be swiped by a user during a first period, a first accelerometer configured to determine first perturbations during the first period, a second accelerometer configured to determine second perturbations during the first period of time, and a processor coupled to the first and second accelerometer and configured to determine whether the user has swiped the region during the first period of time in response to the first perturbations and the second perturbations.

Abstract: In one embodiment, a method includes, by one or more computing devices, receiving, from a client system of a user, a request for event recommendations for the user; accessing information indicating a geographic location associated with the user; accessing a geographic map comprising multiple map tiles, each map tile defining a geographic area within the map; identifying a first map tile of the multiple map tiles associated with the user based on the geographic location associated with the user; and determining a social tile associated with the first map tile, wherein the social tile comprises the first map tile and one or more second map tiles of the multiple map tiles, wherein the first map tile and the one or more second map tiles are clustered into the social tile based on one or more items of prior attendee information corresponding to one or more prior events.

Abstract: A sealing device able to contain corrosive liquids includes a base body and a sealing door covering the base body. The base body defines a receiving chamber which defines an opening. The sealing door carries a protrusion and a seal ring. The protrusion corresponds in position and size to the opening to seal the receiving chamber. The protrusion is corrosion resistant and it is the protrusion which experiences sputtering and sloshing of the liquid and not the seal ring. The seal ring is sleeved on the protrusion to seal the base body and the sealing door. The present disclosure further provides a machine including the sealing device.

Abstract: Embodiments of methods for forming a staircase structure of a three-dimensional (3D) memory device are disclosed. In an example, a first plurality of stairs of the staircase structure are formed based on a first photoresist mask. Each of the first plurality of stairs includes a number of divisions at different depths. After forming the first plurality of stairs, a second plurality of stairs of the staircase structure are formed based on a second photoresist mask. Each of the second plurality of stairs includes the number of divisions. The staircase structure tilts downward and away from a memory array structure of the 3D memory device from the first plurality of stairs to the second plurality of stairs.

Abstract: Aspects of the disclosure provide a semiconductor device. The semiconductor device includes gate layers and insulating layers that are stacked alternatingly along a direction perpendicular to a substrate of the semiconductor device in an array region upon the substrate. Further, the semiconductor device includes an array of channel structures that is formed in the array region. The gate layers and the insulating layers are stacked in a staircase form with stair steps having non-uniform stair depths in a connection region upon the substrate. Further, the semiconductor device includes contact structures to the gate layers. The contact structures are formed on the stair steps that have the non-uniform stair depths.

Abstract: Aspects of the disclosure provide a semiconductor device. The semiconductor device includes gate layers and insulating layers that are stacked alternatingly along a direction perpendicular to a substrate of the semiconductor device and form a stack upon the substrate. The semiconductor device includes an array of channel structures that are formed in an array region of the stack. Further, the semiconductor device includes a first staircase formed of a first section of the stack in a connection region upon the substrate, and a second staircase formed of a second section of the stack in the connection region upon the substrate. In addition, the semiconductor device includes a dummy staircase formed of the first section of the stack and disposed between the first staircase and the second staircase in the connection region.