Abstract: A semiconductor mixed material and manufacturing method thereof, a thin film transistor and an electronic device are provided. The semiconductor mixed material includes an inorganic semiconductor nanoparticle and an organic semiconductor material, and the inorganic semiconductor nanoparticle is dispersed in the organic semiconductor material. The embodiments of the present disclosure ensure both a high electron mobility and a high charge transfer rate by mixing the inorganic semiconductor nanoparticle with the organic semiconductor material.

Abstract: A thin film transistor is disclosed. The thin-film transistor includes an active layer (3); a source electrode (1); and a drain electrode (2). The active layer includes an active pattern region (4), the active pattern region including a main body portion (5) and a plurality of protrusion portions (6) on both sides of the main body portion. The protrusion portions are connected to the main body portion.

Abstract: A thin film transistor is disclosed. The thin-film transistor includes an active layer (3); a source electrode (1); and a drain electrode (2). The active layer includes an active pattern region (4), the active pattern region including a main body portion (5) and a plurality of protrusion portions (6) on both sides of the main body portion. The protrusion portions are connected to the main body portion.

Abstract: The disclosure discloses a thin film transistor, a method for fabricating the same, an array substrate, and a display panel. The thin film transistor includes: a first conductive layer on a base substrate, a first insulation layer on a side of the first conductive layer facing away from the base substrate, and a second conductive layer on a side of the first insulation layer facing away from the first conductive layer, wherein an active layer is arranged on a side of the first insulation layer facing the first conductive layer, and/or a side thereof facing the second conductive layer.

Abstract: A thin film transistor and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are provided. The thin film transistor is provided on a base substrate and includes: an active layer including a first surface and a second surface which are opposite to each other, in which the second surface is closer to the base substrate than the first surface; and a source-drain electrode layer including a source electrode and a drain electrode which are separated from each other and are respectively connected with the active layer; each of the first surface and the second surface is a non-flat surface, and the non-flat surface includes a plurality of depressions and a plurality of protrusions which are alternately arranged.

Abstract: A light guide plate, a method for fabricating the same, a backlight module, and a display panel are disclosed. The light guide plate includes a flexible base layer, a photonic crystal array layer on the flexible base layer, and a transparent planarization layer encapsulating the photonic crystal array layer. The photonic crystal array layer includes photonic crystals which are arranged in an array.

Abstract: Disclosed is a display device, a manufacturing method thereof and a display apparatus. The display device includes a carrier having a first surface and a second surface opposite to each other, and at least one nanotube in the carrier. Each nanotube includes a tube wall and a receiving cavity surrounded by the tube wall. The receiving cavity includes a first open end at the first surface and a second open end at the second surface. The display device further includes a first electrode at the first open end, a second electrode at the second open end and a light-emitting layer between the first electrode and the second electrode.

Abstract: The present application discloses a thin film transistor. The thin film transistor includes a base substrate; an active layer; an etch stop layer on a side of the active layer distal to the base substrate; and a source electrode and a drain electrode on a side of the etch stop layer distal to the active layer. The active layer includes a channel region, a source electrode contact region, and a drain electrode contact region. An orthographic projection of the etch stop layer on the base substrate surrounds an orthographic projection of the drain electrode contact region on the base substrate. An orthographic projection of the source electrode contact region on the base substrate at least partially peripherally surrounding the orthographic projection of the etch stop layer on the base substrate.

Abstract: A light guide plate, a method for fabricating the same, a backlight module, and a display panel are disclosed. The light guide plate includes a flexible base layer, a photonic crystal array layer on the flexible base layer, and a transparent planarization layer encapsulating the photonic crystal array layer. The photonic crystal array layer includes photonic crystals which are arranged in an array.

Abstract: A display panel, a display device and a control method thereof are provided. The display panel includes a plurality of display units on a base substrate, each display unit includes: a driving component, and a light splitting component driven by the driving component to convert incident light into light of different colors.

Abstract: An array substrate is provided, including a plurality of pixel unit pairs arranged in an array and defined by mutually intersected gate lines and data lines. Two of the gate lines are arranged between the pixel unit pairs in adjacent rows, each pixel unit pair includes a first pixel unit and a second pixel unit, and a gate insulation layer, a first metal layer, a passivation layer and a pixel electrode layer are stacked on a base substrate and arranged between the first pixel unit and the second pixel unit. Orthographic projections of the pixel electrode layer and the first metal layer onto the base substrate partially overlap to form a storage capacitor, and the first metal layer is connected to a common electrode layer of each pixel unit pair in a lap joint manner.

Abstract: The disclosure discloses a thin film transistor, a method for fabricating the same, an array substrate, and a display panel. The thin film transistor includes: a first conductive layer on a base substrate, a first insulation layer on a side of the first conductive layer facing away from the base substrate, and a second conductive layer on a side of the first insulation layer facing away from the first conductive layer, wherein an active layer is arranged on a side of the first insulation layer facing the first conductive layer, and/or a side thereof facing the second conductive layer.

Abstract: The present disclosure provides an array substrate, a method for manufacturing the same, and a display device, which belongs to the field of display technology. The array substrate includes a metal electrode layer, a pad layer, a first insulating layer and a first transparent conductive layer, wherein: the pad layer includes a transparent conductive material, the metal electrode layer includes a conductive layer and protection layers formed on both surfaces of the conductive layer, and the pad layer is connected to the metal electrode layer; the first insulating layer is covered on the metal electrode layer and the pad layer, and the first transparent conductive layer is disposed on the first insulating layer; and a via hole is provided in the first insulating layer, and the first transparent conductive layer is connected to the pad layer through the via hole.

Abstract: A method for manufacturing an array substrate includes: forming a metal-oxide semiconductor layer, a first conductive layer and a second conductive layer sequentially on a substrate; and treating the metal-oxide semiconductor layer, the first conductive layer and the second conductive layer in a single patterning process using a mask, to form an active layer, pixel electrodes, a source drain pattern layer which includes source electrodes, drain electrodes and data lines, and a reserved pattern of the first conductive layer which is provided in a same layer as the pixel electrodes and formed on sides of the source electrodes and the data lines close to the active layer. The drain electrode is in direct contact with the pixel electrode, and a partial region of the pixel electrode is unobstructed from the drain electrode.

Abstract: A thin film transistor and manufacturing methods thereof, an array substrate and a display device are provided. The thin film transistor includes a base substrate, a gate layer, a gate insulating layer, an active layer, and a source/drain layer. The gate layer includes a first gate layer, and a second gate layer between the first gate layer and the gate insulating layer. The first gate layer is a metal layer. The second gate layer is a doped semiconductor material layer. The gate insulating layer is usually made from SiO, SiN or the like.

Abstract: The present disclosure provides a thin film transistor and a fabrication method thereof, and an array substrate. The thin film transistor formed on a base substrate, the thin film transistor includes: an active layer; a first signal metal layer, provided on a surface of the active layer facing the base substrate; a second signal metal layer, provided on a surface of the active layer facing away from the first signal metal layer, wherein, the active layer includes a conductive channel formation region, and the second signal metal layer does not cover the conductive channel formation region of the active layer.

Abstract: The present disclosure provides a pixel structure, a manufacturing method and a driving method thereof, and a display device. The pixel structure includes a plurality of pixel units, each pixel unit includes a first thin film transistor, a pixel electrode, and a common electrode, a drain of the first thin film transistor of the pixel unit is connected to the pixel electrode of the pixel unit. Each one of at least a portion of the plurality of pixel units further includes a second thin film transistor. A drain of the second thin film transistor of the pixel unit is connected to the common electrode of the pixel unit.

Abstract: A patterning method employing a half tone mask includes the steps of: successively forming a first thin film layer, a second thin film layer and a photoresist thin film layer on a substrate; exposing and developing the photoresist thin film layer by using a half tone mask plate; performing a first etching on the substrate that is exposed and developed; performing a second etching on the substrate that has been subject to the first etching; passivating the substrate that has been subject to the first etching; ashing the substrate that has been passivated; performing a third etching on the substrate that has been subject to the ashing and the second etching; and, stripping the substrate that has been subject to the third etching.

Abstract: A method for manufacturing an array substrate includes: forming a metal-oxide semiconductor layer, a first conductive layer and a second conductive layer sequentially on a substrate; and treating the metal-oxide semiconductor layer, the first conductive layer and the second conductive layer in a single patterning process using a mask, to form an active layer, pixel electrodes, a source drain pattern layer which includes source electrodes, drain electrodes and data lines, and a reserved pattern of the first conductive layer which is provided in a same layer as the pixel electrodes and formed on sides of the source electrodes and the data lines close to the active layer. The drain electrode is in direct contact with the pixel electrode, and a partial region of the pixel electrode is unobstructed from the drain electrode.

Abstract: An array substrate is provided, including a plurality of pixel unit pairs arranged in an array and defined by mutually intersected gate lines and data lines. Two of the gate lines are arranged between the pixel unit pairs in adjacent rows, each pixel unit pair includes a first pixel unit and a second pixel unit, and a gate insulation layer, a first metal layer, a passivation layer and a pixel electrode layer are stacked on a base substrate and arranged between the first pixel unit and the second pixel unit. Orthographic projections of the pixel electrode layer and the first metal layer onto the base substrate partially overlap to form a storage capacitor, and the first metal layer is connected to a common electrode layer of each pixel unit pair in a lap joint manner.