Multilayer ceramic capacitor

Abstract

In a multilayer ceramic capacitor comprising a multilayer body alternately laminating a conductor layer and a ceramic dielectric layer, the thickness of the above described ceramic dielectric layer is not more than the thickness of the above described conductor layer, and therefore, as a whole, the ratio of the occupation of the conductor layer comparatively having a flexibility to the thermal shock is increased. Consequently, the thermal shock resistance is improved.

Description

BACKGROUND OF THE INVENTION

[0001] A conventional multilayer ceramic capacitor comprises a multilayer body made by alternately laminating a ceramic dielectric layer and a conductor layer, and an external electrode formed at both ends of the multilayer body and connected to the above described conductor layer. Here, the conductor layer is alternately connected to the external electrodes at both ends. That is, one external electrode is connected to the conductor layer every other layer, and the other external electrode is connected to the conductor layer that is not connected to the above described one external electrode.

[0002] For example, in the case of a multilayer ceramic capacitor with an external size of 2.1 mm×1.25 mm×1.25 mm and an electrostatic capacity of 10 &mgr;F, the number of the laminated conductor layers is 330, the thickness of the ceramic dielectric layer is 1.8 &mgr;m, and the thickness of the conductor layer is 1.5 &mgr;m. That is, the thickness of the ceramic dielectric layer is about 1.2 times the thickness of the conductor layer.

[0003] Herein, generally, in a multilayer ceramic capacitor, there are some cases where a capacitor with a high resistance to the thermal shock is required. Furthermore, recently, a small-sized multilayer ceramic capacitor with a large capacity has been required. However, in some cases, a conventional multilayer ceramic capacitor has not reached to have a sufficient thermal shock resistance. Especially, when attempting to make a small-sized capacitor with a large capacity by increasing the number of laminated layers, in some cases, a sufficient thermal shock resistance has not been obtained.

SUMMARY OF THE INVENTION

[0004] It is an object of the present invention to provide a multilayer ceramic capacitor with an excellent thermal shock resistance.

[0005] In order to attain this object, the present invention proposes a multiplayer ceramic capacitor comprising a multilayer body alternately laminating a conductor layer and a ceramic dielectric layer, wherein the thickness of said ceramic dielectric layer is not more than the thickness of said conductor layer.

[0006] In a multilayer ceramic capacitor, generally, the conductor layer has a comparatively higher flexibility to the thermal shock than the ceramic grain making up the ceramic dielectric layer. Therefore, according to the present invention, the thickness of the ceramic dielectric layer is not more than the thickness of the conductor layer, and consequently, as a whole, the ratio of the occupation of the conductor layer becomes large, and as a result of this, the resistance to the thermal shock is improved.

[0007] Furthermore, the present invention proposes a multilayer ceramic capacitor comprising a multilayer body alternately laminating a conductor layer and a ceramic dielectric layer, wherein said ceramic dielectric layer comprises ceramic grains and a secondary phase existing between said ceramic grains, and includes a part in which said ceramic grains do not exist between said opposite conductor layers and which is made of only said secondary phase.

[0008] In a multilayer ceramic capacitor, generally, the secondary phase existing between the above described ceramic grains has a comparatively higher flexibility to the thermal shock than the ceramic grain making up the ceramic dielectric layer. Therefore, according to the present invention, the part made of only the above described secondary phase relieves the thermal shock, and therefore, the thermal shock resistance is improved.

[0009] The object, constitution, and effect of the present invention other than those in the above description will be clear by the following detailed description.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010] FIG. 1 is a partially cut perspective view of a multilayer ceramic capacitor;

[0011] FIG. 2 is an enlarged cross sectional view of the multilayer ceramic capacitor;

[0012] FIG. 3 is a table showing the test result of a heat resistance test;

[0013] FIG. 4 is an enlarged cross sectional view of the multilayer ceramic capacitor; and

[0014] FIG. 5 is a table showing the test result of a heat resistance test.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] (First Embodiment)

[0016] A multilayer ceramic capacitor according to the first embodiment of the present invention will be described by referring to drawings. FIG. 1 is a partially cut illustration of a multilayer ceramic capacitor, and FIG. 2 is an enlarged cross sectional view of the multilayer ceramic capacitor.

[0017] As shown in FIG. 1, this multilayer ceramic capacitor 10 comprises an approximately rectangular multilayer body 13 made by alternately laminating a ceramic dielectric layer 11 and a conductor layer 12, and external electrodes 14 formed at both ends of the multilayer body 13 and connected to the above described conductor layer 12. Here, the conductor layers 12 are alternately connected to the external electrodes 14 at both ends. That is, one external electrode 14 is connected to the conductor layer 12 every other layer, and the other external electrode 14 is connected to the conductor layer 12 that is not connected to the above described one external electrode 14.

[0018] The ceramic dielectric layer 11 is made of a ceramic sintered body having a strong dielectric, for example, of the BaTiO3 family. Furthermore, the conductor layer 12 is made of a metal material, for example, a noble metal such as Pd, Ag, or Au, or a base metal such as Ni or Cu. The multilayer body 13 is formed in a way where a plurality of ceramic green sheets on which conductive paste is printed are laminated and these are sintered. By this baking, the ceramic green sheets are sintered and the ceramic dielectric layer 11 is formed. Furthermore, by this baking, the conductive paste is sintered and the conductor layer 12 is formed. The external electrode 14 is made of a metal material such as Ni or Ag.

[0019] As shown in FIG. 2, this multilayer ceramic capacitor 10 is characterized in that the thickness Dd of the ceramic dielectric layer 11 is not more than the thickness De of the conductor layer 12. Concretely, the thickness Dd of the ceramic dielectric layer 11 is preferably about 70% to 100% of the thickness De of the conductor layer 12, and more preferably about 85% to 100%. Here, when comparing the ceramic dielectric layer 11 and the conductor layer 12, the conductor layer 12 has a higher flexibility to the thermal shock.

[0020] Herein, FIG. 2 shows a state where the conductor layer 12 is broken, and this is the state where the thickness of the conductor layer 12 becomes non-uniform because of the aggregation of the metal grains included in the conductive paste forming the conductor layer 12 and as a result, a part having no conductor is created. That is, the thickness of the conductor layer 12 is formed to be non-uniform. The part where the conductor layer 12 is broken is filled with the secondary phase 15 included in the ceramic dielectric layer 11.

[0021] Next, one example of the manufacturing method of this multilayer ceramic capacitor will be described. First, a given amount of organic binder, organic solvent, or water is mixed and stirred in a dielectric ceramic material made by mixing BaTiO2 or the like as a main material and SiO2, rare earth oxide, Mn3O4 or the like as an additional matter to obtain a ceramic slurry. Next, this ceramic slurry is subjected to the tape molding method such as the doctor blade method to form a ceramic green sheet.

[0022] Next, on this ceramic green sheet, the conductive paste with a given shape is printed by the screen printing method, the intaglio printing method, the letterpress printing method or the like. Here, the conductive paste is coated so that the thickness of the conductor layer after the sintering may be thicker than that of the ceramic dielectric layer.

[0023] Next, the ceramic green sheets where the conductive paste is printed are laminated and pressed by using a press device to obtain the ceramic multilayer body. Next, the ceramic multilayer body is cut to have a size for a part unit to obtain a multilayer chip. Next, this multiplayer chip is baked under a given heat condition and atmospheric condition to obtain a sintered body. Finally, external electrodes are formed at both ends of the sintered body by the dip method or the like to obtain a multilayer ceramic capacitor.

[0024] In this embodiment, a multilayer ceramic capacitor shown below was prepared. The size of the external shape is 2.1 mm×1.25 mm×1.25 mm, and the dielectric constant of the ceramic dielectric layer is 3800, and the average thickness of the ceramic dielectric layer is 1.7 &mgr;m, and the average thickness of the conductor layer is 2.0 &mgr;m and the number of the laminated conductor layers is 300, and the electrostatic capacitance is 10 &mgr;F, and the material of the conductor layer is Ni. The test of the thermal shock resistance was applied to this multilayer ceramic capacitor. It was performed by such a concrete method where the multilayer ceramic capacitor was dipped in a dissolved solder vessel for five seconds at 350° C. and the creation of a crack was observed by the eye. The result of this test is shown in FIG. 3. The table of FIG. 3 shows the number of created cracks in 100 samples. From this table, it is known that the multilayer ceramic capacitor 10 according to this embodiment has a better thermal shock resistance than the above described conventional multilayer ceramic capacitor.

[0025] Thus, in the multilayer ceramic capacitor 10 according to this embodiment, the conductor layer 12 having a comparatively higher flexibility to the thermal shock is formed to be thicker than the ceramic dielectric layer 11, and therefore, as a whole, it becomes excellent in thermal shock resistance. Especially, in the case where each layer is thinned and the number of laminated layers is increased to attain miniaturization and a large capacity, this multilayer ceramic capacitor 10 has an excellent thermal shock resistance.

[0026] (Second Embodiment)

[0027] A multilayer ceramic capacitor according to the second embodiment of the present invention will be described by referring to drawings. FIG. 4 is an enlarged cross sectional view of the multilayer ceramic capacitor.

[0028] Similarly to the above described first embodiment, this multilayer ceramic capacitor comprises an approximately rectangular multilayer body made by alternately laminating a ceramic dielectric layer 21 and a conductor layer 22, and external electrodes formed at both ends of the multilayer body and connected to the above described conductor layer 22. Here, the conductor layers 22 are alternately connected to the external electrodes at both ends. That is, one external electrode is connected to the conductor layer 22 every other layer, and the other external electrode is connected to the conductor layer 22 that is not connected to the above described one external electrode.

[0029] The ceramic dielectric layer 21 is made of a ceramic sintered body having a strong dielectric, for example, of the BaTiO3 family. Furthermore, the conductor layer 22 is made of a metal material, for example, a noble metal such as Pd, Ag, or Au, or a base metal such as Ni or Cu. The multilayer body is formed in a way where a plurality of ceramic green sheets on which conductive paste is printed are laminated and these are sintered. By this baking, the ceramic green sheet is sintered and the ceramic dielectric layer 21 is formed. Furthermore, by this baking, the conductive paste is sintered and the conductor layer 22 is formed. The external electrode is made of a metal material such as Ni or Ag.

[0030] This multilayer ceramic capacitor is characterized by the structure of the ceramic dielectric layer 21. Generally, the ceramic dielectric layer comprises a ceramic grain and a secondary phase existing between the above described ceramic grains. Here, the secondary phase is an additional matter added together with the raw material when baking the ceramic, or a reaction product of this additional matter and the ceramic grain. This secondary phase has a higher flexibility to the thermal shock than the ceramic grain. Herein, the ceramic dielectric layer is generally in the state where each ceramic grain is closely connected through the whole area.

[0031] As shown in FIG. 4, the multilayer ceramic capacitor according to this embodiment is characterized in that the ceramic dielectric layer 21 includes a part 21a in which no ceramic grain 31 exists through the space between the opposite conductor layers 22 and which is made of only the secondary phase 32. Here, the size of the part 21a made of only the secondary phase 32, that is, the distance between the opposite ceramic grains is not less than the thickness of the ceramic dielectric layer. Furthermore, it is preferable for one ceramic dielectric layer 21 to include the part 21a made of only the secondary phase 32 of about 0% to 15%, and it is more preferable to include the part 21a of about 0% to 5%. Furthermore, the percentage of the ceramic dielectric layer 21 having the part 21a made of only the secondary phase 32 to the total ceramic dielectric layer 21 is preferably about 10% to 90%, and more preferably about 15% to 30%.

[0032] Herein, FIG. 4 shows a state where the conductor layer 22 is broken, and this is the state where the thickness of the conductor layer 22 becomes non-uniform because of the aggregation of the metal grains included in the conductive paste forming the conductor layer 22 and as a result, a part where no conductor is formed is created. That is, the thickness of the conductor layer 22 is formed to be non-uniform. The part where the conductor layer 22 is broken is filled with the secondary phase 32 included in the ceramic dielectric layer 21.

[0033] Next, one example of the manufacturing method of this multilayer ceramic capacitor will be described. First, a given amount of organic binder, organic solvent, or water is mixed and stirred in a dielectric ceramic material to obtain a ceramic slurry. Here, the dielectric ceramic material is made by mixing the main material of the balium titanate family such as BaTiO3 and the additional matter such as SiO2, rare earth oxide, or Mn3O4. Part of this additional matter forms the secondary phase at the time of baking to be described later. The percentage of this additional matter to be mixed to the main material is preferably about 1% to 10%, and more preferably about 3% to 7%. Furthermore, the average grain diameter of the main material is preferably 0.2 to 1.5 &mgr;m, and more preferably 0.2 to 1.0 &mgr;m.

[0034] Next, this ceramic slurry is subjected to the tape molding method such as the doctor blade method and the ceramic green sheet is formed. Next, on this ceramic green sheet, the conductive paste with a given shape is printed by the screen printing method, the intaglio printing method, the letterpress printing method or the like. Next, the ceramic green sheets where the conductive paste is printed are laminated and pressed by using the press device to obtain the ceramic multilayer body.

[0035] Next, the ceramic multilayer body is cut to have a size for a part unit to obtain a multilayer chip. Next, this multilayer chip is baked under the given heat condition and atmospheric condition to obtain a sintered body. Finally, external electrodes are formed at both ends of the sintered body by the dip method or the like to obtain a multilayer ceramic capacitor.

[0036] In this embodiment, a multilayer ceramic capacitor shown below was prepared. The size of the external shape is 2.1 mm×1.25 mm×1.25 mm, and the dielectric constant of the ceramic dielectric layer is 3800, and the average grain diameter of the ceramic grain is 0.35 &mgr;m, and the average thickness of the ceramic dielectric layer is 1.7 &mgr;m, and the average thickness of the conductor layer is 1.7 &mgr;m, and the number of the laminated conductor layers is 320, and the electrostatic capacitance is 10.5 &mgr;F, and the material of the conductor layer is Ni. The test of the thermal shock resistance was applied to this multilayer ceramic capacitor. The test was performed by such a concrete method where the multilayer ceramic capacitor was dipped in a dissolved solder vessel for five seconds at 350° C., and the creation of a crack was observed by the eye. The result of this test is shown in FIG. 5. The table of FIG. 5 shows the number of created cracks in 100 samples. From this table, it is known that the multilayer ceramic capacitor according to this embodiment has a better thermal shock resistance than that of the above described conventional multilayer ceramic capacitor.

[0037] In the multilayer ceramic capacitor according to this embodiment, the ceramic dielectric body 21 includes a part 21a made of only the secondary phase comparatively flexible to the thermal shock, and therefore, as a whole, it is excellent in the thermal shock resistance. That is, this part 21a made of only the secondary phase works for relieving the stress. Especially, in the case where each layer is thinned and the number of laminated layers is increased to attain miniaturization and a large capacity, this multilayer ceramic capacitor has an excellent thermal shock resistance. Especially, when using a material including Si as an additional matter, the secondary phase becomes glassy, and therefore, it is preferable in view of the relief of the thermal shock.

[0038] Herein, the embodiments according to the present invention are illustrative and not limited. The scope of the present invention is shown by the accompanying claims, and all the deformed examples included in the meanings of those claims are included in the present invention.

[0039] For example, in the above described respective embodiments, as a material of the ceramic dielectric layer, a ceramic material powder whose main material is BaTiO3 and whose additional matter is SiO2, rare earth oxide, or Mn3O4 is shown as an example, but the present invention is not limited to this. As a main material, for example, it is also possible to use BaTiO3, Bi4Ti3O12, (Ba, Sr, Ca)TiO3, (Ba, CA)(Zr, Ti) O3, (Ba, Sr, Ca)(Zr, Ti)03, Ba(Ti, Sn)O3. Furthermore, as an additional matter, for example, it is also possible to use MgO, glass of the Li family, or glass of the B family.

Claims

1. A multilayer ceramic capacitor comprising a multilayer body alternately laminating a conductor layer and a ceramic dielectric layer, wherein

a thickness of said ceramic dielectric layer is not more than a thickness of said conductor layer.

2. The multilayer ceramic capacitor according to

claim 1, wherein

the thickness of said ceramic dielectric layer is 70% or more and 100% or less of the thickness of said conductor layer.

3. The multilayer ceramic capacitor according to

claim 1, wherein

the thickness of said conductor layer is not uniform.

4. The multilayer ceramic capacitor according to

claim 1, wherein

said ceramic dielectric layer comprises ceramic grains and a secondary phase existing between said ceramic grains.

5. A multilayer ceramic capacitor comprising a multilayer body alternately laminating a conductor layer and a ceramic dielectric layer, wherein

said ceramic dielectric layer comprises ceramic grains and a secondary phase existing between said ceramic grains, and includes a part in which said ceramic grains do not exist between opposite conductor layers and which is made of only said secondary phase.

6. The multilayer ceramic capacitor according to

claim 5, wherein

10% or more and 90% or less of all said ceramic dielectric layers have said part made of only said secondary phase.

7. The multilayer ceramic capacitor according to

claim 5, wherein, said secondary phase comprises Si.

8. The multilayer ceramic capacitor according to

claim 5, wherein, the thickness of said conductor layer is not uniform.