For Multilayer Capacitor Patents (Class 361/306.3)
  • Patent number: 11967465
    Abstract: A film capacitor for positioning at a direct current (DC) terminal at a front end of an inverter having a plurality of switching elements, can include a first member; and a second member surrounding the first member, in which a second dielectric resistance of the second member is higher than a first dielectric resistance of the first member.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: April 23, 2024
    Assignees: LG MAGNA E-POWERTRAIN CO., LTD., RUBYCON CORPORATION
    Inventors: Sungtae Choi, Takahisa Makino
  • Patent number: 11955290
    Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes disposed with the dielectric layer interposed therebetween; first and second connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the first internal electrode; third and fourth connection electrodes penetrating the body in a in a direction perpendicular to the dielectric layer and connected to the second internal electrode; first and second external electrodes disposed on both surfaces of the body, and connected to the first and second connection electrodes; and third and fourth external electrodes connected to the third and fourth connection electrodes, and at least a portion of the first and second connection electrodes is exposed to the surface of the body.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: April 9, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Min Gon Lee, Taek Jung Lee, Jin Man Jung, Ji Hong Jo, Jin Kyung Joo
  • Patent number: 11943867
    Abstract: An electronic component includes a main body portion that has a first main surface having first and second sides, a second main surface opposite to the first main surface, a first side surface sharing the first side with the first main surface, and a second side surface sharing the second side with the first main surface, connection terminals that have electrical conductivity and that are arranged on the first main surface so as to be isolated from each other, and side-surface terminals that have electrical conductivity. The main body portion has side-surface grooves that are formed in the first and second side surfaces and that extend from the first main surface toward the second main surface. The side-surface terminals are provided on inner sides of the side-surface grooves and are each electrically connected to at least one of two end portions of the corresponding connection terminal.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: March 26, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Naofumi Takezono
  • Patent number: 11929211
    Abstract: A multi-layer capacitor including a capacitor element having at least two segments. Each segment includes multiple layer planes, including ceramic dielectric layers and electrode layers arranged therebetween, which are arranged in a layer sequence one above the other. The electrode layers include different electrodes, including at least first and second electrodes. The different electrodes overlap in active regions but not in passive regions. Multiple segments are arranged one above the other in a stack direction. The outermost dielectric layers of two segments form a connection region in which the segments are fixedly connected to each other parallel to the layer planes. The connection region contains a relief region. The relief region occupies at least the entire passive region of the capacitor.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: March 12, 2024
    Assignee: TDK Electronics AG
    Inventors: Thorsten Bayer, Michael Schossmann
  • Patent number: 11908626
    Abstract: A multilayer ceramic electronic component includes a ceramic body including a laminate body including first and second surfaces opposing each other in a first direction, third and fourth surfaces opposing each other in a second direction, and fifth and sixth surfaces opposing each other in a third direction, and including a dielectric layer, and a first internal electrode and a second internal electrode stacked in the third direction with the dielectric layer interposed therebetween, a first and a second margin portion; a first connection portion and a second connection portion. The first connection portion includes a first lead electrode connected to the first internal electrode, and the second connection portion includes a second lead electrode connected to the second internal electrode.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: February 20, 2024
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jung Eun Noh, Ji Hyuk Lim, Jong Yun Kim, Eun Jung Lee
  • Patent number: 11901126
    Abstract: A multilayer ceramic capacitor includes, on a side of a first external electrode in a length direction of an interposer, a first joining electrode on a first surface and a first mounting electrode on a second surface, a first through conductive portion penetrating the interposer, and a first conductive joining agent providing electrical conduction between the first external electrode and the first joining electrode, and includes on a side of a second external electrode, a second joining electrode on the first surface and a second mounting electrode on the second surface, a second through conductive portion penetrating the interposer, and a second conductive joining agent providing electrical conduction between the second external electrode and the second joining electrode.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: February 13, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Satoshi Yokomizo
  • Patent number: 11889615
    Abstract: There is provided a computer structure comprising a first silicon substrate and a second silicon substrate. Computer circuitry configured to perform computing operations is formed in the first silicon substrate, which has a self-supporting depth and an inner facing surface. A plurality of distributed capacitance units are formed in the second silicon substrate, which has an inner facing surface located in overlap with the inner facing surface of the first substrate and is connected to the first substrate via a set of connectors arranged extending depthwise of the structure between the inner facing surfaces. The inner facing surfaces have matching planar surface dimensions. The second substrate has an outer facing surface on which are arranged a plurality of connector terminals for connecting the computer structure to a supply voltage. The second substrate has a smaller depth than the first substrate.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: January 30, 2024
    Assignee: GRAPHCORE LIMITED
    Inventor: Stephen Felix
  • Patent number: 11881354
    Abstract: A laminated ceramic electronic component according to the present disclosure includes a laminated body in which ceramic layers and electrode layers are alternately laminated, at least one of the electrode layers including a first electrode portion containing a conductive carbon material.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: January 23, 2024
    Assignee: KYOCERA Corporation
    Inventors: Takao Sada, Yoshihiro Fujioka
  • Patent number: 11862400
    Abstract: According to one embodiment, an electronic component includes an element, a first lead, and a second lead. The element includes a first electrode and a second electrode. The first lead is electrically connected with the first electrode, and has a flattened cross section. The second lead is electrically connected with the second electrode. The first lead includes a first connection portion, a first bonding portion, and a first extension portion. The first connection portion is connected with the first electrode. The first bonding portion is configured to be bonded with a substrate. The first bonding portion extends in an extension direction perpendicular to a first counter direction. The first counter direction connects the first electrode and the second electrode. The first extension portion is located between the first connection portion and the first bonding portion. The first extension portion extends in the extension direction.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: January 2, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Takahiro Shimizu
  • Patent number: 11784003
    Abstract: An electronic component includes a multilayer body including a multilayer main body and side gap portions, the multilayer main body including an inner layer portion including alternatively laminated dielectric layers and internal nickel electrode layers, and including end surfaces in a length direction. The internal nickel electrode layers are exposed at the end surfaces. The side gap portions are on both sides of the multilayer main body in a width direction. External nickel layers are on the end surfaces of the multilayer body. A deviation amount in the width direction between ends of two adjacent internal nickel electrode layers on both side surfaces is within about 0.5 ?m. The external nickel layers are on the end surface of the multilayer body, in a region other than a region including a rounded ridge portion. A thermosetting resin layer including metal filler is outside the external nickel layer.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: October 10, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yasuhiro Nishisaka, Mitsuru Ikeda
  • Patent number: 11776743
    Abstract: A multilayer capacitor includes a capacitor body including a dielectric layer and first and second internal electrodes and having first and second surfaces opposing each other, third and fourth surfaces connected to the first and second surfaces and opposing each other, and fifth and sixth surfaces connected to the first and second surfaces, connected to the third and fourth surfaces, and opposing each other, first and second side portions disposed on the fifth and sixth surfaces of the capacitor body, respectively, and first and second external electrodes disposed on the third and fourth surfaces of the capacitor body, respectively, and connected to the first and second internal electrodes, respectively. The first and second internal electrodes have protrusions at one-side edge in a direction perpendicular to the fifth and sixth surfaces of the capacitor body.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: October 3, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyung Joon Kim, Hyun Ju Kim, Kyoung Ae Kim
  • Patent number: 11763995
    Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer, and first and second internal electrodes with the dielectric layer interposed therebetween, and a first through-electrode passing through the body and connected to the first internal electrode; a second through-electrode passing through the body and connected to the second internal electrode; first and second external electrodes formed on the first and second surfaces and connected to the first through-electrode; and third and fourth external electrodes spaced apart from the first and second external electrodes and connected to the second through-electrode, wherein the first to fourth external electrodes are sintered electrodes including nickel, and each comprises a first plating layer and a second plating layer sequentially stacked on the sintered electrodes.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: September 19, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Taek Jung Lee, Byeong Chan Kwon, Jin Kyung Joo, Ji Hong Jo
  • Patent number: 11763996
    Abstract: An element body includes a principal surface arranged to constitute a mounting surface and a first side surface adjacent to the principal surface. An external electrode includes a first electrode portion disposed on the principal surface and a second electrode portion disposed on the first side surface. The first electrode portion includes a sintered metal layer, a conductive resin layer formed on the sintered metal layer, and a plating layer formed on the conductive resin layer. The second electrode portion includes a first region and a second region. The first region includes a sintered metal layer and a plating layer formed on the sintered metal layer. The second region includes a sintered metal layer, a conductive resin layer formed on the sintered metal layer, and a plating layer formed on the conductive resin layer. The second region is located closer to the principal surface than the first region.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: September 19, 2023
    Assignee: TDK CORPORATION
    Inventors: Shinya Onodera, Koki Ito, Hideki Kaneko
  • Patent number: 11763994
    Abstract: In a multilayer ceramic capacitor, a proportion of a glass component in a first side surface-side base electrode layer is about 60% or more in a first range from a tip in a vicinity of a second end surface of the first side surface-side base electrode layer to a position of a length which is about 10% of a dimension in a length direction of the first side surface-side base electrode layer, and a proportion of a glass component in a second side surface-side base electrode layer is about 60% or more in a second range from a tip in a vicinity of a first end surface of the second side surface-side base electrode layer to a position of a length which is about 10% of a dimension in a length direction of the second side surface-side base electrode layer.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: September 19, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yuichiro Tanaka
  • Patent number: 11736116
    Abstract: An interdigital capacitor and a multiplying digital-to-analog conversion circuit, where the interdigital capacitor includes at least one first metal layer. The following components are disposed in each first metal layer: a first electrode; at least one first finger metal connected to the first electrode; a second electrode; and a plurality of second finger metals connected to the second electrode, and at least one third finger metal connected to the second electrode. The at least one first finger metal is alternately disposed with the plurality of second finger metals to form capacitors, and the at least one third finger metal is a dummy finger metal.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: August 22, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Chunyuan Ma, Bingxin Li
  • Patent number: 11728096
    Abstract: A multilayer ceramic capacitor includes a laminate including dielectric layers and internal electrode layers, and external electrodes on surfaces of the laminate. A silane coupling agent layer is on at least a mounting surface among surfaces of the laminate. The silane coupling agent layer is made of a fluorine-based silane coupling agent, and a silane coupling agent concentration on the mounting surface is about 0.1 or higher and about 365 or lower and is higher than a silane coupling agent concentration on a counter surface opposing the mounting surface, or the silane coupling agent layer is made of a carbon-based silane coupling agent, and a silane coupling agent concentration on the mounting surface is about 0.91 or higher and about 38.10 or lower and is higher than a silane coupling agent concentration on a counter surface opposing the mounting surface.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: August 15, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Suguru Nakano, Satoshi Muramatsu, Risa Hojo, Yoshiyuki Nomura
  • Patent number: 11721632
    Abstract: Embodiments include a package substrate, a semiconductor package, and a method of forming the package substrate. A package substrate includes a core substrate between a first alternate core substrate and a second alternate core substrate. The first alternate core substrate includes conductive layers and vias. The package substrate includes a dielectric layer surrounding the core and first and second alternate substrates, a first conductive layer on a top surface of the dielectric layer, and a second conductive layer on top surfaces of the core and first and second alternate substrates, where the dielectric layer is over/under the core and first and second alternate substrates. The package substrate includes a third conductive layer on bottom surfaces of the core and first and second alternate substrates. The conductive layers are coupled to the vias within the first alternate core substrate, where the conductive layers and vias couple the second and third layers.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: August 8, 2023
    Assignee: Intel Corporation
    Inventor: Sri Chaitra Jyotsna Chavali
  • Patent number: 11721468
    Abstract: A coil component includes a support substrate; a coil portion disposed on the support substrate; a body embedding the support substrate and the coil portion therein, and having a first surface and a second surface opposing each other, a third surface and a fourth surface opposing each other and respectively connecting the first and second surfaces; lead-out portions extending from the coil portion and respectively exposed from the third and fourth surfaces of the body; a surface-insulating layer disposed on the third and fourth surfaces of the body and having openings respectively exposing the lead-out portions; and external electrodes arranged on the surface-insulating layer and respectively connected to the lead-out portions respectively exposed through the openings, wherein a width of each of the external electrodes is narrower than a width of the body.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: August 8, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kwi Jong Lee, Jung Min Kim, Sung Jin Huh, Jin Hyuck Yang, Jae Wook Lee, Ji Hyun Eom
  • Patent number: 11721484
    Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer, and first and second internal electrodes configured to be layered in a third direction with the dielectric layer interposed therebetween and having first and second connection portions, respectively, and including first, second, third, fourth, fifth and sixth surfaces; a first external electrode disposed on the fifth surface of the body; and a second external electrode disposed on the fifth surface of the body. The first internal electrode is exposed to the third surface and the fifth surface of the body through the first connection portion, and the second internal electrode is exposed to the fourth surface and the fifth surface of the body through the second connection portion.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: August 8, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Sun Cheol Lee
  • Patent number: 11715599
    Abstract: Prismatic polymer monolithic capacitor structure that includes multiple interleaving radiation-cured polymer dielectric layers and metal layers. Method for fabrication of same. The chemical composition of polymer dielectric and the electrode resistivity parameters are chosen to maximize the capacitor self-healing properties and energy density, and to assure the stability of the capacitance and dissipation factor over the operating temperature range. The termination electrode that extends beyond the active capacitor area and beyond the polymer dielectric layers has a thickness larger than that used industrially to provide resistance to thermomechanical stress. The glass transition temperature of the polymer dielectric is specifically chosen to avoid mechanical relaxation from occurring in the operating temperature range, which prevents high moisture permeation (otherwise increasing a dissipation factor and electrode corrosion) into the structure.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: August 1, 2023
    Inventor: Angelo Yializis
  • Patent number: 11705277
    Abstract: A multilayer capacitor includes a body including dielectric layers and internal electrodes, and external electrodes, wherein the body has first and second surfaces opposing each other in a first direction, third and fourth surfaces opposing each other in a second direction, and fifth and sixth surfaces opposing each other in a third direction perpendicular to the first and second directions. A length of a portion of the plurality of internal electrodes in the third direction in an intermediate region of the body in the first direction is greater than a length of the first surface or the second surface of the body in the third direction. The plurality of internal electrodes have a bottleneck structure between the intermediate region and at least one of the first and second surfaces, and wherein the bottleneck structure has a shape recessed into an inner portion of the body.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: July 18, 2023
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hyea Sun Yun, Sung Ae Kim, Ji Hun Jeong, Yoo Jin Choi, Jong Ho Lee
  • Patent number: 11676766
    Abstract: A multilayer capacitor includes a capacitor body having first through six surfaces, and having alternately stacked first internal electrodes and second internal electrodes having dielectric layers therebetween and each having one end thereof exposed through a respective one of third and fourth surfaces. First and second conductive layers respectively include first and second connection portions respectively disposed on the third and fourth surfaces of the capacitor body and respectively connected to the first and second internal electrodes, and first and second band portions respectively extending from the first and second connection portions to respective portions of the first, second, fifth, and sixth surfaces of the capacitor body. First and second reinforcing layers each include a carbon material and an impact-absorbing binder and are respectively disposed on the first and second band portions.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: June 13, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Won Kuen Oh, Hye Hun Park, Tae Gyeom Lee
  • Patent number: 11646162
    Abstract: A multilayer ceramic capacitor includes a stacked body and external electrodes. The stacked body includes stacked dielectric layers and internal electrodes. The external electrodes are disposed on lateral surfaces of the stacked body and are connected to the internal electrodes. The dielectric layers include outer layer portions and an effective layer portion. Each outer layer portion is adjacent to a corresponding main surface of the stacked body. Each outer layer portion is a dielectric layer located between a corresponding main surface and an internal electrode closest to the main surface. A ratio of a dimension of the effective layer portion in a stacking direction to a dimension of the stacked body in the stacking direction is not less than about 53% and not more than about 83%.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: May 9, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Satoshi Muramatsu
  • Patent number: 11646160
    Abstract: An electronic component includes an element body including a side surface and an end surface adjacent to each other, and an external electrode disposed on the side surface and the end surface. The external electrode includes a metal layer disposed on the side surface and the end surface and made of sintered copper, a conductive resin layer that is disposed on the metal layer in such a manner that a partial region of the metal layer is exposed and contains a plurality of copper particles and a resin, and a plating layer disposed on the partial region of the metal layer and the conductive resin layer. The conductive resin includes a first portion located on the side surface. The plating layer includes a second portion located on the side surface. A thickness of the first portion is smaller than a thickness of the second portion.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: May 9, 2023
    Assignee: TDK CORPORATION
    Inventor: Toshihiro Iguchi
  • Patent number: 11640875
    Abstract: A multilayer capacitor includes a capacitor body including first and second dielectric layers and internal electrodes, and including first to sixth surfaces; first and second external electrodes disposed on the fifth and sixth surfaces; and third and fourth external electrodes disposed on the third and fourth surfaces. The internal electrodes include: a first internal electrode disposed on the first dielectric layer and connected to the first and second external electrodes; a second internal electrode disposed on the first dielectric layer and connected to the third external electrode; a third internal electrode disposed on the first dielectric layer and connected to the fourth external electrode; and a fourth internal electrode disposed on the second dielectric layer and overlapping at least a portion of the first to third internal electrodes.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: May 2, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyung Joon Kim, Hyun Ju Kim
  • Patent number: 11636978
    Abstract: The present invention is directed to a multilayer capacitor and a circuit board containing the multilayer capacitor. The capacitor includes a main body containing a first set of alternating dielectric layers and internal electrode layers and a second set of alternating dielectric layers and internal electrode layers. Each set contains a first internal electrode layer and a second internal electrode layer wherein each layer includes a top edge, a bottom edge opposite the top edge, and two side edges that define a main body of the layer. Each layer contains at least one lead tab extending from the top edge of the main body of the layer and at least one lead tab extending from the bottom edge of the main body of the layer wherein the lead tabs are offset from the side edges of the main body of the layer.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: April 25, 2023
    Assignee: KYOCERA AVX Components Corporation
    Inventor: Jeffrey Cain
  • Patent number: 11631538
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers laminated alternately on each other, and external electrode layers on both end surfaces of the multilayer body in a length direction orthogonal or substantially orthogonal to a lamination direction, and each connected to the internal electrode layers. The dielectric layers each include at least one of Ca, Zr, or Ti, the internal electrode layers each include Cu, and the external electrode layers each include a sintered electrode layer in which dielectric particles including at least one of Ca, Zr, or Ti are included in a metal including Ni, and at least one of a Cu-plated layer, a Ni-plated layer, and a Sn-plated layer on an outer side of the sintered electrode layer.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: April 18, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Haruki Kobayashi
  • Patent number: 11626253
    Abstract: An electronic component includes a multilayer body including a multilayer main body and side gap portions, the multilayer main body including an inner layer portion including dielectric layers and internal nickel electrode layers laminated alternately therein, and including end surfaces on both sides in a length direction. The internal nickel electrode layers are exposed at the end surfaces. External nickel layers are provided on the end surfaces. External copper electrode layers cover the end surfaces on which the external nickel layers are provided. A deviation amount in the width direction between positions of ends of two adjacent internal nickel electrode layers on both side surfaces is at least about 0.5 ?m. The external nickel layers are provided on the end surface, in a region excluding a rounded ridge portion. Nickel and tin layers are provided outside the external copper electrode layer.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: April 11, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yasuhiro Nishisaka, Mitsuru Ikeda
  • Patent number: 11605503
    Abstract: A capacitor that includes an insulating base material having a first main surface and a second main surface facing each other, the insulating base material defining first and second trenches extending from the first main surface into the base material such that first trench and the second trench overlap each other; a first conductor in the first trench; a first external electrode on the first main surface of the base material and connected to the first conductor; a second conductor in the second trench; and a second external electrode on the second main surface of the base material and connected to the second conductor.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: March 14, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tomoyuki Ashimine, Hiroshi Nakagawa, Yasuhiro Murase
  • Patent number: 11605689
    Abstract: An array substrate and a display device. The array substrate includes a base substrate, a first electrode, a first insulating layer and a second electrode. The first electrode is on the base substrate; the first insulating layer is on a side of the first electrode away from the base substrate; the second electrode is on a side of the first insulating layer away from the first electrode. The second electrode is provided with a first through-hole and a slit communicated with the first through-hole and extending from the first through-hole to an edge of the second electrode, and an orthographic projection of the first electrode on the base substrate completely falls within an orthographic projection of the second electrode, the first through-hole and the slit on the base substrate. At this time, the first electrode, the second electrode, and the first insulating layer can constitute a capacitor.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: March 14, 2023
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOETECHNOLOGY GROUP CO., LTD.
    Inventors: Changlong Yuan, Benlian Wang, Yingsong Xu, Xilei Cao
  • Patent number: 11594377
    Abstract: An electronic component includes a multilayer body including a multilayer main body including internal nickel electrode layers exposed at end surfaces thereof, external nickel layers on the end surfaces of the multilayer body, and external copper electrode layers covering one of the end surfaces. When dimensions of the external nickel layer and the multilayer body are TN and T0, a relationship of TN<T0 is satisfied. When dimensions of the external nickel layer and the multilayer body are WN and W0, a relationship of WN<W0 is satisfied. The internal nickel electrode layers include at least one uncovered region. The internal nickel electrode layers are directly bonded to the external copper electrode layers in the uncovered region. At least one diffusion region is provided in which copper of the external copper electrode layers is diffused.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: February 28, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yasuhiro Nishisaka, Mitsuru Ikeda
  • Patent number: 11581135
    Abstract: An electronic component and a board having the same mounted thereon are provided. The electronic component includes a capacitor body, a pair of external electrodes, respectively disposed on end portions of the capacitor body, a pair of metal frames, respectively disposed to be connected the pair of external electrodes, and a conductive bonding layer disposed between the external electrode and the metal frame and having a discontinuous region.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: February 14, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Min Kyeong Sim, Beom Joon Cho
  • Patent number: 11562860
    Abstract: A multi-layer ceramic electronic component includes a ceramic body and an external electrode. The ceramic body includes a first main surface and a second main surface that face in a first direction, internal electrodes laminated in the first direction, and a penetrating hole that has a diameter decreasing from the first main surface toward the second main surface and includes a tapered surface, the internal electrodes being exposed on the tapered surface. The external electrode includes a first conductive layer disposed along the tapered surface, and a second conductive layer disposed along the first main surface and connected to the first conductive layer.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: January 24, 2023
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Yuji Tomizawa, Wakae Akaishi
  • Patent number: 11552199
    Abstract: A high-voltage capacitor for integration into electrical power modules has a silicon layer into which an arrangement of recesses is introduced on a front face. The front face with the recesses is coated with a dielectric layer or dielectric layer sequence, wherein the recesses are filled with an electrically conductive material. The silicon layer bears a contact metallisation on the front face and the rear face for purposes of making electrical contact with the capacitor. A layer of thermal SiO2 is formed between the silicon layer and the dielectric layer or layer sequence. The dielectric layer or layer sequence has a layer thickness of ?1000 nm and is formed from a ferroelectric or anti-ferroelectric material. The proposed high-voltage capacitor features a high integration density with a high capacitance and good heat dissipation properties.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: January 10, 2023
    Assignee: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventor: Tobias Erlbacher
  • Patent number: 11532436
    Abstract: A multilayer ceramic electronic component includes an electronic component main body including a first outer electrode disposed on a first side surface of a multilayer body, and a second outer electrode spaced apart from the first outer electrode and disposed on the first side surface, a first metal terminal connected to the first outer electrode, a second metal terminal connected to the second outer electrode, and an exterior material. The first side surface or a second side surface opposes a mounting surface of a mounting substrate, first and second inner electrode layers are disposed perpendicularly or substantially perpendicularly to the mounting surface, and a portion of the first side surface, the first and second outer electrodes, and a portion of the first and second metal terminals are covered with the exterior material.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: December 20, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takahiro Kojima, Masakazu Itamochi
  • Patent number: 11501923
    Abstract: A multilayer capacitor includes a capacitor main body including dielectric layers, first inner electrodes, and second inner electrodes that are laminated together, first outer electrodes, second outer electrodes, first via conductors that electrically connect the respective first outer electrodes to the first inner electrodes, and second via conductors that electrically connect the respective second outer electrodes to the second inner electrodes. Through holes are provided in the second inner electrodes, and the first via conductors pass through the through holes. Through holes are provided in the first inner electrodes, and the second via conductors pass through the through holes. The first outer electrodes and the second outer electrodes are not provided on the first principal surface of the capacitor main body and provided only on its second principal surface.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: November 15, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yukihiro Fujita, Kazuhiro Tabata, Shunsuke Abe, Takayuki Okada
  • Patent number: 11482379
    Abstract: A ceramic electronic component includes a multilayer chip including a multilayer structure and cover layers disposed on top and bottom faces in a stack direction of the multilayer structure, and a pair of external electrodes respectively formed on two edge faces of the multilayer structure and extending to four side faces of the multilayer chip, wherein each external electrode has a recessed portion on at least one of two side faces facing each other in the stack direction or at least one of remaining two side faces, and wherein each external electrode has no recessed portion on the two side faces when each external electrode has the recessed portion on at least one of the remaining two side faces, and has no recessed portion on the remaining two side faces when each external electrode has the recessed portion on at least one of the two side faces.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: October 25, 2022
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Mikio Tahara, Tomoaki Nakamura
  • Patent number: 11476055
    Abstract: A capacitor that includes a lower electrode; a dielectric film; an upper electrode; a first protective film that has a first through hole that opens to the upper electrode and a second through hole that opens to the lower electrode, and has a first upper surface; a second protective film that has a second upper surface located higher than the first upper surface of the first protective film; a first terminal electrode electrically connected to the upper electrode through the first through hole, and extends to at least the second upper surface of the second protective film; and a second terminal electrode electrically connected to the lower electrode through the second through hole, and extends to at least the second upper surface of the second protective film.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: October 18, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takeshi Kagawa, Junko Izumitani, Masatomi Harada, Hiroshi Matsubara, Nobuhiro Ishida
  • Patent number: 11476050
    Abstract: An electronic component includes external nickel layers each provided on end surfaces of a multilayer body and external copper electrode layers each covering the end surfaces on which the external nickel layers are provided. When a dimension of each of the external nickel layers in the lamination direction is defined as TN, and a dimension of the inner layer portion in the lamination direction is defined as T1, T1<TN is satisfied. When a dimension of each of the external nickel layers in the width direction is defined as WN and a dimension of the inner layer portion in the width direction is defined as W1, a relationship of WN<W1 is satisfied, and a relationship of WN<TN is satisfied. The inner layer portion includes at least one uncovered region. The internal and external nickel electrode layers are directly bonded in the uncovered region.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: October 18, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yasuhiro Nishisaka, Mitsuru Ikeda
  • Patent number: 11443993
    Abstract: A package structure and a method of forming the same are provided. The package structure includes a package substrate, an interposer substrate over the package substrate, and multiple semiconductor devices over the interposer substrate. The interposer substrate also has one or more cavities to receive or accommodate additional semiconductor devices that are not allowed to be mounted on the surface of the interposer substrate. The cavities enable a thinner overall package structure. Some semiconductor devices received in the interposer substrate cavities may also be electrically connected to the interposer substrate and/or the semiconductor devices over the interposer substrate in order to improve the electrical performance of the overall package structure.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shin-Puu Jeng, Feng-Cheng Hsu, Shuo-Mao Chen
  • Patent number: 11424319
    Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a contact feature in a first dielectric layer, a first passivation layer over the contact feature, a bottom conductor plate layer disposed over the first passivation layer and including a first plurality of sublayers, a second dielectric layer over the bottom conductor plate layer, a middle conductor plate layer disposed over the second dielectric layer and including a second plurality of sublayers, a third dielectric layer over the middle conductor plate layer, a top conductor plate layer disposed over the third dielectric layer and including a third plurality of sublayers, and a second passivation layer over the top conductor plate layer.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: August 23, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsiang-Ku Shen, Dian-Hau Chen
  • Patent number: 11404215
    Abstract: A capacitor is disclosed. In an embodiment a capacitor includes at least two winding elements, a first busbar and a second busbar, wherein the first busbar and the second busbar connect the winding elements in parallel to each other, and wherein the first busbar and the second busbar are arranged such that they overlap each other.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: August 2, 2022
    Assignee: TDK ELECTRONICS AG
    Inventors: Manuel Gomez, Fernando Rodriguez, Tomas Wagner, David Pelaez
  • Patent number: 11393625
    Abstract: An electronic component includes an electronic component main body including a body and an external electrode disposed on the body. The body includes a dielectric layer and an internal electrode. The electronic component further includes a coating portion including a coating layer, disposed on an external surface of the electronic component main body, and a plurality of projections disposed on the coating layer.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: July 19, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jeong Suong Yang, Bon Seok Koo, Sang Wook Lee, Jung Min Kim, Sung Min Cho
  • Patent number: 11387052
    Abstract: A nonaqueous lithium-type power storage element comprising a positive electrode, a negative electrode, a separator, and a nonaqueous electrolytic solution containing lithium ions. The negative electrode has: a negative electrode collector; and a negative electrode active material layer containing a negative electrode active material, said negative electrode active material layer being provided on one surface or both surfaces of the negative electrode collector. The negative electrode active material contains a carbonaceous material capable of storing or releasing lithium ions. Furthermore, the positive electrode has: a positive electrode collector; and a positive electrode active material layer containing a cathode active material, said positive electrode active material layer being provided on one surface or both surfaces of the positive electrode collector. The positive electrode active material contains activated carbon.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: July 12, 2022
    Assignee: Asahi Kasei Kabushiki Kaisha
    Inventors: Yuima Kimura, Kazuteru Umetsu, Hitoshi Morita, Nobuhiro Okada, Yuichiro Hirakawa, Yusuke Yamahata
  • Patent number: 11360341
    Abstract: A display device is provided and including first and second substrates, wherein the first substrate includes a first area, a second area overlapping the second substrate, a first edge extending in a first direction, a first terminal portion on the first area; the second substrate has a first protruding portion protruding toward the first edge of the first substrate and a second edge including a linear portion along the first edge and a curved portion connected to the linear portion and extending toward the first edge, the curved portion constitutes a part of a edge of the first protruding portion, and a width in the first direction of the first protruding portion gradually decreases toward the first edge.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: June 14, 2022
    Assignee: Japan Display Inc.
    Inventors: Koji Ishizaki, Hayato Kurasawa, Masanobu Ikeda
  • Patent number: 11362636
    Abstract: A multiplexer includes a first acoustic wave filter, a second acoustic wave filter, and an inductor-capacitor (LC) filter each connected to a common terminal. A passband of the second acoustic wave filter is between a passband of the first acoustic wave filter and a passband of the LC filter, a frequency gap between the passband of the second acoustic wave filter and the passband of the LC filter is greater than a frequency gap between the passband of the first acoustic wave filter and the passband of the second acoustic wave filter, the passband of the first acoustic wave filter includes a transmission band of the first communication band, the passband of the LC filter includes a reception band of the first communication band, and the passband of the second acoustic wave filter includes a reception band of a second communication band.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: June 14, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hirotsugu Mori
  • Patent number: 11342125
    Abstract: A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: May 24, 2022
    Assignee: ROHM CO., LTD.
    Inventor: Keisuke Fukae
  • Patent number: 11342118
    Abstract: A multilayer ceramic capacitor includes a laminated body including a plurality of dielectric layers and a plurality of internal electrodes that are alternately laminated, and a first external electrode and a second external electrode provided on the surface of the laminated body. The first external electrode is provided on a first end surface of the laminated body, and extends from the first end surface of the laminated body to form a portion of the first side surface and a portion of the second side surface. The plurality of internal electrodes includes a first internal electrode and a second internal electrode. The first internal electrode is exposed at the first side surface and the second side surface of the laminated body and electrically connected to the first external electrode, and is not exposed at the first end surface of the laminated body.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: May 24, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kenichi Togou, Shinsuke Uchida
  • Patent number: 11335501
    Abstract: A multilayer ceramic electronic component includes a multilayer body including a plurality of stacked ceramic layers and a plurality of stacked inner electrode layers, and outer electrodes on end surfaces of the multilayer body. The outer electrodes include underlying electrode layers on the end surfaces, conductive resin layers that cover the underlying electrode layers, and plating layers that cover the conductive resin layers. The underlying electrode layers are joined to the plating layers in connecting portions without the conductive resin layers interposed between the underlying electrode layers and the plating layers.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: May 17, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kota Zenzai
  • Patent number: 11335506
    Abstract: A ceramic electronic component includes a body including a capacitance formation portion including a dielectric layer and a plurality of internal electrodes disposed to face each other with the dielectric layer interposed therebetween and forming capacitance and protective portions disposed on upper and lower surfaces of the capacitance formation portion and external electrodes including electrode layers disposed on the body and connected to the plurality of internal electrodes and conductive resin layers respectively disposed on the electrode layers, wherein ta2/ta1 is 0.05 or greater, where ta1 is the thickness of the electrode layer at a central portion of the capacitance formation portion and ta2 is the thickness of the electrode layer at a boundary between the capacitance formation portion and the protective portion.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: May 17, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dong Yeong Kim, Dong Hwi Shin