For Multilayer Capacitor Patents (Class 361/306.3)
  • Patent number: 11501923
    Abstract: A multilayer capacitor includes a capacitor main body including dielectric layers, first inner electrodes, and second inner electrodes that are laminated together, first outer electrodes, second outer electrodes, first via conductors that electrically connect the respective first outer electrodes to the first inner electrodes, and second via conductors that electrically connect the respective second outer electrodes to the second inner electrodes. Through holes are provided in the second inner electrodes, and the first via conductors pass through the through holes. Through holes are provided in the first inner electrodes, and the second via conductors pass through the through holes. The first outer electrodes and the second outer electrodes are not provided on the first principal surface of the capacitor main body and provided only on its second principal surface.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: November 15, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yukihiro Fujita, Kazuhiro Tabata, Shunsuke Abe, Takayuki Okada
  • Patent number: 11482379
    Abstract: A ceramic electronic component includes a multilayer chip including a multilayer structure and cover layers disposed on top and bottom faces in a stack direction of the multilayer structure, and a pair of external electrodes respectively formed on two edge faces of the multilayer structure and extending to four side faces of the multilayer chip, wherein each external electrode has a recessed portion on at least one of two side faces facing each other in the stack direction or at least one of remaining two side faces, and wherein each external electrode has no recessed portion on the two side faces when each external electrode has the recessed portion on at least one of the remaining two side faces, and has no recessed portion on the remaining two side faces when each external electrode has the recessed portion on at least one of the two side faces.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: October 25, 2022
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Mikio Tahara, Tomoaki Nakamura
  • Patent number: 11476050
    Abstract: An electronic component includes external nickel layers each provided on end surfaces of a multilayer body and external copper electrode layers each covering the end surfaces on which the external nickel layers are provided. When a dimension of each of the external nickel layers in the lamination direction is defined as TN, and a dimension of the inner layer portion in the lamination direction is defined as T1, T1<TN is satisfied. When a dimension of each of the external nickel layers in the width direction is defined as WN and a dimension of the inner layer portion in the width direction is defined as W1, a relationship of WN<W1 is satisfied, and a relationship of WN<TN is satisfied. The inner layer portion includes at least one uncovered region. The internal and external nickel electrode layers are directly bonded in the uncovered region.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: October 18, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yasuhiro Nishisaka, Mitsuru Ikeda
  • Patent number: 11476055
    Abstract: A capacitor that includes a lower electrode; a dielectric film; an upper electrode; a first protective film that has a first through hole that opens to the upper electrode and a second through hole that opens to the lower electrode, and has a first upper surface; a second protective film that has a second upper surface located higher than the first upper surface of the first protective film; a first terminal electrode electrically connected to the upper electrode through the first through hole, and extends to at least the second upper surface of the second protective film; and a second terminal electrode electrically connected to the lower electrode through the second through hole, and extends to at least the second upper surface of the second protective film.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: October 18, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takeshi Kagawa, Junko Izumitani, Masatomi Harada, Hiroshi Matsubara, Nobuhiro Ishida
  • Patent number: 11443993
    Abstract: A package structure and a method of forming the same are provided. The package structure includes a package substrate, an interposer substrate over the package substrate, and multiple semiconductor devices over the interposer substrate. The interposer substrate also has one or more cavities to receive or accommodate additional semiconductor devices that are not allowed to be mounted on the surface of the interposer substrate. The cavities enable a thinner overall package structure. Some semiconductor devices received in the interposer substrate cavities may also be electrically connected to the interposer substrate and/or the semiconductor devices over the interposer substrate in order to improve the electrical performance of the overall package structure.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shin-Puu Jeng, Feng-Cheng Hsu, Shuo-Mao Chen
  • Patent number: 11424319
    Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a contact feature in a first dielectric layer, a first passivation layer over the contact feature, a bottom conductor plate layer disposed over the first passivation layer and including a first plurality of sublayers, a second dielectric layer over the bottom conductor plate layer, a middle conductor plate layer disposed over the second dielectric layer and including a second plurality of sublayers, a third dielectric layer over the middle conductor plate layer, a top conductor plate layer disposed over the third dielectric layer and including a third plurality of sublayers, and a second passivation layer over the top conductor plate layer.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: August 23, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsiang-Ku Shen, Dian-Hau Chen
  • Patent number: 11404215
    Abstract: A capacitor is disclosed. In an embodiment a capacitor includes at least two winding elements, a first busbar and a second busbar, wherein the first busbar and the second busbar connect the winding elements in parallel to each other, and wherein the first busbar and the second busbar are arranged such that they overlap each other.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: August 2, 2022
    Assignee: TDK ELECTRONICS AG
    Inventors: Manuel Gomez, Fernando Rodriguez, Tomas Wagner, David Pelaez
  • Patent number: 11393625
    Abstract: An electronic component includes an electronic component main body including a body and an external electrode disposed on the body. The body includes a dielectric layer and an internal electrode. The electronic component further includes a coating portion including a coating layer, disposed on an external surface of the electronic component main body, and a plurality of projections disposed on the coating layer.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: July 19, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jeong Suong Yang, Bon Seok Koo, Sang Wook Lee, Jung Min Kim, Sung Min Cho
  • Patent number: 11387052
    Abstract: A nonaqueous lithium-type power storage element comprising a positive electrode, a negative electrode, a separator, and a nonaqueous electrolytic solution containing lithium ions. The negative electrode has: a negative electrode collector; and a negative electrode active material layer containing a negative electrode active material, said negative electrode active material layer being provided on one surface or both surfaces of the negative electrode collector. The negative electrode active material contains a carbonaceous material capable of storing or releasing lithium ions. Furthermore, the positive electrode has: a positive electrode collector; and a positive electrode active material layer containing a cathode active material, said positive electrode active material layer being provided on one surface or both surfaces of the positive electrode collector. The positive electrode active material contains activated carbon.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: July 12, 2022
    Assignee: Asahi Kasei Kabushiki Kaisha
    Inventors: Yuima Kimura, Kazuteru Umetsu, Hitoshi Morita, Nobuhiro Okada, Yuichiro Hirakawa, Yusuke Yamahata
  • Patent number: 11362636
    Abstract: A multiplexer includes a first acoustic wave filter, a second acoustic wave filter, and an inductor-capacitor (LC) filter each connected to a common terminal. A passband of the second acoustic wave filter is between a passband of the first acoustic wave filter and a passband of the LC filter, a frequency gap between the passband of the second acoustic wave filter and the passband of the LC filter is greater than a frequency gap between the passband of the first acoustic wave filter and the passband of the second acoustic wave filter, the passband of the first acoustic wave filter includes a transmission band of the first communication band, the passband of the LC filter includes a reception band of the first communication band, and the passband of the second acoustic wave filter includes a reception band of a second communication band.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: June 14, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hirotsugu Mori
  • Patent number: 11360341
    Abstract: A display device is provided and including first and second substrates, wherein the first substrate includes a first area, a second area overlapping the second substrate, a first edge extending in a first direction, a first terminal portion on the first area; the second substrate has a first protruding portion protruding toward the first edge of the first substrate and a second edge including a linear portion along the first edge and a curved portion connected to the linear portion and extending toward the first edge, the curved portion constitutes a part of a edge of the first protruding portion, and a width in the first direction of the first protruding portion gradually decreases toward the first edge.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: June 14, 2022
    Assignee: Japan Display Inc.
    Inventors: Koji Ishizaki, Hayato Kurasawa, Masanobu Ikeda
  • Patent number: 11342125
    Abstract: A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: May 24, 2022
    Assignee: ROHM CO., LTD.
    Inventor: Keisuke Fukae
  • Patent number: 11342118
    Abstract: A multilayer ceramic capacitor includes a laminated body including a plurality of dielectric layers and a plurality of internal electrodes that are alternately laminated, and a first external electrode and a second external electrode provided on the surface of the laminated body. The first external electrode is provided on a first end surface of the laminated body, and extends from the first end surface of the laminated body to form a portion of the first side surface and a portion of the second side surface. The plurality of internal electrodes includes a first internal electrode and a second internal electrode. The first internal electrode is exposed at the first side surface and the second side surface of the laminated body and electrically connected to the first external electrode, and is not exposed at the first end surface of the laminated body.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: May 24, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kenichi Togou, Shinsuke Uchida
  • Patent number: 11335506
    Abstract: A ceramic electronic component includes a body including a capacitance formation portion including a dielectric layer and a plurality of internal electrodes disposed to face each other with the dielectric layer interposed therebetween and forming capacitance and protective portions disposed on upper and lower surfaces of the capacitance formation portion and external electrodes including electrode layers disposed on the body and connected to the plurality of internal electrodes and conductive resin layers respectively disposed on the electrode layers, wherein ta2/ta1 is 0.05 or greater, where ta1 is the thickness of the electrode layer at a central portion of the capacitance formation portion and ta2 is the thickness of the electrode layer at a boundary between the capacitance formation portion and the protective portion.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: May 17, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dong Yeong Kim, Dong Hwi Shin
  • Patent number: 11335501
    Abstract: A multilayer ceramic electronic component includes a multilayer body including a plurality of stacked ceramic layers and a plurality of stacked inner electrode layers, and outer electrodes on end surfaces of the multilayer body. The outer electrodes include underlying electrode layers on the end surfaces, conductive resin layers that cover the underlying electrode layers, and plating layers that cover the conductive resin layers. The underlying electrode layers are joined to the plating layers in connecting portions without the conductive resin layers interposed between the underlying electrode layers and the plating layers.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: May 17, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kota Zenzai
  • Patent number: 11335510
    Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer, and first and second internal electrodes with the dielectric layer interposed therebetween, and a first through-electrode passing through the body and connected to the first internal electrode; a second through-electrode passing through the body and connected to the second internal electrode; first and second external electrodes formed on the first and second surfaces and connected to the first through-electrode; and third and fourth external electrodes spaced apart from the first and second external electrodes and connected to the second through-electrode, wherein the first to fourth external electrodes are sintered electrodes including nickel, and each comprises a first plating layer and a second plating layer sequentially stacked on the sintered electrodes.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: May 17, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Taek Jung Lee, Byeong Chan Kwon, Jin Kyung Joo, Ji Hong Jo
  • Patent number: 11322302
    Abstract: A multilayer electronic component includes a body including a dielectric layer and internal electrodes alternately stacked with the dielectric layer interposed therebetween, and an external electrode disposed on the body and connected to the internal electrodes . An end portion of at least one of the internal electrodes in a longitudinal direction of the body is thicker than a central portion of the internal electrode, and a ratio t2/t1 of a thickness t2 of the end portion to a thickness t1 of the central portion satisfies 1.1?t2/t1?1.5.
    Type: Grant
    Filed: May 5, 2020
    Date of Patent: May 3, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suji Kang, Yuhong Oh, Byung Kun Kim, Yun Hee Kim, Min Jung Cho
  • Patent number: 11295895
    Abstract: Disclosed are apparatus and a method for providing an integrated multiterminal multilayer ceramic device that has three or more capacitive elements. Two of such capacitive elements may be in series, with a third in parallel. The integrated device may be packaged as an overmolded three leaded component, or can be mounted as SMD (surface mount device). The integrated device may also be combined with a separate varistor in a stacked arrangement of leaded components.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: April 5, 2022
    Assignee: KYOCERA AVX Components Corporation
    Inventors: Michael Kirk, Marianne Berolini
  • Patent number: 11276528
    Abstract: An electronic component includes a multilayer capacitor, including a capacitor body and first and second external electrodes disposed on both ends of the capacitor body, respectively, in a first direction, and a interposer including an interposer body and first and second external terminals in a second direction. The capacitor body includes a plurality of dielectric layers and a plurality of first and second internal electrodes exposed through the both ends of the capacitor body, respectively. The first and second external terminals each include a first layer including CuNi, a second layer covering the first layer and including copper (Cu), a third layer covering the second layer and including nickel (Ni), and a fourth layer covering the third layer and including tin (Sn), which are sequentially disposed from a respective inner side of the first and second external terminals.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: March 15, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Man Su Byun, Ho Yoon Kim, Soo Hwan Son
  • Patent number: 11264170
    Abstract: A capacitor component includes a body including dielectric layers, first and second internal electrodes, laminated in a first direction, facing each other, and first and second cover portions, disposed on outermost portions of the first and second internal electrodes, and first and second external electrodes, respectively disposed on both external surfaces of the body in a second direction, perpendicular to the first direction, and respectively connected to the first and second internal electrodes. An indentation including a glass is disposed at at least one of boundaries between the first internal electrodes and the first external electrode or one of boundaries between the second internal electrodes and the second external electrode.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: March 1, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jang Yeol Lee, Ji Hong Jo, Yoo Jeong Lee, Myung Jun Park, Jong Ho Lee, Hye Young Choi, Jae Hyun Lee, Hyun Hee Gu
  • Patent number: 11217393
    Abstract: A capacitor component includes a body including a dielectric layer and first and second internal electrodes disposed to face each other in a first direction while having the dielectric layer interposed therebetween, and including first and second surfaces, third and fourth surfaces, and fifth and sixth surfaces; first and second margin portions disposed on the fifth and sixth surfaces, respectively; first and second connection parts disposed on the third and fourth surfaces, respectively, and including metal layers connected to the first internal electrode and ceramic layers disposed on the metal layers; a connection electrode penetrating through the body and connected to the second internal electrode; a first external electrode disposed on one surface of the first connection part; a second external electrode disposed on one surface of the second connection part in the first direction; and a third external electrode disposed on the body and connected to the connection electrode.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: January 4, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sung Kwon An, Jin Kyung Joo, Taek Jung Lee, Min Gon Lee, Jin Man Jung
  • Patent number: 11217376
    Abstract: A laminated electronic component includes an element body and a pair of conductors. The element body is formed by laminating a plurality of element-body layers in a first direction. The pair of conductors is formed by laminating a plurality of conductor layers in the first direction. The pair of conductors is provided to the element body in such a way as to be separated from each other in a second direction orthogonal to the first direction. At a cross section orthogonal to the first direction, the pair of conductors has an uneven portion and the element body has an uneven portion engaged with the uneven portion of the pair of conductors.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: January 4, 2022
    Assignee: TDK CORPORATION
    Inventors: Shunji Aoki, Yuya Ishima, Hajime Kato, Yuto Shiga, Kazuya Tobita, Youichi Kazuta, Satoru Okamoto
  • Patent number: 11217391
    Abstract: An electronic component includes an element body and an external electrode disposed on the element body. The element body includes a principal surface arranged to constitute a mounting surface and an end surface adjacent to the principal surface. The external electrode includes a conductive resin layer disposed to continuously cover a part of the principal surface and a part of the end surface, and a plating layer covering the conductive resin layer. The conductive resin layer includes a first region positioned on the end surface and a second region positioned on the principal surface. A maximum thickness of the second region is larger than a maximum thickness of the first region.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: January 4, 2022
    Assignee: TDK CORPORATION
    Inventors: Yuichi Nagai, Atsushi Takeda, Takehisa Tamura, Shinya Onodera
  • Patent number: 11197372
    Abstract: An embodiment of the present invention provides a capacitor having a through hole structure and a manufacturing method therefor. The capacitor having the through hole structure includes: a baseboard having a through hole penetrating from an upper surface of the baseboard to a lower surface thereof; a first conductive layer formed on an internal surface of the through hole, and the upper surface of the baseboard, the lower surface thereof, or both the upper and lower surfaces thereof; a first dielectric layer formed on the first conductive layer; and a second conductive layer formed on the first dielectric layer.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: December 7, 2021
    Assignee: KOREA ELECTRONICS TECHNOLOGY INSTITUTE
    Inventors: Jong Min Yook, Jun Chul Kim, Dong Su Kim
  • Patent number: 11177070
    Abstract: Provided are an electric shock protection device and method of manufacturing the same. The electric shock protection device may include a capacitor unit comprising multiple sheet layers and multiple capacitor electrodes provided on the sheet layers and has an electric shock prevention function and a communication signal transmission function; a pair of soldering electrodes formed on the sheet layer disposed at an outermost side among the sheet layers, extend from both ends toward a center of the capacitor unit, and are formed as electrodes for co-firing; a pair of terminal electrodes provided at both ends of the sheet layers and connecting the capacitor electrodes to the pair of soldering electrodes; a varistor connected to the pair of soldering electrodes through solders and formed as a single component; and a molding portion molded on the varistor, the pair of soldering electrodes, and one side of each of the terminal electrodes.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: November 16, 2021
    Inventors: Kyu Hwan Park, Jun Suh Yu
  • Patent number: 11177267
    Abstract: A semiconductor structure includes a substrate; a first dielectric layer disposed over the substrate; a transistor disposed within the first dielectric layer; a second dielectric layer disposed over the first dielectric layer; and a capacitor disposed within the second dielectric layer and electrically connected to the transistor, wherein the capacitor includes a first electrode, a dielectric stack disposed over the first electrode, and a second electrode disposed over the dielectric stack, the dielectric stack includes a ferroelectric layer and an electrostrictive layer. Further, a method of manufacturing a semiconductor structure includes disposing an electrostrictive material over a first electrode layer; disposing a ferroelectric material over the first electrode layer; removing a portion of the ferroelectric material to form the ferroelectric material; and removing a portion of the electrostrictive material to form the electrostrictive layer.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: November 16, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Mauricio Manfrini, Sai-Hooi Yeong, Han-Jong Chia, Chenchen Jacob Wang
  • Patent number: 11170938
    Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer, and first and second internal electrodes configured to be layered in a third direction with the dielectric layer interposed therebetween and having first and second connection portions, respectively, and including first, second, third, fourth, fifth and sixth surfaces; a first external electrode disposed on the fifth surface of the body; and a second external electrode disposed on the fifth surface of the body. The first internal electrode is exposed to the third surface and the fifth surface of the body through the first connection portion, and the second internal electrode is exposed to the fourth surface and the fifth surface of the body through the second connection portion.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: November 9, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Sun Cheol Lee
  • Patent number: 11164702
    Abstract: A multi-layered ceramic electronic component includes: a ceramic body including a dielectric layer and first and second internal electrodes disposed to oppose each other with the dielectric layer interposed therebetween; and first and second external electrodes disposed outside of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The first internal electrode is exposed from a first surface of the ceramic body and the second internal electrode is exposed from a second surface opposing the first surface. The first internal electrode has a notch portion disposed inwardly of a portion facing the first surface and, and the second internal electrode has a notch portion disposed inwardly of a portion facing the second surface. Each of the notch portions and a margin portion of the ceramic body in a second direction and in a third direction are provided with a step absorption layer, respectively.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: November 2, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Gi Seok Jeong, Ho In Jun, Sun Cheol Lee
  • Patent number: 11164700
    Abstract: A multilayer capacitor includes a body, including a stacked structure formed of a plurality of dielectric layers and a plurality of internal electrodes, and a plurality of external electrodes. Each external electrode includes a conductive layer, disposed at the end of the body and connected to the plurality of internal electrodes, and a plating layer covering the conductive layer. Each conductive layer includes nickel (Ni) and barium titanate (BT), and an area occupied by nickel with respect to the total area of the respective conductive layer is 30% to 65%.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: November 2, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sung Hyung Kang, Yong Koo Kim, Hyung Kyu Kim, Won Hee Yoo, Jong Hyun Cho, Byung Kil Yun, Seok Kyoon Woo, Hyun Sung Dong
  • Patent number: 11158459
    Abstract: A ceramic electronic component includes a ceramic body having first and second end surfaces facing each other, first and second side surfaces facing each other, first and second principal surfaces facing each other, and also includes outer electrodes each of which is provided on at least one portion of a corresponding one of the first and second end surfaces of the ceramic body. Each of the outer electrodes includes an underlying electrode layer provided on at least one portion of a corresponding one of the first and second end surfaces of the ceramic body and also includes a plating layer provided on a corresponding one of the underlying electrode layers and on a corresponding one of regions different from the underlying electrode layers.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: October 26, 2021
    Assignee: MURATA MANUFACTURING COMPANY, LTD.
    Inventors: Syunsuke Takeuchi, Yusuke Arakawa, Masaki Tsutsumi
  • Patent number: 11133132
    Abstract: A multilayer electronic component includes a capacitor body having first to six surfaces, the capacitor body including a dielectric layer and first and second internal electrodes having one ends exposed through the third and fourth sides, respectively, first and second external electrodes including first and second connection portions disposed on the third and fourth surfaces of the capacitor body, respectively, and first and second band portions spaced apart from each other on the first surface of the capacitor body, respectively, a first connection terminal disposed on the first band portion and having a first cutout disposed in a lower surface thereof, open toward the third surface of the capacitor body, and a second connection terminal disposed on the second band portion and having a second cutout formed in a lower surface thereof, open toward the fourth surface of the capacitor body.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: September 28, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Heung Kil Park, Se Hun Park, Hun Gyu Park, Tae Hoon Kim, Gu Won Ji
  • Patent number: 11120946
    Abstract: A micro-electronic electrode assembly having a first electrode arranged on a substrate is provided, wherein the first electrode has a thin layer made of a first electrode material having a solid state lattice, wherein the first electrode material oxidizes upon contact with oxygen-containing compounds and has a perovskite or perovskite-derived crystal structure, and wherein the electrode has a functional surface facing away from the substrate, a separation layer is arranged on the functional surface of the electrode, which prevents an oxidation of the electrode material in the region of the functional surface, the oxidation changing the properties of the electrode. An electrically insulating functional layer is arranged on the separation layer and a second electrode is arranged on the electrically insulating functional layer.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: September 14, 2021
    Assignee: TECHNISCHE UNIVERSITÄT DARMSTADT
    Inventors: Aldin Radetinac, Arzhang Mani, Philipp Komissinskiy, Lambert Alff, Mohammad Nikfalazar
  • Patent number: 11107639
    Abstract: This positive electrode precursor includes: a positive electrode active material containing a carbon material and an alkali metal compound, wherein 5?A?35, when A (g/m2) is a weight of the alkali metal compound in the positive electrode active material layer at one surface of the positive electrode precursor, 10?B?100 as well as 0.20?A/B?1.00, when B (g/m2) is a weight of the positive electrode active material in the positive electrode active material layer, and 1?C?20, when C (m2/cm2) is a specific surface area per unit area as measured by the BET method at one surface of the positive electrode precursor.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: August 31, 2021
    Assignee: Asahi Kasei Kabushiki Kaisha
    Inventors: Kazuteru Umetsu, Nobuhiro Okada, Keita Kusuzaka
  • Patent number: 11107631
    Abstract: A ceramic electronic device includes: a ceramic main body having at least two edge faces facing each other; and external electrodes formed on the two edge faces, wherein: the external electrodes have a structure in which a plated layer is formed on a ground layer having ceramic; a main component of the ground layer is a metal; the external electrodes have an extension region that extends to at least one of four side faces from the two edge faces of the ceramic main body; a part of the extension region corresponding to a corner portion of the ceramic main body has a first portion having a maximum spaced distance of 10 ?m or less in a face direction of the ground layer; and the plated layer has an average thickness that is 30% or more with respect to the maximum spaced distance, and covers the first portion.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: August 31, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Hiroaki Uenishi, Takehiko Kamobe, Tomoaki Nakamura
  • Patent number: 11069479
    Abstract: A multilayer capacitor may include a capacitor body including an active area including a plurality of dielectric layers, and a plurality of first and second internal electrodes, upper and lower cover layers disposed on upper and lower surfaces of the active area, and having first to six external surfaces; first and second external electrodes including first and second connection portions and first and second band portions, respectively; and a plurality of dummy electrodes disposed on the upper and lower cover layers with a dielectric layer interposed therebetween, and exposed through corners of the capacitor body, a portion of the plurality of dummy electrodes being disposed between the upper and lower surfaces of the capacitor body and the first and second band portions.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: July 20, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hee Soo Lee, Ah Young Shin, Dong Hoon Kim, Jong Hoon Kim, Hong Seok Kim, Jong Ho Lee
  • Patent number: 11049651
    Abstract: An electronic component includes a first external electrode disposed on a first end surface and a second external electrode disposed on a second end surface. The first external electrode includes a first conductive layer including ceramic particles. The second external electrode includes a second conductive layer including ceramic particles. An end portion of a first internal electrode is located inside the first conductive layer. The electronic component includes little or no cracks and has a low equivalent series resistance (ESR).
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: June 29, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tomohiro Kageyama, Tetsuo Kawakami, Manabu Sakai, Ryuki Kakuta, Takahiro Hirao, Takashi Ohara
  • Patent number: 11043332
    Abstract: In an embodiment, a multilayer ceramic capacitor 10 includes a capacitor boy 11 which has a sixth face f6 provided with a first tapering face f6a over the entire width direction and at a position adjacent to a first face f1, and which also has a second tapering face f6b over the entire width direction and at a position adjacent to a second face f2. The height-direction dimension of the first tapering face f6a on the sixth face f6 is constituted in a manner accommodating an error in the end height of the first part 12a of the first external electrode 12, while the height-direction dimension of the second tapering face f6b on the sixth face f6 is constituted in a manner accommodating an error in the end height of the first part 13a of the second external electrode 13.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: June 22, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Toru Makino
  • Patent number: 11037871
    Abstract: An improved electronic assembly is provided. The electronic assembly comprises a ceramic interposer comprising multiple layers. The active layers of the multiple layers form an embedded capacitor comprising parallel electrodes with a dielectric between adjacent electrodes wherein adjacent electrodes have opposite polarity. A wide band gap device is also on the multilayered ceramic interposer.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: June 15, 2021
    Assignee: KEMET Electronics Corporation
    Inventors: Allen Templeton, John Bultitude, Lonnie G. Jones, Philip M. Lessner
  • Patent number: 11024461
    Abstract: A multi-layer ceramic electronic component includes: a ceramic body including a main surface facing in a first direction, an end surface facing in a second direction orthogonal to the first direction, a side surface facing in a third direction orthogonal to the first and second directions, and internal electrodes laminated in the first direction; and an external electrode formed on a surface of the ceramic body, the external electrode including a base film including an end-surface-covering portion that covers the end surface, and a main-surface-covering portion that covers part of the main surface continuously from the end-surface-covering portion, an electrically conductive thin film including a base-covering portion that covers the main-surface-covering portion, and a ceramic-body-covering portion that extends from the base-covering portion in the second direction and covers part of the main surface, and a plating film that covers the electrically conductive thin film and the base film.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: June 1, 2021
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Yasutomo Suga, Masataka Watabe, Jun Nishikawa, Sadayoshi Kato
  • Patent number: 11017930
    Abstract: An inductor includes a body structure, a first external electrode and a second external electrode disposed externally on the body structure and spaced apart from each other, and a conductive structure disposed inside the body structure and including a first end portion in contact with the first external electrode and a second end portion in contact with the second external electrode, wherein each of the first and second external electrodes includes an electroless plated layer and an electrolytic plated layer formed of a material different from that of the electroless plated layer and covering the electroless plated layer.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: May 25, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Mi Sun Hwang, Jin Gul Hyun
  • Patent number: 11018068
    Abstract: Described herein are methods and apparatuses for packaging an ultrasound-on-a-chip. An ultrasound-on-a-chip may be coupled to a redistribution layer and to an interposer layer. Encapsulation may encapsulate the ultrasound-on-a-chip device and first metal pillars may extend through the encapsulation and electrically couple to the redistribution layer. Second metal pillars may extend through the interposer layer. The interposer layer may include aluminum nitride. The first metal pillars may be electrically coupled to the second metal pillars. A printed circuit board may be coupled to the interposer layer.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: May 25, 2021
    Assignee: Butterfly Network, Inc.
    Inventors: Jianwei Liu, Keith G. Fife
  • Patent number: 11004605
    Abstract: A multilayer ceramic capacitor includes: a ceramic multilayer structure having a structure in which each of ceramic dielectric layers and each of internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the ceramic multilayer structure, a main phase of the plurality of ceramic dielectric layers having a perovskite structure that includes Ca and Zr and is expressed by a general formula ABO3; and a pair of external electrodes that are formed on the two edge faces, wherein 300×TE/TA?12?30 is satisfied when a volume TA is a length CL×a width CW×a thickness CT of the ceramic multilayer structure and a volume TE is a length EL×a width EW×a thickness ET×a stacked number of the plurality of internal electrode layers in a capacity region.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: May 11, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Michio Oshima, Atsuhiro Yanagisawa, Yoshinori Shibata, Daisuke Iwai, Hiroyuki Moteki
  • Patent number: 10998132
    Abstract: A capacitor includes an electrically insulating housing that encloses an interior volume, first and second conductive connection pads that are each configured as externally accessible points of electrical contact to internal electrodes of the capacitor that are disposed within the housing, and an active capacitor dielectric material disposed within the housing and being configured as a dielectric medium between the internal electrodes, the first conductive connection pad having a first planar contact surface that is substantially parallel to a first sidewall of the housing, the second conductive connection pad having a second planar contact surface that is substantially parallel to the first sidewall, the first and second planar contact surfaces being offset from one another in a direction that is orthogonal to the first sidewall.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: May 4, 2021
    Assignees: Infineon Technologies AG, TDK Electronics AG
    Inventors: Tomas Manuel Reiter, Karl Niklas
  • Patent number: 10957486
    Abstract: An electronic component includes a capacitor body having alternately stacked first and second internal electrodes with dielectric layers therebetween, the capacitor body having first to sixth surfaces and the first internal electrodes and the second internal electrodes being exposed through the third surface and the fourth surface, respectively. First and second external electrodes are disposed respectively on the third and fourth surfaces of the body and respectively connected to the first and second internal electrodes. A shielding layer includes a cap portion disposed on the second surface of the capacitor body and a side wall portion disposed on the third, fourth, fifth, and sixth surfaces of the capacitor body, and an insulating layer is disposed between the capacitor body and the shielding layer. The shielding layer consists of first and second shielding layers offset from each other in a direction connecting the third and fourth surfaces.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: March 23, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chan Yoon, Sang Soo Park, Hwi Dae Kim, Woo Chul Shin, Ji Hong Jo
  • Patent number: 10944399
    Abstract: Described is an apparatus which comprises: a 4-state input magnet; a first spin channel region adjacent to the 4-state input magnet; a 4-state output magnet; a second spin channel region adjacent to the 4-state input and output magnets; and a third spin channel region adjacent to the 4-state output magnet. Described in an apparatus which comprises: a 4-state input magnet; a first filter layer adjacent to the 4-state input magnet; a first spin channel region adjacent to the first filter layer; a 4-state output magnet; a second filter layer adjacent to the 4-state output magnet; a second spin channel region adjacent to the first and second filter layers; and a third spin channel region adjacent to the second filter layer.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: March 9, 2021
    Assignee: Intel Corporation
    Inventors: Sasikanth Manipatruni, Ian A. Young, Dmitri E. Nikonov, Uygar E. Avci, Patrick Morrow, Anurag Chaudhry
  • Patent number: 10916493
    Abstract: A direct current (DC) blocking capacitor can be used with an integrated circuit (IC) package. The DC blocking capacitor can include a first electrically conductive planar surface having a first area and a second electrically conductive planar surface having a second area greater than the first area. The second planar surface is in a parallel planar orientation to the first planar surface. The DC blocking capacitor can also include a first set of electrically conductive plates electrically connected to the first planar surface and a second set of electrically conductive plates electrically connected to the second planar surface. The second set of electrically conductive plates is interleaved with and electrically insulated from the first set of electrically conductive plates by a dielectric material.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: February 9, 2021
    Assignee: International Business Machines Corporation
    Inventors: Darryl Becker, Mark J. Jeanson, Gerald Bartley, Matthew Doyle
  • Patent number: 10910163
    Abstract: A multilayer electronic component include a multilayer capacitor including a capacitor body and first and second external electrodes disposed on ends of the capacitor body, respectively; an alumina chip including a chip body and first and second external terminals disposed on ends of the chip body, respectively, the first and second external terminals being in contact with the first and second external electrodes, respectively; a first plating layer covering the first external electrode and the first external terminal; and a second plating layer covering the second external electrode and the second external terminal. The first and second plating layers each include a nickel plating layer a tin plating layer disposed on the first external electrode and the first external terminal and on the second external electrode and the second external terminal, respectively.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: February 2, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dae Heon Jeong, Kyung Hwa Yu, Man Su Byun, Min Kyoung Cheon, Soo Hwan Son, Ho Yoon Kim
  • Patent number: 10903005
    Abstract: A composite electronic component includes a capacitor including a capacitor body including a dielectric layer and first and second internal electrodes alternately stacked with the dielectric layer interposed therebetween, and first and second electrodes disposed on the capacitor body, and a varistor including a varistor body including ZnO and third and fourth electrodes disposed on the varistor body, wherein the first electrode is electrically connected to the third electrode and the second electrode is electrically connected to the fourth electrode.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: January 26, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hae In Kim, Eun Ju Oh, Yong Sung Kim
  • Patent number: 10879003
    Abstract: An electronic component includes a body in which external electrodes are disposed on opposing surfaces of the body in a first direction thereof, respectively; and a pair of metal frames connected to the external electrodes, respectively, wherein the metal frame includes a support portion bonded to the external electrodes, and a mounting portion extending in the first direction from a lower end of the support portion and spaced apart from the body and the external electrodes, and a length of the mounting portion in a second direction perpendicular to the first direction is smaller than a length of the body in the second direction.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: December 29, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Beom Joon Cho, Sang Soo Park, Ki Young Kim, Woo Chul Shin
  • Patent number: 10861648
    Abstract: An electronic component includes: a capacitor array including a plurality of multilayer capacitors which are sequentially arranged in a first direction, and first and second metal frames disposed on both side surfaces of the capacitor array and connected to first and second external electrodes of the plurality of multilayer capacitors, respectively; the first and second metal frames include first and second support portions, and first and second mounting portions, respectively; and the first and second mounting portions include first and second portions opposing each other toward the center of the capacitor array, and third and fourth portions positioned outside the first and second portions, respectively, and a length of each of the first and second portions is shorter than a length of each of the third and fourth portions.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: December 8, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Beom Joon Cho, Sang Soo Park, Ki Young Kim, Woo Chul Shin