Processing apparatus and processing method

- TOKYO ELECTRON LIMITED

A processing apparatus according to the present invention, which conditions a substrate placed on a table equipped with a heater by radiating an electron beam onto the substrate while heating the substrate with the heater, includes at least three projecting portions for holding the substrate at a predetermined distance from the table. This structure minimizes the extent of uneven heating of the substrate, which, in turn, enables uniform processing of the surface on the substrate.

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Description
CROSS REFERENCE TO RELATED APPLICATIONS

This document claims priority to Japanese Patent Application No. 2005-024271, filed Jan. 31, 2005 and U.S. Provisional Application No. 60/653,100 filed Feb. 16, 2005, the entire contents of which are hereby incorporated by reference

FIELD OF THE INVENTION

The present invention relates to a processing apparatus and a processing method. More specifically, it relates to a processing apparatus and a processing method with which the surface of a substrate, such as a wafer, is processed by radiating, for instance, an electron beam.

BACKGROUND OF THE INVENTION

A semiconductor device formed on a work substrate (hereafter simply referred to as a “substrate”) normally adopts a multilayer wiring structure which includes a plurality of wiring films and a plurality of insulating films insulating the individual wiring films from one another. It is crucial that the parasitic capacity at the insulating films disposed between the wiring films be minimized in order to assure higher processing speed at such a semiconductor device. The parasitic capacity at the insulating films can be kept to a low level by constituting them with a material having a lower dielectric constant (a low K material).

Such an insulating film is coated onto the surface of the substrate by employing, for instance, a spin coater and a baking furnace. Since the insulating film is usually constituted of an organic material and a low dielectric constant is sometimes achieved by raising the porosity of the material, it tends to have inferior mechanical strength.

In some processing apparatuses, an electron beam, an ultraviolet beam or the like is radiated onto the substrate having an insulating film formed thereupon so as to improve the mechanical strength of the insulating film constituted of an organic material. For instance, in a processing apparatus in which an electron beam is radiated, the insulating film on the surface of the substrate placed on a table at which a heater is disposed is conditioned by radiating the electron beam onto the substrate surface while heating the substrate with the heater, so as to assure a desired level of mechanical strength.

During this process, the electron beam must be radiated while the temperature over the surface of the substrate is controlled so as to achieve the highest possible level of temperature consistency, in order to ensure that the insulating film is uniformly processed over its entire surface. The processing apparatuses proposed in the related art by addressing this need include the following.

Japanese Laid Open Patent Publication No. 2004-207314 (reference 1) discloses an electron beam processing apparatus that monitors the intensity of electron beam radiation by utilizing a current monitor disposed in the vicinity of the substrate placed on the table.

International Publication No. 03/067636 (reference 2) discloses a surface processing apparatus that includes a table capable of moving up/down to facilitate an optimal adjustment of the distance between an electron beam radiating mechanism and the table and evenly processes the insulating film formed at the surface of the substrate by radiating an electron beam onto the substrate. In this surface processing apparatus, the energy level of the electron beam is controlled by applying a DC voltage to the table in order to process the insulating film to a uniform depth over the entire surface thereof.

However, there is a problem in the art disclosed in reference 1 in that since the substrate is placed directly on the table, thermal deformation of the substrate, which may occur during the processing of the substrate, will result in uneven contact between the substrate and the table. Such uneven contact, in turn, will lead to uneven heating at the substrate surface, which will make it very difficult to process the substrate uniformly over its entire surface. In addition, since the intensity of the electron beam radiation on the substrate is measured with the current monitor disposed near the substrate, the intensity of the electron beam radiation at the substrate surface is not directly measured.

In addition, while the insulating film is processed to a uniform depth by processing the surface of the substrate with the table moved up/down so as to set it at an optimal distance from the electron beam radiating mechanism or by controlling the energy of the electron beam with the DC voltage applied to the table in the art disclosed in reference 2, the substrate is placed directly on the table in this case, too, which gives rise to uneven heating of the substrate, as in reference 1. Also, the intensity of the electron beam radiation at the substrate surface cannot be directly measured.

Japanese Laid Open Patent Publication No. H10-261695 (reference 3) discloses a technology for achieving a high level of pattern alignment accuracy in an electron beam patterning apparatus by holding the substrate without allowing it to become deformed and also by preventing a charge buildup at the substrate. In order to prevent a charge buildup, one of the holding numbers, i.e., either an upper holding member or a lower holding member, for holding the substrate is formed by using an electrically conductive material, and the holding member constituted of the electrically conductive material is grounded. In addition, Japanese Laid Open Patent Publication No. H11-111599 (reference 4) discloses an electron beam patterning apparatus in which the potential at the substrate electrostatically held by an electrostatic holding device during substrate processing is minimized so as to reduce the extent to which the electron beam trajectory is affected by the potential. In this art, in order to minimize the potential attributable to the leak current at the wafer when electrostatically holding the wafer, a reverse potential is applied to the conducting jig which achieves electrical continuity with the wafer. Japanese Laid Open Patent Publication No. H3-011541 (reference 5) discloses a technology adopted in an ion transplanting device to prevent electrons from becoming deposited on the wafer in a large quantity by applying a DC voltage to the wafer.

However, the technologies in references 3, 4 and 5 each intended to prevent a charge buildup at the substrate by using a conductive material so as to improve the patterning accuracy of an electron beam patterning apparatus or to reduce the extent of the adverse effect of the potential at the substrate on the electron beam trajectory in the vicinity of the substrate by minimizing the potential, are not designed to condition the substrate surface. For this reason, none of these references refer to a specific technology for detecting the intensity of electron beam radiation onto the substrate.

SUMMARY OF THE INVENTION

An object of the present invention, which has been conceived to address the problems discussed above, is to uniformly process the entire surface of the substrate by reducing the extent of uneven heating at the substrate. Another object of the present invention is to enable direct measurement of the intensity of electron beam radiation onto the substrate.

The objects described above are achieved in an aspect of the present invention by providing A processing apparatus that conditions a substrate placed on a table equipped with a heater by radiating an electron beam onto the substrate while heating the substrate with the heater, characterized in that at least three projecting portions for holding the substrate at a specific distance from the table are disposed at the table.

The projecting portions in the present invention may be constituted of, for instance, an electrically conductive material and may be electrically grounded via a current detecting means. Such an apparatus may include a current control means for controlling a current flowing through the current detecting means. In addition, the processing apparatus may include a switch capable of switching the projecting portions between an electrically grounded state and an ungrounded state. Alternatively a voltage detecting means and a DC power source may be connected with the projecting portions which may be constituted with an electrically conductive material.

The objects described above are achieved in another aspect of the present invention by providing an apparatus that conditions a substrate placed on a table by radiating an electron beam onto the substrate, comprising a ground wiring that electrically grounds the substrate and a current control means disposed at the ground wiring to control a current flowing through the ground wiring. The current control means may have, for instance, a variable resistance element with an adjustable current resistance value.

The objects described above are also achieved in yet another aspect of the present invention by providing a method for conditioning a substrate placed on a table equipped with a heater by radiating an electron beam onto the substrate while heating the substrate with the heater, characterized in that when processing the substrate, the substrate is lifted from the table by a predetermined distance via at least three projecting portions.

The projecting portions may be constituted of, for instance, an electrically conductive material and may be electrically grounded via a current detecting means. In this method a current flowing through the current detecting means may be controlled via a current control means. In addition, the projecting portions may be switched between an electrically grounded state and an ungrounded state. Alternatively, a voltage detecting means and a DC power source may be connected to the projecting portions constituted of, for instance, an electrically conductive material may be connected with a voltage detecting means and a DC power source so as to enable application of a DC voltage to the projecting portions.

The objects described above are achieved in a further aspect of the present invention by providing a processing method for conditioning a substrate placed on a table by radiating an electron beam onto the substrate, comprising steps for electrically grounding the substrate via a ground wiring when processing the substrate and controlling a current flowing through the ground wiring with a current control means. The current control means used in this method may be a variable resistance element and the method may further include a step for adjusting a current resistance value at the variable resistance element.

According to the present invention described above, the entire surface of the substrate can be processed uniformly by minimizing the extent of uneven heating of the substrate and the intensity of the electron beam radiation at the substrate can be directly measured.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a sectional view schematically illustrating the structure adopted in the processing apparatus achieved in a first embodiment of the present invention;

FIG. 2 is a plan view of the layout of the electron beam tubes in FIG. 1;

FIG. 3 shows the holding pins in FIG. 1, with FIG. 3A presenting a plan view of their layout and FIG. 3B presenting a conceptual diagram of a holding pin in a grounded state;

FIG. 4 is a sectional view schematically showing the essential structure adopted in the processing apparatus achieved in a second embodiment of the present invention;

FIG. 5 is a sectional view schematically showing the essential structure adopted in the processing apparatus achieved in a third embodiment of the present invention; and

FIG. 6 is a graph of the relationships achieved between the gas pressure of a specific type of gas in the processing chamber and the wafer temperature as the wafer is processed in the processing chamber in FIG. 1.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The following is a detailed explanation of the preferred embodiments of the present invention given in reference to the attached drawings. It is to be noted that in the specification and the drawings, the same reference numerals are assigned to components having substantially identical functions and structural features to preclude the necessity for a repeated explanation thereof.

First Embodiment

The processing apparatus achieved in the first embodiment of the present invention is now explained in reference to drawings. FIG. 1 is a sectional view schematically showing the structure adopted in the processing apparatus in the first embodiment of the present invention, FIG. 2 is a plan view of the layout of the electron beam tubes in FIG. 1 and FIG. 3 shows the holding pins in FIG. 1, with FIG. 3A presenting a plan view of their layout and FIG. 3B presenting a conceptual view of a holding pin in a grounded state.

As shown in FIGS. 1 and 2, the processing apparatus 1 achieved in the first embodiment includes a processing chamber 2 constituted of aluminum or the like, which can be depressurized. At the center of the bottom surface within the processing chamber 2, a table 3 on which a substrate (wafer) W undergoing processing is placed is disposed. At the upper surface of the processing chamber 2 facing opposite the table 3, an electron beam radiating mechanism 4 constituted with a plurality of electron beam tubes 4A disposed in a concentric pattern and a grid electrode that controls the intensity of the electron beams B radiated from the electron beam radiating mechanism 4 are mounted.

The following processing is executed in the processing apparatus 1 under control implemented on various units thereof based upon a control program installed in, for instance, a control device 6. Namely, an inert gas is drawn into the processing chamber 2 in which a predetermined degree of vacuum is sustained, and electron beams B are radiated over the entire surface of a wafer W on the table 3 from the electron beam radiating mechanism 4. An insulating film formed on the surface of the wafer W is thus conditioned. The inert gas may be, for instance, Ar, He, Xe or the like. The insulating film may be formed by using an organic material constituted of elements such as Si, O, C and H. The insulating film may be used as a layer insulating film or a protective film.

The plurality of electron beam tubes 4A constituting the electron beam radiating mechanism 4 include an electron beam tube 4A disposed at the center of the upper surface of the processing chamber 2, six electron beam tubes 4A disposed around the central electron beam tube 4A and twelve electron beam tubes 4A disposed around the six electron beam tubes 4A, as shown in FIG. 2.

The electron beam tubes 4A each include an electron beam transmission window and their internal spaces are disconnected from the processing space within the processing chamber 2. The transmission windows are constituted of, for instance, transparent quartz glass, and the grid electrode 5 is disposed under the transmission windows so as to face opposite the transmission windows.

An elevating mechanism 7 is linked to the lower surface of the table 3 so as to raise/lower the table 3 via a ball screw 7A of the elevating mechanism 7. The lower surface of the table 3 and the bottom surface of the processing chamber 2 are linked via a stainless steel bellows 8 that expands/contracts freely. A desired level of air tightness is maintained inside the processing chamber 2 via the bellows 8. In addition, a bellows cover 12 is disposed at the lower surface of the table 3 so as to enclose the bellows 8.

A transfer port 2A through which a wafer W is transferred is formed at the circumferential surface of the processing chamber 2, and a gate valve 9 is mounted at the transfer port 2A so as to open/close the transfer port as necessary. A gas supply port 2B is formed at the processing chamber 2 above the transfer port 2A, whereas a gas discharge port 2C is formed at the bottom surface of the processing chamber 2. A gas supply source (not shown) is connected via a gas supply pipe 10 to the gas supply port 2B, and an evacuating device (not shown) is connected via a gas discharge pipe 11 to the gas discharge port 2C.

The table 3 is formed by using a ceramic material such as quartz. A heater 13 is installed in the table 3, and a temperature sensor 14 is mounted at the heater 13. The heater 13 and the temperature sensor 14 are both connected to a temperature control device 6A, which is constituted as part of the control device 6 so that the temperature at the heater 13 is controlled to sustain a desirable level based upon the temperature detected by the temperature sensor 14 under control executed by the temperature control device 6A. Since the table 13 includes the internal heater 13, as described above, the table 3 itself functions as a heater.

At the table 3, a plurality of (seven in this example) holding pins 15 are mounted as shown in FIGS. 1, 3A and 3B, and the wafer W is supported by the holding pins 15. The upper portions of the holding pins 15 are made to project out beyond the upper surface of the table 3, whereas their lower portions are embedded in the table 3. The holding pins 15 represent a specific example of projecting portions that hold the wafer at a predetermined distance from the table 3.

As shown in FIG. 3A, one of the holding pins 15 is disposed at the center of the table 3, whereas the remaining six holding pins 15 are disposed around the central holding pin 15 on a single circumference over equal intervals along the circumferential direction so as to form the shape of a substantially regular hexagon on the plane. These holding pins 15 are formed by using an electrically conductive material such as stainless steel, silicon carbide or silicon and thus achieve electrical continuity with the wafer W that they support.

It is to be noted that while the holding pins 15 are disposed on a single circumference in the example presented in FIG. 3A, the present invention is not limited to this example and they may be disposed on a plurality of circumferences of circles of varying radii. In addition, the minimum number of holding pins 15 that must be disposed on a circumference is three. If only three holding pins 15 are disposed on the circumference, they should be set so as to form the shape of a substantially equilateral triangle. In such a case, it is not necessary to dispose a holding pin at the center.

The height h representing the extent by which the holding pins 15 project out from the table 3 should be set to a value that does not allow the wafer W to come in contact with the upper surface of the table 3 even if it becomes thermally deformed and also ensures that the wafer W receives the heat radiated from the table 3 within the closest possible range for efficient heating. In more specific terms, it is desirable to set the height h to approximately 0.2 mm in conjunction with a 300 mm wafer W.

The diameter d of the holding pins 15 is set to, for instance, 2˜3 mm. The holding pins 15 are mounted so that they project out of the upper surface of the table 3 by approximately 0.2 mm.

With the seven holding pins 15 structured as described above, the wafer W is supported without contacting the table 3 and, at the same time, is heated with the heat radiated from the table 3 present within a close range. As a result, the wafer W does not become contaminated through contact with the table 3, and also, even if the wafer W becomes thermally deformed, the heat radiated from the table 3 uniformly heats the entire surface of the wafer W.

In addition, as shown in FIGS. 1 and 3B, a shielding electrode 16 disposed atop the heater 13 is electrically connected with the holding pins 15, and the electrode 16 is grounded via a ground wiring 17. A switch 18 is mounted at the ground wiring 17 so as to switch the holding pins 15 to an electrically grounded state or an ungrounded state via the switch 18. An ammeter 19 is disposed at the ground wiring 17 and thus, the current flowing from the wafer W to the holding pins 15 can be measured by the ammeter 19. The switch 18 and the ammeter 19 are both connected to the control device 6 and thus, the switch 18 and the ammeter 19 are engaged in operation under control executed by the control device 6.

As the wafer W is processed while the holding pins 15 are grounded via the switch 18 in the substrate processing apparatus structured as described above, electrons radiation at the wafer W flow from the wafer W through the ground wiring 17 via the holding pins 15 and the electrode 16. Thus, the wafer W does not become charged and, at the same time, the intensity of the electron beam radiation at the wafer W can be directly measured with the ammeter 19.

Accordingly, prior to wafer processing, the relationship between the intensity of the electron beam radiation onto a reference wafer W (e.g., an unprocessed wafer is that has not undergone processing such as film formation) and the voltage at the electron beam tubes 4A or the like may be ascertained, and specific conditions may be set for the electron beam tubes 4A when actually processing a wafer W so as to automatically process the wafer W under optimal conditions. In addition, if there is any risk of the wafer W undergoing the processing becoming damaged by the electron beams B or the plasma generated by using the electron beams B depending upon the wafer processing conditions, the switch 18 is disconnected, to electrically isolate the wafer W from the ground potential.

Next, the operations executed in the processing apparatus are explained. The processing apparatus 1 achieved in the first embodiment is driven based upon a control program installed in the control device 6 and executes processing for conditioning the wafer W (e.g., processing for conditioning an insulating film on the wafer) through the following procedure. It is to be noted that the processing apparatuses achieved in the second and third embodiments to be detailed later, as well as the processing apparatus achieved in the first embodiment, are driven based upon a control program installed in the control device 6 to execute the specific processing characterizing the individual embodiments.

The wafer conditioning processing is executed through the following procedure. First, the inert gas is supplied through the gas supply port 2A into the processing chamber 2, a wafer W it is transferred through the transfer part 2A by opening the gate valve 9 and the wafer W is positioned above the table 3. The wafer W positioned above the table 3 is supported by the holding pins 15 over a slight distance from the table 3.

Next, the gate valve 9 is closed and the table 3 is moved up/down via the elevating mechanism 7 to set it at the optimal position. During this process, the wafer W supported by the holding pins 15 is heated to a predetermined processing temperature by the heater 13. The pressure inside the processing chamber 2 is adjusted so as to achieve a predetermined degree of vacuum and the electron beams B is radiated from the electron beam radiating mechanism 4 in the inert gas atmosphere. As a result, the insulating film at the surface all the wafer W becomes conditioned.

Electrons having entered the wafer W during the wafer processing are made to flow out to the ground wiring 17 via the holding pins 15 and the electrode 16, and thus, the wafer W does not become charged. In addition, the current flowing through the ground wiring 17 can be detected by the ammeter 19.

Even if the wafer W undergoing the processing becomes thermally deformed by the heat from the heater 13 or the radiation of the electron beams B, the entire surface of the wafer W supported by the holding pins 15 in a slightly lifted state over a small distance from the table 3 is evenly heated with the heat radiated from the table 3, which minimizes irregularities in heat distribution at the surface of the wafer W. Consequently, the entire surface of the wafer W can be uniformly processed.

Once the processing of the wafer W is completed, the wafer W is carried out of the processing chamber 2 by reversing the procedure through which it was carried into the processing chamber 2. Since the wafer W is held by the holding pins 15 maintaining a small gap from the table 3, the wafer W does not contact with the table 3 while it is carried out of the processing chamber. Thus, metal contamination or particle deposits which might otherwise occur if the wafer W contact with the table 3, are prevented.

In the processing apparatus 1 achieved in the first embodiment as described above which includes a plurality of holding pins 15 for holding the wafer W at a predetermined distance from the upper surface of the table 3, the wafer W positioned above the table 3 inside the processing chamber 2 is kept in a lifted state by the holding pins 15, thereby allowing the entire surface of the wafer W to be heated uniformly with the heat radiated from the table 3. Thus, the insulating film at the wafer W can be uniformly processed over the entire surface thereof while preventing metal contamination or particle deposits at the rear surface of the wafer W.

In addition, the holding pins 15, constituted of an electrically conductive material are electrically grounded via the ammeter 19 and the holding pins 15 electrically ground the wafer W at the ground potential. As a result, electrons having entered the wafer W are caused to flow out to the ground wiring 17 from the wafer W via the holding pins 15. This prevents a charge from developing at the wafer W and also enables direct detection of the intensity of the electron beam radiation at the wafer W via the ammeter 19.

Furthermore, the switch 18, capable of switching the holding pins 15 to an electrically grounded state or an ungrounded state, isolates the wafer W from the ground potential as the holding pins 15 are switched from the grounded state to the ungrounded state via the switch 18 whenever necessary.

Second Embodiment

Next, the processing apparatus achieved in the second embodiment of the present invention is explained in reference to a drawing. FIG. 4 is a sectional view schematically showing the essential structure adopted in the processing apparatus in the second embodiment. As shown in FIG. 4, the processing apparatus achieved in the second embodiment adopts a structure similar to that of the first embodiment except that a voltmeter 20 is disposed at the ground wiring 17 instead of the ammeter included in the structure achieved in the first embodiment and that an additional component, i.e., a DC power source 21, is connected. The DC power source 21 in the processing apparatus achieved in the second embodiment is a variable power source that allows the voltage setting for voltage application to be adjusted. More specifically, the DC power source 21 is connected to the holding pins 15 via the ground wiring 17 and the electrode 16 and thus, a positive voltage or a negative voltage can be applied to the wafer W supported by the holding pins 15. The voltage applied from the DC power source 21 can be detected with the voltmeter 20 at any time.

In the processing apparatus achieved in the second embodiment adopting the structure described above, as a negative voltage is applied to the wafer W from the DC power source 21, an electric field, which will reduce the energy of the electrons radiated from the electron beam radiating mechanism, is generated inside the processing chamber. As a result, the level of the energy of the electrons radiation at the wafer W is lowered. The energy of the electrons radiation at the wafer W is lowered to a greater extent when the absolute value of the negative voltage applied to the wafer W is greater, and, in such a case, the wafer W is processed to a smaller depth.

As a positive voltage is applied to the wafer W from the DC power source 21, an electric field, which will increase the energy of the electrons radiated from the electron beam radiating mechanism, is generated inside the processing chamber. As a result, the level of the energy of the electrons radiation at the wafer W is raised. The energy of the electrons radiation at the wafer W is raised to a greater extent when the absolute value of the positive voltage applied to the wafer W is greater and, in such a case, the wafer W is processed to a greater depth.

Thus, when processing the wafer W, the polarity and the absolute value of the voltage applied from the DC power source 21 are controlled in correspondence to a desired processing depth to be achieved at the wafer W, so as to provide electron beams with the correct electron energy level for the wafer processing.

In the processing apparatus achieved in the second embodiment, the holding pins 15 are constituted of an electrically conductive material and are connected with the voltmeter 20 and the DC power source 21. By applying a DC voltage with a specific polarity from the DC power source 21 to the holding pins 15 via the voltmeter 20, the energy of the electrons in the electron beams can be increased or decreased. In addition, the voltage applied to the wafer W from the DC power source 21 via the holding pins 15 can be detected with the voltmeter 20 at all times. This means that the intensity of the electron beam radiation at the wafer W can be directly monitored based upon fluctuations of the voltage value. In addition, since the voltage applied from the DC power source 21 is adjustable, the energy of the electrons in the electron beams radiated onto the wafer W can be controlled by controlling the voltage in correspondence to the type of wafer W undergoing the processing.

Third Embodiment

Next, the processing apparatus achieved in the third embodiment of the present invention is explained in reference to a drawing. FIG. 5 is a sectional view schematically showing the essential structure adopted in the processing apparatus in the third embodiment. As shown in FIG. 5, the processing apparatus achieved in the third embodiment adopts a structure similar to that of the first embodiment except that a variable resistance element 22 is mounted as an additional component at the ground wiring 17. The variable resistance element 22 is connected to the holding pins 15 via the ground wiring 17 and the electrode 16, and the intensity of the electron beam radiation at the wafer W undergoing the processing can be controlled by controlling the current flowing out from the wafer W to the ground wiring 17 with a variable resistance element 22. Namely, with the variable resistance element 22, which controls the charge voltage at the wafer W undergoing the processing, the intensity of the electron beam radiation at the wafer W from the electron beam radiating mechanism can be controlled. The current flowing through the ground wiring 17 can be monitored with the ammeter 19 at all times.

The resistance at the variable resistance element 22 is controlled as appropriate in correspondence to the type of wafer W undergoing the processing in the processing apparatus in the third embodiment, so as to achieve the optimal electron beam intensity for the wafer processing.

As described above, in the processing apparatus achieved in the third embodiment, which includes the variable resistance element 22 disposed at the ground wiring 17 connected with the holding pins 15, the current flowing from the wafer W to the ground wiring 17 via the holding pins 15 and the electrode 16 is controlled through the variable resistance element 22, the resistance of which is controlled as appropriate in correspondence to the type of the specific wafer W undergoing the processing. The intensity of the electron beam radiation at the wafer W is thus controlled.

FIRST IMPLEMENTATION EXAMPLE

Next, a first implementation example of the present invention is explained. In the first implementation example, the extent to which the presence of the holding pins affects the wafer temperature was investigated by using a bare wafer, which had not undergone any processing. The bare wafer was delivered to the table 3 inside the processing chamber 2 and was supported with the holding pins 15 at the table 3. The processing chamber 2 was filled with Ar gas at a pressure of 10 Torr, the heater 13 at the table 3 was engaged in operation to heat the table 3 in a temperature range of 300° C. to 400° C., as shown in Table 1 below, and the temperature at the wafer surface was measured at five different positions each time the temperature of the table 3 rose by 25° C. within the range of 300° C. to 400° C.

The wafer temperature was measured by using five thermocouples. The five thermocouples were each disposed at a central point of the wafer surface (TC1), at a point −75 mm away from the central point along the X direction (TC2), at a point +75 mm away from the central point along the X direction, at a point −75 mm away from the central point along the Y direction (TC4) and at a point +75 mm away from the central point along the Y direction (TC5). Table 1 below presents the results of measurement obtained via the thermocouples disposed at these positions by measuring the wafer temperature in correspondence to various temperature levels achieved at the table.

It is to be noted that as a comparison example to be compared with the first implementation example, a wafer was heated under conditions identical to those in the first implementation example in a processing apparatus in the related art that did not include holding pins and the wafer temperature was measured at the five different positions at the wafer surface in correspondence to the various temperature levels achieved at the table. The measurement results are presented in Table 2 below.

TABLE 1 Table Temperature TC (° C.) TC1 TC2 TC3 TC4 TC5 Δ Average 300 312 308 311 316 311 8 312 325 333 328 335 338 334 10 333 350 355 352 354 360 357 8 355 375 374 371 378 380 377 9 376 400 396 392 397 401 398 9 397

TABLE 2 Table Temperature TC (° C.) TC1 TC2 TC3 TC4 TC5 Δ Average 300 336 339 334 343 335 9 337 325 363 364 358 368 361 11 363 350 387 387 379 391 384 12 386 375 404 409 400 414 407 13 407 400 425 430 420 434 428 14 427

The measurement results achieved in the first implementation example indicate that the difference Ä between the highest value and the lowest value of the surface temperature at the wafer never exceeds 10° C. regardless of the temperature at the table, and that as the temperature at the table becomes higher, the difference Ä becomes more consistent in the processing apparatus equipped with the holding (see Table 1). In contrast, in the processing apparatus without holding pins (see Table 2), the difference Ä between the highest value and the lowest value of the surface temperature at the wafer is always greater than the difference observed in the processing apparatus equipped with holding pins, regardless of the temperature at the table, and that the difference Ä gradually increases as the temperature at the table becomes higher. In other words, better temperature uniformity is achieved at the surface of a wafer that is supported with the holding pins at a slight distance from the table compared to a wafer set directly on the table.

SECOND IMPLEMENTATION EXAMPLE

The second implementation example of the present invention is explained next. In the second implementation example, the effectiveness of the holding pins in preventing metal contamination in the processing apparatus 1 shown in FIG. 1 was investigated by setting the temperature of the table 3 to 350° C. In the second implementation example, too, a bare wafer similar to that used in the first implementation example was supported with the holding pins at the table. The temperature at the table 3 was set to 350° C., and electron beams were radiated onto the bare wafer within an atmosphere similar to that used to fill the processing chamber in the first implementation example. Subsequently, the wafer was taken out of the processing chamber 2 and the metal atoms deposited on the front surface and the rear surface of the wafer were counted by using an ICP-MS (inductively coupled plasma mass spectrometer). The metal atoms were counted both at the wafer front surface and at the wafer rear surface at the same five positions set within the wafer plane as those in the first implementation example. The tabulation results are presented in Table 3 below. In addition, the metal atoms deposited at the rear surface of an unprocessed bare wafer at the five positions were counted for reference. The tabulation results are indicated in the “reference” field in Table 3.

Also, as a comparison example to be compared with the second implementation example, a wafer was processed under conditions identical to those of the second implementation example in a processing apparatus in the related art without holding pins and the metal atoms deposited at the same positions as those in the second implementation example were counted. The tabulation results are provided in Table 4 below.

TABLE 3 K Ca Ti Cr Mn Fe Co Ni Cu Zn Test X Y ×1010 ×1010 ×1010 ×1010 ×1010 ×1010 ×1010 ×1010 ×1010 ×1010 Piece TC mm mm atoms atoms atoms atoms atoms atoms atoms atoms atoms atoms Ref. 1 0 0 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 2 −75 0 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 3 75 0 0.00 0.00 0.00 0.11 0.00 0.00 0.00 0.00 0.00 0.00 4 0 −75 0.00 0.00 0.00 0.60 0.00 0.00 0.00 0.00 0.00 0.00 5 0 75 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 Ave. 0.00 0.00 0.00 0.14 0.00 0.00 0.00 0.00 0.00 0.00 Wafer 1 0 0 0.00 0.00 0.00 0.05 0.00 0.00 0.00 0.00 0.00 0.00 Front 2 −75 0 0.00 0.00 0.00 0.79 0.00 0.05 0.00 0.00 0.00 0.00 3 75 0 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 4 0 −75 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 5 0 75 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 Ave. 0.00 0.00 0.00 0.17 0.00 0.01 0.00 0.00 0.00 0.00 Wafer 1 0 0 0.00 0.00 0.00 0.00 0.00 9.38 2.17 0.00 0.00 0.00 Rear 2 −75 0 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 3 75 0 0.00 26.89 0.00 0.11 0.00 0.00 0.00 0.00 0.00 0.00 4 0 −75 0.00 0.00 0.00 0.60 0.00 4.15 0.00 0.00 0.00 0.00 5 0 75 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 Ave. 0.00 5.38 0.00 0.14 0.00 2.71 0.43 0.00 0.00 0.00

TABLE 4 K Ca Cr Mn Fe Co Ni Cu Zn Test X Y ×1010 ×1010 ×1010 ×1010 ×1010 ×1010 ×1010 ×1010 ×1010 Piece TC mm mm atoms atoms atoms atoms atoms atoms atoms atoms atoms Ref. 1 0 0 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 2 −75 0 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 3 75 0 0.00 0.00 0.15 0.00 0.00 0.00 0.00 0.00 0.00 4 0 −75 0.00 0.00 0.60 0.00 2.41 0.00 0.00 0.00 0.00 5 0 75 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 Ave. 0.00 0.00 0.03 0.00 0.48 0.00 0.00 0.00 0.00 Wafer 1 0 0 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 Front 2 −75 0 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 3 75 0 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 4 0 −75 0.00 0.00 0.56 0.00 0.00 0.00 0.00 0.00 0.00 5 0 75 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 Ave. 0.00 0.00 0.11 0.00 0.00 0.00 0.00 0.00 0.00 Wafer 1 0 0 0.00 50.51 26.25 0.00 46.15 0.00 7.10 0.00 18.16 Rear 2 −75 0 131.00 151.93 0.57 0.00 11.32 0.00 2.49 9.63 20.50 3 75 0 30.69 74.99 0.18 0.00 19.19 1.53 5.56 159.89 74.65 4 0 −75 5.26 125.00 4.91 0.00 15.17 0.00 0.00 0.00 5.16 5 0 75 59.39 7.58 1.41 0.00 0.23 0.00 0.83 0.00 15.32 Ave. 45.27 82.00 6.66 0.00 18.41 0.31 3.20 33.90 26.76

The measurement results presented in correspondence to the second implementation example above indicate that no significant metal contamination was observed at the processed wafer apart from a slight deposit of Fe and Co metal atoms at the rear surfaces of the wafers, as is obvious from the comparison with the reference in the processing apparatus with the holding pins (see Table 3). In contrast, in the processing apparatus with no holding pins (see Table 4), large numbers of K atoms, Ca atoms and stainless steel metal atoms, as well as a great number of Zn atoms, were observed at the wafer rear surfaces though hardly any metal contamination was observed at the wafer front surfaces. This means that by disposing the holding pins at the table, metal contamination at the wafer rear surface can be reliably prevented.

THIRD IMPLEMENTATION EXAMPLE

Next, the third implementation example of the present invention is explained. In the third implementation example, the relationship among the type of inert gas in the processing chamber in which a wafer supported with the holding pins was being heated, the length of time over which the wafer was heated at a specific gas pressure and the wafer temperature was investigated. In the third implementation example, two different types of gas, i.e., He and Ar, were used as the inert gas, the pressure of each inert gas was changed as shown in FIG. 6, and the gas pressure of the specific inert gas and the corresponding wafer temperature were measured. FIG. 6 presents a graph of the measurement results. It is to be noted that bare wafers similar to those used in the first implementation example were also used in the third implementation example.

The measurement results in FIG. 6 indicate that while the wafer can be heated to a temperature close to the temperature of the table simply by heating the wafer for approximately 30 seconds in conjunction with the He gas set to 10 Torr, the wafer cannot be heated to a level close to the temperature of the table unless it is heated for approximately 60 seconds in conjunction with the Ar gas set to 10 Torr. In addition, the wafer can be heated to a level closer to the temperature of the table with the He gas than with the Ar gas. The results indicate that if the wafer is to be heated with the gas pressure set to 10 Torr, more desirable results are achieved by using the He gas rather than the Ar gas. In addition, by setting the pressure of the He gas to 100 Torr, the wafer can be heated to a level substantially equal to the temperature of the table in 30 seconds or less.

While the invention has been particularly shown and described with respect to preferred embodiments thereof by referring to the attached drawings, the present invention is not limited to these examples and it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit, scope and teaching of the invention.

Claims

1. A processing apparatus for conditioning a substrate placed on a table equipped with a heater by radiating an electron beam onto the substrate while heating the substrate with said heater that comprising:

at least three projecting portions that hold the substrate at a predetermined distance from said table.

2. A processing apparatus according to claim 1, wherein:

said projecting portions are constituted of an electrically conductive material and are electrically grounded via a current detecting means.

3. A processing apparatus according to claim 2, further comprising:

a current control means for controlling a current flowing through said current detecting means.

4. A processing apparatus according to claim 1, further comprising:

a switch capable of switching said projecting portions between an electrically grounded state and an ungrounded state.

5. A processing apparatus according to claim 1, wherein:

said projecting portions are constituted of an electrically conductive material, with a voltage detecting means and a DC power source connected to said projecting portions.

6. A processing apparatus for conditioning a substrate placed on a table by radiating an electron beam onto the substrate, comprising:

a ground wiring that electrically grounds the substrate; and
a current control means disposed at said ground wiring to control a current flowing through said ground wiring.

7. A processing apparatus according to claim 6, wherein:

said current control means has a variable resistance element with an adjustable current resistance value.

8. A processing method for conditioning a substrate placed on a table equipped with a heater by radiating an electron beam onto the substrate while heating the substrate with said heater, wherein:

when processing the substrate, the substrate is lifted from said table by a predetermined distance via at least three projecting portions.

9. A processing method according to claim 8, wherein:

said projecting portions are constituted of an electrically conductive material and are electrically grounded via a current detecting means.

10. A processing method according to claim 9, wherein:

a current control means controls a current flowing through said current detecting means.

11. A processing method according to claim 8, wherein:

said projecting portions can be switched to an electrically grounded state or an ungrounded state.

12. A processing method according to claim 8, wherein:

said projecting portions are constituted of an electrically conductive material, a voltage detecting means and a DC power source are connected to said projecting portions and a DC voltage is applied to said projecting portions.

13. A processing method for conditioning a substrate placed on a table by radiating an electron beam onto the substrate, comprising steps for:

electrically grounding the substrate via a ground wiring when processing the substrate; and
controlling a current flowing through said ground wiring with a current control means.

14. A processing method according to claim 13, wherein:

said current control means has a variable resistance element; and
said method further comprising a step for;
adjusting a current resistance value at said variable resistance element.
Patent History
Publication number: 20060194516
Type: Application
Filed: Jan 31, 2006
Publication Date: Aug 31, 2006
Applicant: TOKYO ELECTRON LIMITED (Minato-ku)
Inventors: Akiko Kamigori (Hyogo), Tadashi Onishi (Yamanashi)
Application Number: 11/342,827
Classifications
Current U.S. Class: 451/41.000
International Classification: B24B 7/30 (20060101); B24B 1/00 (20060101); B24B 7/19 (20060101);