Anodic bonding process for ceramics

A bonded component structure comprising the following. A first ceramic component having a first conductive layer thereover. An intermediate film over the first conductive layer. A second ceramic component having a second conductive layer is formed thereover anodically bonded to the first ceramic component wherein the second conductive layer opposes the intermediate film. At least one transition layer upon at least one of the first and second ceramic components.

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Description
FIELD OF THE INVENTION

This is a Continuation Application of U.S. application Ser. No. 10/868,714, filed on Jun. 15, 2004, which is herein incorporated by reference in its entirety, and assigned to a common assignee.

The present invention relates generally to bonding and more specifically to the bonding of ceramic components.

BACKGROUND OF THE INVENTION

Ceramics range from diverse silicates to oxides of Al, Ti, Zr, Be, etc. Ceramics also include non-oxides such as carbides, nitrides and borides of the transition elements plus multiphase composites which may be totally or partially ceramic.

Ceramics may be used as electrical insulators, semiconductors, conductors or superconductors and may display large piezoelectric effect, have voltage-sensitive resistance or may have their electrical permittivity change with humidity. They may be good heat conductors or excellent thermal insulators and can be used at high operating temperatures intolerable by many metals and super alloys. Broadly speaking, the permissible operating temperature of ceramics is between about 0.5 to 0.7 Tm where Tm is the ceramic's melting point.

Although the synthesis of ceramic materials for high performance and high reliability is advancing tremendously, their commercialization is lagging due to poor integration techniques. While scientific and engineering efforts have been focused upon ceramic-metal joining/bonding, ceramic-ceramic bonding is not, as of yet, as well developed.

U.S. Pat. No. 5,769,997 to Akaike et al. and European Patent Specification 0619598 A3 0619598 to Akaike et al. both describe anodic bonding of an insulator containing no movable ion and a conductor through the medium of a conductive film and an insulator layer containing movable ions.

U.S. Pat. No. 5,695,590 to Willcox et al. describes anodic bonding to fabricate a pressure sensor.

U.S. Pat. No. 4,452,624 to Wohltjen describes a method for making an airtight seal between a pair of glass plates.

European Patent Specification 0317445 to Gotou describes bonding of a first silicon substrate coated with silicon oxide to a second silicon substrate coated with beta-SiC and/or phosphosilicate glass layer.

SUMMARY OF THE INVENTION

Accordingly, it is an object of one or more embodiments of the present invention to provide a method of anodically bonding ceramic components at low temperatures.

Other objects will appear hereinafter.

It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, at least a first ceramic component and a second ceramic components are provided. Each of the at least first and second ceramic components having an upper and lower surface. A first conductive layer is formed over the upper surface of the first ceramic component. An intermediate film is formed over the first conductive layer. A second conductive layer is formed over the lower surface of the second ceramic component. The second ceramic component is stacked over the first ceramic component wherein the second conductive layer on the second ceramic component opposes the intermediate film on the first component. The first and second ceramic components are anodically bonded together.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will be more clearly understood from the following description taken in conjunction with the accompanying drawings in which like reference numerals designate similar or corresponding elements, regions and portions and in which:

FIG. 1 to 7 schematically illustrate a preferred embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Information Known to the Inventors—Not to be Considered as Prior Art

The following information is known to the inventors and is not to be considered as prior art for the purposes of this invention.

The available bonding techniques for ceramic-ceramic bonding are: (1) diffusion bonding; (2) metallic brazing; and (3) glass intermediate layer bonding.

Diffusion Bonding

In diffusion bonding, the ceramics must be heated up to about 0.6 to 0.8 Tm which is an extremely high bonding temperature. Diffusion bonding is a solid phase process achieved via atomic migration with no macrodeformation of the components. Initial surface flatness and cleanliness are essential. Surface roughness values of less than 0.4 microns are required and the samples must be cleaned prior to bonding. Typically the process variables range from several hours at moderate temperatures (0.6 Tm) to minutes at higher temperatures (0.8 Tm), with applied pressure.

Metallic Brazing and Glass Intermediate Layer Bonding

Metallic brazing and glass intermediate layer bonding were developed to achieve lower temperature bonding, i.e. from about 400 to 700° C. In these two respective methods, the brazing element and the glass intermediate layer need to be melted during the bonding process. Thus, the applicable operating temperature of the integrated ceramic systems will be limited by the melting point of the intermediate layers.

Problems Known to the Inventors—Not to be Considered Prior Art

The following are problems known to the inventors and are not to be considered as prior art for the purposes of the present invention.

In state-of-the-art ceramic bonding techniques, the components are bonded at high temperatures, i.e from about 0.6 to 0.8 Tm or from about 400 to 700° C. At these high bonding temperatures, there are some inherent problems such as: residual stresses after bonding due to the difference of thermal expansion coefficient between components; and the components are susceptible to damage during the high temperature bonding process and this limits the range of materials to be bonded.

Present Invention

The present invention provides a method of anodically bonding ceramic components at low temperatures, i.e. preferably from about 100 to 400° C. and more preferably from about 300 to 200° C. or lower.

For the purposes of this invention, ceramic components are preferably comprised of, but are not limited to: alumina, titanium carbide, silica (SiO2), silicon nitride (Si3N4). glass (including quartz, soda lime or borosilicate), silicates, oxides, carbides, nitrides and borides of the transition elements, or partially or totally ceramic multiphase composites.

The present invention may also be used to fabricate and package microsystems and nanosystems.

Conditioning of the First Ceramic Component 10—FIG. 1

As shown in FIG. 1, a first ceramic component 10 is conditioned by first polishing its upper and/or lower surfaces 11, 13 to achieve a mirror finish.

The mirrored surfaces 11, 13 are then cleaned in an organic or inorganic cleansing solvent. The cleansing solvent is preferably nitric acid, piranha (solution), ammonium hydrogen peroxide, RCA cleansing or acetone.

Deposition of First Transition Layer 12, First Conductive Layer 14 and Intermediate Film 16—FIG. 2

The first ceramic component 10 is then placed within a deposition chamber and a first transition layer 12 is deposited upon upper surface 11 to a thickness of preferably from about 10 nm to 5 μm. Single or multiple transition layers 12 for the promotion of adhesion, are applied on the to-be bonded surface 11.

Typically, the transition layer 12 is deposited by physical vapor deposition methods or chemical vapor deposition methods. The gradient transition layer 12 will be arranged as follows: the structure and composition of the first layer deposited on the ceramic component are as similar as those of the ceramic components, then gradually changed to be as similar as those of the final conductive layer composed of semiconductive or conductive material. The thickness of the total transition layer ranges from nanometers to micrometers.

EXAMPLE 1

If the ceramic component is alumina (Al2O3), the composition and the structure of the gradient transition layer will be AlxOy. The element ratio y:x should be as close as 3:2 for the first layer deposited on the alumina ceramic component, followed by layers with y:x ratio less than 3:2, and gradually y:x ratio is reduced to 0.

EXAMPLE 2

If the ceramic component is titanium carbide (TiC), the composition and the structure of the gradient transition layer will be TixCy. The element ratio y:x should be as close as 1:1 for the first layer deposited on the titanium carbide ceramic component, followed by layers with y:x ratio less than 1:1, and gradually y:x ratio is reduced to 0.

EXAMPLE 3

If the ceramic component is silica (SiO2) or silicon nitride (Si3N4), the transition layer can be Ti, TiW, or other materials which have less lattice mismatch with the silica or silicon nitride component than the final conductive or semiconductive layer.

If the adhesion is not so critical, such multiple transition layers are neglected. The conductive layers can be directly deposited on the to-be bonded surfaces. Alternatively, just one single transition layer is used.

It is noted that the transition layer composition and type will change with the to-be-bonded ceramics. There are several thousands of ceramics, therefore it's impossible to give out all the ceramics and needed transition layer compositions and types. We can only provide the guideline how to select transition layer compositions and types.

A first conductive layer 14 is then deposited upon first transition layer 12 to a thickness of preferably from about 20 nm to 5 μm. First conductive layer 14 may be metallic or semiconductive and is preferably comprised of Al, Cr, W, Ni, Ti, or alloys thereof, or silicon (Si) and is preferably deposited by (1) physical vapor deposition (PVD) which includes ablation, evaporation, ion beam deposition or sputtering; or (2) chemical vapor deposition (CVD).

Then, intermediate film 16 is deposited upon first conductive layer 14 to a thickness of preferably from about 10 nm to 5 μm and more preferably from about 10 nm to 2 μm.

Intermediate film 16, with or without alkaline ions, is preferably deposited by dry or wet approaches, such as evaporation, sputtering or a sol gel technique.

If intermediate film 16 is sol gel, the sol gel coating methods may include spin-on, immersion or spraying and further, at least the upper surface 11 is pretreated in organic or inorganic solutions such as preferably nitric acid, piranha (solution), ammonium hydrogen peroxide, RCA cleansing or acetone to render at least the upper surface 11 hydrophilic prior to deposition.

The first ceramic component 10 is then dried or tempered at a temperature ranging from room temperature, i.e., e.g. about 25° C., up to the anodic bonding temperature of the first and second ceramic components 10, 18, for example from about 25 to 400° C.

Conditioning of the Second Ceramic Component 18—FIG. 3

As shown in FIG. 3, a second ceramic component 18 is conditioned by preferably first polishing its lower and/or upper surfaces 21, 19 to achieve a mirror finish.

The mirrored surfaces 19, 21 are then cleaned in an organic or inorganic cleansing solvent. The cleansing solvent is preferably nitric acid, piranha (solution), ammonium hydrogen peroxide, RCA cleansing or acetone.

Deposition of Second Transition Film 20 and Second Conductive Layer 22—FIG. 4

The second ceramic component 18 is then placed within a deposition chamber and a second transition layer 20 is deposited upon lower surface 21 to a thickness of preferably from about 10 nm to 5 μm. Single or multiple transition layers 22 for the promotion of adhesion, are applied on the to-be bonded surface of both components. Typically, the transition layer 20 is deposited by physical vapor deposition methods or chemical vapor deposition methods. The gradient transition layer 20 will be arranged as follows: the structure and composition of the first layer deposited on the ceramic component are as similar as those of the ceramic components, then gradually change to be as similar as those of the final conductive layer composed of semiconductive or conductive material. The thickness of the total transition layer ranges from nanometers to micrometers.

If the adhesion is not so critical, such multiple transition layers are neglected. The conductive layers can be directly deposited on the to-be bonded surfaces. Alternatively, just one single transition layer may be used.

A second conductive layer 22 is then deposited upon second transition layer 20 to a thickness of preferably from about 20 nm to 5 μm. Second conductive layer 22 may be metallic or semiconductive and is preferably comprised of Al, Cr, W, Ni, Ti, or alloys thereof, or silicon (Si) and is preferably deposited by (1) physical vapor deposition (PVD) which includes ablation, evaporation, ion beam deposition or sputtering; or (2) chemical vapor deposition (CVD).

Cleansing of One or Both of the First and Second Ceramic Components 10, 18

Before bonding of the first and second ceramic components 10, 18 having their respective layers/films 12, 14, 16; 20, 22 formed thereover, one or both of them 10, 18 are cleansed:

in a cleansing solution preferably comprised of organic, sulfuric- or hydrogen-peroxide-based RCA solutions; at a temperature of preferably from about 50 to 90° C.;

for preferably from about 5 to 10 minutes;

to render the cleansed ceramic component(s) 10, 18 hydrophilic.

Alignment of First and Second Ceramic Components 10, 18—FIG. 5

As shown in FIG. 5 and at room temperature, i.e. at about 25° C., the second ceramic component 18 is then aligned with and placed on top of, and spaced apart from using spacers 24, the first ceramic component 10 so that the second conductive layer 22 on the second ceramic component 18 opposes the intermediate film 16 on the first ceramic component 10.

Spacers 24 have a thickness of preferably from about 20 to 50 μm and are placed at the edges of the first and second ceramic components 10, 18.

The stacked, spaced and aligned first and second ceramic components 10, 18 are placed into a vacuum chamber.

Bringing The First and Second Ceramic Components 10, 18 into Point Contact—FIG. 6

During vacuuming, the first and second ceramic components 10, 18 are heated to, and maintained at, a temperature of preferably from about 100 and 400° C. and more preferably from about 300 to 200° C. or less.

As shown in FIG. 6, with spacers 24 still in place, the center portions of the first and second ceramic components 10, 18 are brought into contact under pressure 26 of preferably from about 0.001 to 100 N/m2.

Removal of Spacers 24 and Anodic Bonding of the First and Second Ceramic Components 10, 18—FIG. 7

As shown in FIG. 7, spacers 24 are removed and the first and second ceramic components 10, 18 are anodically bonded at voltages of preferably from about 0 to 100 volts. The anodic bonding process is accomplished by pressing the first and second ceramic components 10, 18 together at one point from which the component 10, 18 contact wave proceeds to completion to form the bonded components 30. Initially, two components contact at one point, and when the spacers are pulled out, the contact area will extend from point contact to full wafer (in order to achieve hermetic or vacuum sealing).

The bonded components 30 have an excellent bond strength and can undergo further harsh processes or be employed in adverse operating environments.

As one skilled in the art would understand, three or more ceramic components may be bonded employing the method and teachings of the present invention either simultaneously or sequentially.

It is noted that if adhesion is not critical, multiple transition layers 12, 20 are not essential and only one transition layer 12, 20 need be used, or no transition layers 12, 20 need be used, with the conductive layer(s) 14, 22 being directly deposited upon the first and/or second ceramic component 10, 18 not having the transition layer 12, 20.

It is noted that silicon layers and/or semiconductors may be used as the second (ceramic) component 18. In this case, the conductive film on the second component is not necessary. The inventors have achieved the following successful specific cases of bonding in accordance with the teachings of the present invention, for example:

glass/silicon (Si) low temperature bonding (less than about 300° C.);

glass/glass low temperature bonding (less than about 300° C.);

Si/Si low temperature bonding (less than about 300° C.);

ceramic/ceramic low temperature bonding (less than about 300° C.); and

combinations of the above materials with low temperature bonding (less than about 300° C.).

The semiconductors may be Si (as noted above), GaAs, InP or SiGe. Glass may be quartz, soda lime or borosilicate.

Further, as noted above, Microsystems and nanosystems may be fabricated and packaged in accordance with the teachings of the present invention.

The applications for the present invention may include:

    • micro electromechanical systems (MEMS);
    • bio-MEMS and microfluidic devices;
    • micro-opto-electro-mechanical system (MOEMS);
    • substrate fabrication;
    • semiconductors;
    • microelectronics;
    • optoelectronics; and
    • hermetic and vacuum sealing.

The commercialization potentials of the present invention may include:

    • wafer level MEMS packaging (RF, sensors, actuators et al.);
    • bio-MEMS (Si and glass systems) and microfluidic devices;
    • wafer level MOEMS packaging;
    • multilayer inorganic substrates;
    • semiconductor-on-insulator, CMOS;
    • 3D integrated circuits (ID); and
    • optoelectronics: OEIC.
      Advantages of the Present Invention

The advantages of one or more embodiments of the present invention include:

1. a significantly reduced bonding temperature (preferably from about 100 to 400° C. and more preferably from about 300 to 200° C. or lower);

2. the ability to bond similar or different ceramic materials;

3. degradation and damage of pre-fabricated devices and integrated circuitry is avoided;

4. bonding-induced stress problems are reduced;

5. the bonding method is suitable for high-temperature applications;

6. reduced process cost;

7. high bonding quality;

8. the ability to bond semiconductors, glasses and ceramics; and

9. low residual stress and warpage.

While particular embodiments of the present invention have been illustrated and described, it is not intended to limit the invention, except as defined by the following claims.

Claims

1. A bonded component structure, comprising:

a first ceramic component having a first conductive layer thereover, the first ceramic component having an upper and lower surface;
an intermediate film over the first conductive layer;
a second ceramic component having a second conductive layer thereover anodically bonded to the first ceramic component wherein the second conductive layer opposes the intermediate film, the second ceramic component having an upper and lower surface; and
at least one transition layer upon at least one of the first and second ceramic components.

2. The structure of claim 1, wherein the upper and lower surfaces of the first and second ceramic components are polished surfaces.

3. The structure of claim 1, wherein the upper and lower surfaces of the first and second ceramic components are cleansed surfaces.

4. The structure of claim 1, wherein the upper and lower surfaces of the first and second ceramic components are polished and cleansed surfaces.

5. The structure of claim 1, wherein at least one of the first and second ceramic components are cleansed.

6. The structure of claim 1, wherein the at least one transition layer is AlxOy, TixCy, Ti or TiW.

7. The structure of claim 1, wherein at least one respective transition layer is formed upon both the first and second ceramic components.

8. The structure of claim 1, wherein at least one respective transition layer is formed upon both the first and second ceramic components and the at least one respective transition layer is AlxOy, TixCy, Ti or TiW.

9. The structure of claim 1, wherein the first and second ceramic components are comprised of:

glass;
silicates;
oxides;
carbides, nitrides and borides of the transition elements; or
multiphase composites which may be totally or partially ceramic.

10. The structure of claim 1, wherein the first and second ceramic components are comprised of:

quartz;
silicates;
oxides;
carbides, nitrides and borides of the transition elements; or
multiphase composites which may be totally or partially ceramic.

11. The structure of claim 1, wherein the first and second ceramic components are comprised of:

alumina;
titanium carbide;
silica (SiO2);
silicon nitride (Si3N4);
soda lime; or
borosilicate.

12. The structure of claim 1, wherein the first and second ceramic components are each comprised of the same material.

13. The structure of claim 1, wherein the first and second ceramic components are each comprised of a different material.

14. The structure of claim 1, wherein the first and second conductive layers are metallic or semiconductive.

15. The structure of claim 1, wherein the first and second conductive layers are comprised of Al, Cr, W, Ni, Ti, or alloys thereof, or silicon.

16. The structure of claim 1, wherein the first conductive layer has a thickness of from about 20 nm to 5 μm; and the second conductive layer has a thickness of from about 20 nm to 5 μm.

17. The structure of claim 1, wherein the intermediate film has a thickness of from about 10 nm to 5 μm.

18. The structure of claim 1, wherein at least one of the first and second ceramic components are cleansed to render the at least one of the first and second ceramic components hydrophilic.

19. The structure of claim 1, wherein the structure is employed in:

micro electromechanical systems (MEMS);
bio-MEMS and microfluidic devices;
micro-opto-electro-mechanical system (MOEMS);
substrate fabrication;
semiconductors;
microelectronics;
optoelectronics; or
hermetic and vacuum sealing.

20. The structure of claim 1, wherein the structure is employed in:

wafer level MEMS packaging (RF, sensors, actuators et al.);
bio-MEMS (Si and glass systems) and microfluidic devices;
wafer level MOEMS packaging;
multilayer inorganic substrates;
semiconductor-on-insulator, CMOS;
3D integrated circuits (ID); or
optoelectronics: OEIC.

21. The structure of claim 1, wherein the intermediate film includes alkaline ions or does not include alkaline ions.

22. A bonded component structure, comprising:

a first ceramic component having cleansed polished upper and lower surfaces;
a first conductive layer over the cleansed polished upper surface of the first ceramic component;
an intermediate film over the first conductive layer;
a second ceramic component having cleansed polished upper and lower surfaces, the second conductive layer having a second conductive layer over its cleansed polished lower surface, the second ceramic component being anodically bonded to the first ceramic component wherein the second conductive layer opposes the intermediate film; and
at least one transition layer upon at least one of the first and second ceramic components.

23. The structure of claim 22, wherein the at least one transition layer is comprised of AlxOy, TixCy, Ti or TiW.

24. The structure of claim 22, wherein at least one respective transition layer is formed upon both the first and second ceramic components.

25. The structure of claim 22, wherein the first and second ceramic components are comprised of:

glass;
silicates;
oxides;
carbides, nitrides and borides of the transition elements; or
multiphase composites which may be totally or partially ceramic.

26. The structure of claim 22, wherein the first and second ceramic components are comprised of:

quartz;
silicates;
oxides;
carbides, nitrides and borides of the transition elements; or
multiphase composites which may be totally or partially ceramic.

27. The structure of claim 22, wherein the first and second ceramic components are comprised of:

alumina;
titanium carbide;
silica (SiO2);
silicon nitride (Si3N4);
soda lime; or
borosilicate.

28. The structure of claim 22, wherein the first and second ceramic components are each comprised of the same material.

29. The structure of claim 22, wherein the first and second ceramic components are comprised of a different material.

30. The method of claim 22, wherein the first and second conductive layers are metallic or semiconductive.

31. The structure of claim 22, wherein the first and second conductive layers are comprised of Al, Cr, W, Ni, Ti, or alloys thereof, or silicon.

32. The structure of claim 22, wherein the first conductive layer has a thickness of from about 20 nm to 5 μm; and the second conductive layer has a thickness of from about 20 nm to 5 μm.

33. The structure of claim 22, wherein the intermediate film has a thickness of from about 10 nm to 5 μm.

34. The structure of claim 22, wherein at least one of the first and second ceramic components are cleansed to render the at least one of the first and second ceramic components hydrophilic.

35. The structure of claim 22, wherein the structure is employed in:

micro electromechanical systems (MEMS);
bio-MEMS and microfluidic devices;
micro-opto-electro-mechanical system (MOEMS);
substrate fabrication;
semiconductors;
microelectronics;
optoelectronics; or
hermetic and vacuum sealing.

36. The structure of claim 22, wherein the structure is employed in:

wafer level MEMS packaging (RF, sensors, actuators et al.);
bio-MEMS (Si and glass systems) and microfluidic devices;
wafer level MOEMS packaging;
multilayer inorganic substrates;
semiconductor-on-insulator, CMOS;
3D integrated circuits (ID); or
optoelectronics: OEIC.

37. The structure of claim 22, wherein the intermediate film includes alkaline ions or does not include alkaline ions.

38. A bonded ceramic component structure, comprising:

a first cleansed ceramic component having an upper and lower cleansed and polished surface;
a first transition layer over the cleansed polished upper surface of the first ceramic component;
a first conductive layer over the first transition layer;
an intermediate film over the first conductive layer; the intermediate film including alkaline ions or not including alkaline ions;
a second cleansed ceramic component having a second conductive layer thereover anodically bonded to the first ceramic component wherein the second conductive layer opposes the intermediate film on the first ceramic component, the second ceramic component having an upper and lower cleansed and polished surface; and
a second transition layer over the second cleansed ceramic component cleansed polished lower surface and under the second conductive layer.

39. The structure of claim 38, wherein the first and second transition layers are comprised of AlxOy, TixCy, Ti or TiW.

40. The structure of claim 38, wherein the first and second stacked ceramic components are spaced apart using spacers before bonding.

41. The structure of claim 38, wherein the first and second ceramic components are comprised of:

glass;
silicates;
oxides;
carbides, nitrides and borides of the transition elements; or
multiphase composites which may be totally or partially ceramic.

42. The structure of claim 38, wherein the first and second ceramic components are comprised of:

quartz;
silicates;
oxides;
carbides, nitrides and borides of the transition elements; or
multiphase composites which may be totally or partially ceramic.

43. The structure of claim 38, wherein the first and second ceramic components are comprised of:

alumina;
titanium carbide;
silica (SiO2);
silicon nitride (Si3N4);
soda lime; or
borosilicate.

44. The structure of claim 38, wherein the first and second ceramic components are each comprised of the same material.

45. The structure of claim 38, wherein the first and second ceramic components are comprised of a different material.

46. The structure of claim 38, wherein the first and second conductive layers are metallic or semiconductive.

47. The structure of claim 38, wherein the first and second conductive layers are comprised of Al, Cr, W, Ni, Ti, or alloys thereof, or silicon.

48. The structure of claim 38, wherein the first conductive layer has a thickness of from about 20 nm to 5 μm; and the second conductive layer has a thickness of from about 20 nm to 5 μm.

49. The structure of claim 38, wherein the intermediate film has a thickness of from about 10 nm to 5 μm.

50. The structure of claim 38, wherein at least one of the first or second cleansed ceramic components are hydrophilic.

51. The structure of claim 38, wherein the structure is employed in:

micro electromechanical systems (MEMS);
bio-MEMS and microfluidic devices;
micro-opto-electro-mechanical system (MOEMS);
substrate fabrication;
semiconductors;
microelectronics;
optoelectronics; or
hermetic and vacuum sealing.

52. The structure of claim 38, wherein the structure is employed in:

wafer level MEMS packaging (RF, sensors, actuators et al.);
bio-MEMS (Si and glass systems) and microfluidic devices;
wafer level MOEMS packaging;
multilayer inorganic substrates;
semiconductor-on-insulator, CMOS;
3D integrated circuits (ID); or
optoelectronics: OEIC.

53. A bonded component structure, comprising:

a first ceramic component having an upper and lower surface,
a conductive layer over the upper surface of the first ceramic component;
an intermediate film over the conductive layer;
a second component having an upper and lower surface anodically bonded to the first ceramic component via the intermediate film, the second component being comprised of a silicon layer or a semiconductor layer; and
at least one transition layer upon at least one of the first ceramic component and the second component, the at least one transition layer being AlxOy, TixCy or TiW.

54. The structure of claim 53, wherein the upper and lower surfaces of the first ceramic component and the second component are polished.

55. The structure of claim 53, wherein the upper and lower surfaces of the first ceramic component and the second component are cleansed.

56. The structure of claim 53, wherein the upper and lower surfaces of the first ceramic component and the second component are cleansed and polished.

57. The structure of claim 53, including at least one respective transition layer upon both the first ceramic component and the second component.

58. The structure of claim 53, wherein the first ceramic component is comprised of:

glass;
silicates; oxides; carbides, nitrides and borides of the transition elements; or multiphase composites which may be totally or partially ceramic.

59. The structure of claim 53, wherein the first ceramic component is comprised of:

quartz;
silicates;
oxides;
carbides, nitrides and borides of the transition elements; or
multiphase composites which may be totally or partially ceramic.

60. The structure of claim 53, wherein the first ceramic component is comprised of:

alumina;
titanium carbide;
silica (SiO2);
silicon nitride (Si3N4);
soda lime; or
borosilicate.

61. The structure of claim 53 wherein the first ceramic component is glass.

62. The structure of claim 53, wherein the conductive layer is metallic or semiconductive.

63. The structure of claim 53, wherein the conductive layer is comprised of Al, Cr, W, Ni, Ti, or alloys thereof, or silicon.

64. The structure of claim 53, wherein the conductive layer has a thickness of from about 20 nm to 5 μm.

65. The method of claim 53, wherein the intermediate film has a thickness of from about 10 nm to 5 μm.

66. The structure of claim 53, wherein at least one of the first ceramic component and the second component is cleansed and is hydrophilic.

67. The structure of claim 53, wherein the intermediate film includes alkaline ions or does not include alkaline ions.

Patent History
Publication number: 20060286388
Type: Application
Filed: Aug 23, 2006
Publication Date: Dec 21, 2006
Inventors: Jun Wei (Singapore), Stephen Chee Wong (Singapore), Sharon Nai (Singapore)
Application Number: 11/508,814
Classifications
Current U.S. Class: 428/446.000; 428/701.000; 428/702.000; 428/698.000; 428/432.000; 428/426.000
International Classification: B32B 17/06 (20060101); B32B 13/04 (20060101); B32B 9/00 (20060101); B32B 19/00 (20060101);