CMOS Image Sensor
A method of fabricating a CMOS image sensor is disclosed, by which image sensor characteristics are enhanced. In one aspect, the method includes forming a plurality of photodiodes in the photodiode region of a semiconductor substrate; stacking a first insulating layer over the semiconductor substrate including the photodiodes; forming a metal pad on the insulating layer in the pad region of the substrate; forming a second insulating layer over the semiconductor substrate including the metal pad; selectively etching exposed portions of the second insulating layer, using a mask, to form simultaneously a pad opening in the pad region and a trench in the photodiode region; selectively etching portions of the second insulating layer and the first insulating layer under the trench; and forming a slope on lateral sides of at least the second insulating layer.
This application is a divisional of U.S. patent application Ser. No. 11/322,848, filed Dec. 30, 2005 (Attorney Docket No. OPP-GZ-2005-0057-US-00), pending, which is incorporated herein by reference in its entirety, and which claims the benefit of Korean Patent Application No. 10-2005-0087600, filed on Sep. 21, 2005, which is hereby incorporated by reference as if fully set forth herein.
BACKGROUND OF THE INVENTION1. Field of the Invention
The present invention relates to an image sensor, and more particularly, to a method of fabricating a CMOS image sensor. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for enhancing image sensor characteristics.
2. Discussion of the Related Art
An image sensor is a semiconductor device that converts an optical image into an electrical signal. A complementary MOS (CMOS) image sensor includes a photosensing device, such as a photodiode, and a CMOS logic circuit including a plurality of MOS transistors corresponding to the number of pixels. The CMOS image sensor is generally fabricated using CMOS technology. To enhance photosensitivity of the image sensor, its fill factor may be improved, but since the logic circuit (or other peripheral structures) consumes some area, there are limits to improving the fill factor. Alternatively, microlenses may be used to direct incident light onto the photosensing areas only. Another approach to photosensitivity enhancement is to shorten the traveling distance of a light signal passing through a microlens layer to be transmitted to an underlying photodiode.
To provide an image sensor with color separation capability, a color filter array including a plurality of color filters is arranged, together with the microlenses, over the respective photosensing devices. The color filter array and microlenses are disposed in a photodiode region, separate from and adjacent to a pad region for forming a plurality of wiring layer interconnections of the CMOS logic circuit, which may be configured for a three-transistor (3T) or for a four-transistor (4T) CMOS image sensor. A 3T CMOS image sensor consists of one photodiode and three transistors per pixel, and a 4T CMOS image sensor consists of one photodiode and four transistors per pixel.
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Since the microlens and a color filter layer are formed after completion of the pad opening, a vertical slope may be formed on an edge of the photodiode region. Hence, striation occurs, which may degrade the uniformity of the microlens thickness. Moreover, photolithography and etching processes, for reducing the distance between the microlens and the photodiode, are separately and/or additionally carried out, thereby increasing the number of process steps.
SUMMARY OF THE INVENTIONAccordingly, the present invention is directed to a method of fabricating a CMOS image sensor that substantially obviates one or more problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a method of fabricating a CMOS image sensor, in which a photodiode region and a pad region may have different etching thicknesses, using a pad opening mask for both regions, and by which optical efficiency of the photodiode region may be enhanced.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those skilled in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these objects and other advantages in accordance with the purpose of the invention, as embodied and broadly described herein, there is provided a method of fabricating a CMOS image sensor, which may comprise forming, in a semiconductor substrate divided into a photodiode region and a pad region, a plurality of photodiodes in the photodiode region; forming an insulating layer over the semiconductor substrate including the photodiodes; forming a metal pad on the insulating layer in the pad region; forming a second insulating layer over the semiconductor substrate including the metal pad; forming a mask layer on the second insulating interlayer, to expose portions of the second insulating interlayer over the metal pad and the photodiodes; selectively etching the exposed portions of the second insulating interlayer to form simultaneously a pad opening in the pad region and a trench in the photodiode region; selectively etching portions of the second insulating interlayer and the insulating layer under the trench; and forming a slope on lateral sides of the second insulating layer and the insulating layer.
It is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principle(s) of the invention. In the drawings:
Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, like reference designations will be used throughout the drawings to refer to the same or similar parts.
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According to the present invention, the process is simplified by opening the pad region, and simultaneously, using the pad opening mask to remove the insulating layer in the photodiode region. Optical efficiency can be enhanced by shortening the path of incident light from a microlens to the corresponding photodiode. In addition, the uniformity of the microlens thickness can be enhanced by forming a slope in a second insulator layer (enabled by forming and then removing a high-density plasma oxide layer), so that striation(s) can be reduced or prevented from occurring in coating the microlens material layer on the substrate.
It will be apparent to those skilled in the art that various modifications can be made in the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention covers such modifications provided they come within the scope of the appended claims and their equivalents.
Claims
1. A CMOS image sensor, comprising:
- a semiconductor substrate having a photodiode region and a pad region;
- a plurality of photodiodes in the photodiode region;
- a first insulating layer over the semiconductor substrate including the photodiodes;
- a metal pad on the first insulating layer in the pad region;
- a second insulating layer over the semiconductor substrate including the metal pad;
- a pad opening in the pad region; and
- a trench in the first and second insulating layers in the photodiode region, the trench having a slope on lateral sides of at least the second insulating layer.
2. The CMOS image sensor of claim 1, wherein the trench also has a slope on lateral sides of the first insulating layer.
3. The CMOS image sensor of claim 1, wherein the pad opening also has a slope on its lateral sides.
4. The CMOS image sensor of claim 1, further comprising a plurality of microlenses on the first insulating layer in the photodiode region.
5. The CMOS image sensor of claim 4, wherein the microlenses comprise a resist.
6. The CMOS image sensor of claim 4, wherein the microlenses comprise an oxide layer.
7. The CMOS image sensor of claim 6, wherein the microlenses comprise a tetra-ethyl-ortho-silicate oxide.
8. The CMOS image sensor of claim 1, wherein the second insulating layer comprises an oxide layer and a nitride layer thereon.
9. The CMOS image sensor of claim 1, wherein the semiconductor substrate comprises first and second epitaxial layers.
10. The CMOS image sensor of claim 1, wherein the plurality of photodiodes are adjacent to one another in the photodiode region.
11. The CMOS image sensor of claim 1, wherein the semiconductor substrate comprises a single-crystal silicon wafer.
12. The CMOS image sensor of claim 11, further comprising an epitaxial silicon layer on the single-crystal silicon wafer.
13. The CMOS image sensor of claim 1, wherein the first insulating layer comprises a multi-layer structure.
14. The CMOS image sensor of claim 13, wherein a first layer of the multi-layer structure comprises tetra-ethyl-ortho-silicate oxide.
15. The CMOS image sensor of claim 13, wherein a second layer of the multi-layer structure comprises a borophosphorus silicate glass layer.
16. The CMOS image sensor of claim 13, further comprising a light shielding layer between first and second layers of the multi-layer structure.
17. The CMOS image sensor of claim 13, wherein the multi-layer structure has a thickness of about 1,000 Å.
18. The CMOS image sensor of claim 1, wherein the metal pad comprises aluminum.
19. The CMOS image sensor of claim 1, further comprising a titanium nitride layer on the metal pad.
20. The CMOS image sensor of claim 1, wherein the photodiode region and the pad region have different thicknesses.
Type: Application
Filed: Jul 16, 2008
Publication Date: Nov 20, 2008
Inventor: Sang Gi LEE (Bucheon-city)
Application Number: 12/174,618
International Classification: H01L 27/146 (20060101);