Photodiodes Accessed By Fets Patents (Class 257/292)
  • Patent number: 12009458
    Abstract: Disclosed is a display panel. The display panel comprises: a light-emitting device; a first protection layer disposed on the light-emitting device and having an anti-glare-treated surface; a second protection layer disposed on the first protection layer and having a surface having been subjected to at least one of an anti-glare treating and an anti-reflection treating; and a transparent layer containing a transparent material that allows visible lights to penetrate there through and absorbs or reflects ultraviolet rays and infrared rays.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: June 11, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungki Kim, Jeongroh Lee, Hyunjun Jung
  • Patent number: 12002832
    Abstract: A solid-state image sensor is provided that includes a semiconductor substrate, a charge accumulator disposed in the semiconductor substrate and configured to accumulate charge, a photoelectric converter provided above the semiconductor substrate and configured to convert light to charge, and a through electrode passing through the semiconductor substrate and electrically connecting the charge accumulator with the photoelectric converter. At an end portion on the photoelectric converter side of the through electrode, a cross-sectional area of a conductor positioned at the center of the through electrode in a cut section orthogonal to a through direction of the through electrode gradually increases toward the photoelectric converter along the through direction.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: June 4, 2024
    Assignees: Sony Corporation, Sony Semiconductor Solutions Corporation
    Inventors: Shinpei Fukuoka, Moe Takeo, Sho Nishida, Hideaki Togashi, Takushi Shigetoshi, Junpei Yamamoto
  • Patent number: 11996421
    Abstract: Image sensor, mobile terminal, image capturing method are provided. Pixel array of image sensor includes preset quantity of pixel units, pixel unit includes first and second pixels that are dual pixel focusing pixels, first pixel includes red, green, and blue subpixels, second pixel includes green subpixel and infrared subpixel, and at least one of red and blue subpixels, and each subpixel is arranged in four-in-one manner; position of infrared subpixel in second pixel is same as position of red subpixel, green subpixel, blue subpixel, first combination of subpixels, or second combination of subpixels in first pixel; or position of half the infrared subpixel in second pixel is same as position of half the red subpixel, half the green subpixel, or half the blue subpixel in first pixel, and half an infrared subpixel in each of two adjacent second pixels is combined to form entire infrared subpixel.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: May 28, 2024
    Assignee: VIVO MOBILE COMMUNICATION CO., LTD.
    Inventors: Danmei Wang, Huazhao Zhou, Panpan Zhu
  • Patent number: 11990496
    Abstract: Pixels, such as for image sensors and electronic devices, include a photodiode formed in a semiconductor substrate, a floating diffusion, and a transfer structure selectively coupling the photodiode to the floating diffusion. The transfer structure includes a transfer gate formed on the semiconductor substrate, and a vertical channel structure including spaced apart first doped regions formed in the semiconductor substrate between the transfer gate and the photodiode. Each spaced apart first doped region is doped at a first dopant concentration with a first-type dopant. The spaced apart first doped regions are formed in a second doped region doped at a second dopant concentration with a second-type dopant of a different conductive type.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: May 21, 2024
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Qin Wang, Hui Zang
  • Patent number: 11990485
    Abstract: A photoelectric conversion device in the present disclosure includes a first trench extending inside a semiconductor substrate from a first face of the semiconductor substrate between a first photoelectric conversion portion and a second photoelectric conversion portion arranged in a first pixel and a second trench extending from a second face of the semiconductor substrate between the first pixel and a second pixel, and the end on the second face side of the first isolation portion is located closer to the second face side than the end on the first face side of the second isolation portion.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: May 21, 2024
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Junya Tamaki, Keita Torii, Kazuya Igarashi
  • Patent number: 11979677
    Abstract: An image sensor is provided. The image sensor includes: a pixel array including a plurality of pixels arranged along rows and columns; and a row driver which drives the plurality of pixels for each of the rows, wherein each of the plurality of pixels includes a plurality of sub-pixels, each of the plurality of sub-pixels includes a plurality of photoelectric conversion elements sharing a floating diffusion area with each other, and a micro lens disposed to overlap the plurality of photoelectric conversion elements, a readout area is defined on the pixel array in accordance with a preset readout mode, and the row driver generates a drive signal for reading out signals provided from a photoelectric conversion element included in the readout area from among the plurality of photoelectric conversion elements, and provides the drive signal to the pixel array.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: May 7, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun Sub Shim, Kyung Ho Lee
  • Patent number: 11973102
    Abstract: An imaging device including: a first semiconductor substrate; a second semiconductor substrate; and a wiring layer. The first semiconductor substrate has a first surface and a second surface and includes a sensor pixel. The second semiconductor substrate has a third surface and a fourth surface and includes a readout circuit that outputs a pixel signal based on an output from the sensor pixel. The second semiconductor substrate is stacked on the first semiconductor substrate with the first surface and the fourth surface opposed to each other. The wiring layer is between the first semiconductor substrate and the second semiconductor substrate and includes a first wiring line and a second wiring line that are electrically coupled to each other. One of the first wiring line and the second wiring line is in an electrically floating state while the other is electrically coupled to a transistor.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: April 30, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Hiroki Tojinbara
  • Patent number: 11973103
    Abstract: An imaging device and an electronic apparatus including an imaging device are provided. The imaging device includes a substrate and a photoelectric conversion film disposed above the substrate. A first pixel includes a first photoelectric conversion film region, first and second photoelectric conversion regions formed in the substrate, and a vertical transistor for the first photoelectric conversion element. A second pixel includes a second photoelectric conversion film region, first and second photoelectric conversion regions formed in the substrate, and a vertical transistor for the first photoelectric conversion element. The imaging device also includes a first floating diffusion. The first floating diffusion is shared by the first photoelectric conversion regions of the first and second pixels. A portion of the first photoelectric conversion regions of the respective pixels is between a light incident surface of the substrate and the vertical transistor for the respective pixel.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: April 30, 2024
    Assignee: SONY GROUP CORPORATION
    Inventor: Kyosuke Ito
  • Patent number: 11967603
    Abstract: Provided is a highly-sensitive image-capture element and an image capture device that can be simply manufactured, have little polarization dependency, and have micro-spectroscopic elements capable of separating incident light into three wavelength ranges integrated facing a pixel array. An image capture element has a transparent layer having a low refractive index made of SiO2 or the like and a plurality of micro-lenses laminated on a pixel array in which pixels each including a photoelectric conversion element are disposed in an array. Inside the transparent layer having the low refractive index, micro-spectroscopic elements composed of a plurality of microstructures having constant thickness (length in a direction perpendicular to the pixel array) formed of a material such as SiN having a higher refractive index than that of the transparent layer is embedded.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: April 23, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Masashi Miyata, Mitsumasa Nakajima, Toshikazu Hashimoto
  • Patent number: 11968463
    Abstract: An imaging device includes at least one floating diffusion region, and a set of photoelectric conversion regions sharing the at least one floating diffusion region and that convert incident light into electric charges. The imaging device includes a first readout circuit and a second readout circuit. The first readout circuit is coupled to the at least one floating diffusion region and located at a first side of the set of photoelectric conversion region, and the second readout circuit is coupled to the at least one floating diffusion region. The second readout circuit includes a portion located at a second side of the set of photoelectric conversion regions that is opposite the first side, and the second readout circuit is configured to control the first readout circuit.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: April 23, 2024
    Assignees: Sony Group Corporation, Sony Semiconductor Solutions Corporation
    Inventors: Shin Kitano, Koya Tsuchimoto, Kei Nakagawa
  • Patent number: 11961854
    Abstract: A semiconductor device, including a dielectric layer and a semiconductor substrate, is provided. The dielectric layer has a convexity or a concavity. The semiconductor substrate includes a first type semiconductor layer and a second type semiconductor layer sequentially stacked on the dielectric layer. The first type semiconductor layer is disposed on the convexity or the concavity. A top surface and a bottom surface of the first type semiconductor layer are protruded according to the convexity or recessed according to the concavity. A bottom surface of the second type semiconductor layer is protruded according to the convexity or recessed according to the concavity.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: April 16, 2024
    Inventor: Sywe Neng Lee
  • Patent number: 11961857
    Abstract: The present technology relates to an imaging element, an imaging device, and a manufacturing apparatus and a method that facilitate electric charge transfer. An imaging element of the present technology includes a vertical transistor that has a potential with a gradient in at least part of a charge transfer channel that transfers electric charge of a photoelectric conversion unit. Also, an imaging device of the present technology includes: an imaging element including a vertical transistor that has a potential with a gradient in at least part of a charge transfer channel that transfers electric charge of a photoelectric conversion unit; and an image processing unit that performs image processing on captured image data obtained by the imaging element.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Shinpei Fukuoka
  • Patent number: 11961855
    Abstract: An image sensing device includes a first subpixel block, a second subpixel block, a first conversion gain transistor, and a second conversion gain transistor. The first subpixel block includes a first floating diffusion region and a plurality of unit pixels sharing the first floating diffusion region. The second subpixel block includes a second floating diffusion region coupled to the first floating diffusion region and a plurality of unit pixels sharing the second floating diffusion region. The first conversion gain transistor includes a first impurity region coupled to the first and second floating diffusion regions and a second impurity region coupled to a first conversion gain capacitor. The second conversion gain transistor includes a third impurity region coupled to the second impurity region of the first conversion gain transistor and a fourth impurity region coupled to a second conversion gain capacitor.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: April 16, 2024
    Assignee: SK HYNIX INC.
    Inventor: Pyong Su Kwag
  • Patent number: 11961868
    Abstract: A back side illuminated image sensor includes a pixel formed by three doped photosensitive regions that are superposed vertically in a semiconductor substrate. Each photosensitive region is laterally framed by a respective vertical annular gate. The vertical annular gates are biased by a control circuit during an integration phase so as to generate an electrostatic potential comprising potential wells in the central portion of the volume of each doped photosensitive region and a potential barrier at each interface between two neighboring doped photosensitive regions.
    Type: Grant
    Filed: May 17, 2023
    Date of Patent: April 16, 2024
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventor: Francois Roy
  • Patent number: 11961862
    Abstract: A solid-state imaging element of an embodiment of the present disclosure includes: a semiconductor substrate including a photoelectric conversion section for each pixel; a pixel transistor provided on one surface of the semiconductor substrate; and an element separation section provided in the semiconductor substrate and including a first element separation section and a second element separation section that have mutually different configurations, the element separation section defining an active region of the pixel transistor, in which the second element separation section has, on a side surface, a first semiconductor region and a second semiconductor region that have mutually different impurity concentrations in a depth direction of the second element separation section.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Atsushi Masagaki
  • Patent number: 11960181
    Abstract: Disclosed are an array substrate, a display panel and a display. The array substrate is provided with a thin film transistor and a gate driving circuit. A trigger signal input terminal of the gate driving circuit corresponds to an output terminal of the thin film transistor, a first insulating layer is provided between a first metal layer corresponding to the output terminal of the thin film transistor and a second metal layer corresponding to the trigger signal input terminal of the gate driving circuit. A projected area of the first metal layer on the first insulating layer is partially overlapped with a projected area of the second metal layer on the first insulating layer.
    Type: Grant
    Filed: June 14, 2023
    Date of Patent: April 16, 2024
    Assignee: HKC CORPORATION LIMITED
    Inventors: Hongyan Chang, Bing Han, Haijiang Yuan
  • Patent number: 11948958
    Abstract: The solid-state imaging element includes a photoelectric converter, a first separator, and a second separator. The photoelectric converter is configured to perform photoelectric conversion of incident light. The first separator configured to separate the photoelectric converter is formed in a first trench formed from a first surface side. The second separator configured to separate the photoelectric converter is formed in a second trench formed from a second surface side facing a first surface. The present technology is applicable to an individual imaging element mounted on, e.g., a camera and configured to acquire an image of an object.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: April 2, 2024
    Assignee: SONY GROUP CORPORATION
    Inventors: Hideyuki Honda, Tetsuya Uchida, Toshifumi Wakano, Yusuke Tanaka, Yoshiharu Kudoh, Hirotoshi Nomura, Tomoyuki Hirano, Shinichi Yoshida, Yoichi Ueda, Kosuke Nakanishi
  • Patent number: 11948952
    Abstract: In a solid-state imaging device, a photoelectric conversion unit, a transfer transistor, and at least a part of electric charge holding unit, among pixel constituent elements, are disposed on a first semiconductor substrate. An amplifying transistor, a signal processing circuit other than a reset transistor, and a plurality of common output lines, to which signals are read out from a plurality of pixels, are disposed on a second semiconductor substrate.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: April 2, 2024
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Nobuyuki Endo, Kyouhei Watanabe
  • Patent number: 11948965
    Abstract: An uneven-trench pixel cell includes a semiconductor substrate that includes a floating diffusion region, a photodiode region, and, between a front surface and a back surface: a first sidewall surface, a shallow bottom surface, a second sidewall surface, and a deep bottom surface. The first sidewall surface and a shallow bottom surface define a shallow trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A shallow depth of the shallow trench exceeds a junction depth of the floating diffusion region. The second sidewall surface and a deep bottom surface define a deep trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A distance between the deep bottom surface and the front surface defines a deep depth, of the deep trench, that exceeds the shallow depth.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: April 2, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hui Zang, Gang Chen
  • Patent number: 11941210
    Abstract: A detection circuit is provided herein, which includes a first transistor, a second transistor, a third transistor, a light sensor, a capacitor, and a fourth transistor. The first transistor has a control terminal, a first terminal, and a second terminal. The second transistor is coupled to the control terminal. The third transistor is coupled to the control terminal and the second terminal. The light sensor is coupled to the control terminal. The capacitor is coupled to the control terminal. The fourth transistor is coupled to the second terminal.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: March 26, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Ya-Li Tsai, Hui-Ching Yang, Yang-Jui Huang, Te-Yu Lee
  • Patent number: 11942502
    Abstract: The present technology relates to a solid-state imaging device compatible with miniaturization of pixels, a method for manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device is formed by joining a front surface side as the wiring layer formation surface of the first semiconductor substrate to a back surface side of the second semiconductor substrate. The first semiconductor substrate includes a photodiode and a transfer transistor. The second semiconductor substrate includes a charge/voltage retention portion that retains the electric charge transferred by the transfer transistor or the voltage corresponding to the electric charge. The solid-state imaging device includes a through electrode that penetrates the second semiconductor substrate, and transmits the electric charge or the voltage to the charge/voltage retention portion. The present technology can be applied to solid-state imaging devices and the like, for example.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: March 26, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Kyohei Mizuta
  • Patent number: 11942505
    Abstract: The present invention discloses a pixel structure of a stacked image sensor and a preparation method thereof, by bonding processes to stack a first silicon wafer to a third silicon wafer up and down; wherein, a first photodiode array is set on the first silicon wafer located in middle, and a second photodiode array is provided on the second silicon wafer located above, and the surface of each the second photodiode in the second photodiode array is aligned and bonded correspondingly with the surface of each the first photodiode in the first photodiode array, so as to form a chip of the pixel structure of the stacked image sensor with a very deep junction depth, which is particularly suitable for near-infrared sensitization, and can effectively improve quantum efficiency in near-infrared wave bands; and by adopting a backlight technology, incident lights irradiating to photodiodes are not affected by the metal interconnect layers, both of sensitive and fill factor are high, especially for small-size pixels, whi
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: March 26, 2024
    Assignees: SHANGHAI IC R&D CENTER CO., LTD., CHENGDU IMAGE DESIGN TECHNOLOGY CO. LTD.
    Inventors: Chen Li, Jiebin Duan
  • Patent number: 11929376
    Abstract: The present technique relates to a solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity. The solid-state imaging device includes a semiconductor layer in which a surface side becomes a circuit formation surface, photoelectric conversion units PD1 and PD2 of two layers or more that are stacked and formed in the semiconductor layer, and a longitudinal transistor Tr1 in which a gate electrode is formed to be embedded in the semiconductor layer from a surface of the semiconductor layer. The photoelectric conversion unit PD1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion of the gate electrode of the longitudinal transistor Tr1 embedded in the semiconductor substrate and is connected to a channel formed by the longitudinal transistor Tr1.
    Type: Grant
    Filed: March 15, 2023
    Date of Patent: March 12, 2024
    Assignee: Sony Group Corporation
    Inventor: Tetsuji Yamaguchi
  • Patent number: 11925039
    Abstract: The present disclosure provides an optical-sensing device, a manufacturing method thereof, and a display panel. The optical-sensing device includes a sensor TFT disposed on a substrate and a switch TFT connected with the sensor TFT. The sensor TFT and the switch TFT include a first active layer and a second active layer, the first active layer comprises a first IGZO layer and a perovskite layer disposed on the first IGZO layer, and the second active layer comprises a second IGZO layer.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: March 5, 2024
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Haijun Wang
  • Patent number: 11916547
    Abstract: A semiconductor relay device includes a conversion circuit configured to receive an input signal from outside and pass a first current to a first node based on the input signal. A zener diode has an anode coupled to a second node and a cathode coupled to the first node. A resistor is coupled between the second node and a third node. A number n of diodes are serially coupled. A thyristor has an anode coupled to the first node, a cathode coupled to the second node, and a control terminal coupled to the third node. A transistor has a gate coupled to the first node. An anode of a diode at a first end of the n diodes is coupled to the first node, and a cathode of a diode at a second end of the n diodes is coupled to a third node.
    Type: Grant
    Filed: September 2, 2022
    Date of Patent: February 27, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Naoya Takai, Yukihiro Takifuji, Keita Saito, Kazuki Tanaka
  • Patent number: 11910624
    Abstract: A solid-state imaging element including: a photoelectric conversion layer, a first electrode and a second electrode opposed to each other with the photoelectric conversion layer interposed therebetween, a semiconductor layer provided between the first electrode and the photoelectric conversion layer, an accumulation electrode opposed to the photoelectric conversion layer with the semiconductor layer interposed therebetween, an insulating film provided between the accumulation electrode and the semiconductor layer, and a barrier layer provided between the semiconductor layer and the photoelectric conversion layer.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: February 20, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Shintarou Hirata, Hideaki Togashi, Yukio Kaneda
  • Patent number: 11903180
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes providing a semiconductor substrate having a trench. The method also includes forming a first buffer layer in the trench. The method further includes forming a doped-polysilicon layer on the first buffer layer in the trench. The method also includes performing a thermal treatment on the doped-polysilicon layer.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: February 13, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Cheng-Yan Ji, Wei-Tong Chen
  • Patent number: 11894404
    Abstract: The present disclosure provides an optical structure and a method for fabricating an optical structure, the method includes forming a light detection region in a substrate, forming an isolation structure at surrounding the light detection region, and forming a primary grid over the isolation structure, including forming a metal layer over the isolation structure, forming a first dielectric layer over the metal layer, and partially removing the metal layer and the first dielectric layer with a first mask by patterning, and forming a secondary grid at least partially surrounded by the primary grid laterally.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: February 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yun-Hao Chen, Kuo-Yu Wu, Tse-Hua Lu
  • Patent number: 11894409
    Abstract: In some example embodiments, a back side illumination (BSI) image sensor may include a pixel configured to generate electrical signals in response to light incident on a back side of a substrate. In some example embodiments, the pixel includes, a photodiode, a device isolation film adjacent to the photodiode, a dark current suppression layer above the photodiode, a light shield grid above the photodiode and including an opening area of 1 to 15% of an area of the pixel, a light shielding filter layer above the light shield grid, a planarization layer above the light shielding filter layer, a lens above the planarization layer, and/or an anti-reflective film between the photodiode and the lens.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: February 6, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yun Ki Lee, Jong Hoon Park, Jun Sung Park
  • Patent number: 11894470
    Abstract: An optical sensor includes a substrate, a photoelectric element disposed on the substrate and that includes a first electrode, an intermediate layer disposed on the first electrode, and a second electrode disposed on the intermediate layer, a barrier layer disposed on the second electrode, an insulating layer that covers the photoelectric element and the barrier layer, and a bias electrode disposed on the insulating layer and electrically connected to the second electrode. The barrier layer is spaced apart from the first electrode.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: February 6, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Ki June Lee, Jung Ha Son, Tae Sung Kim, Jae Ik Lim, Hyun Min Cho
  • Patent number: 11869907
    Abstract: A solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity are provided. The solid-state imaging device includes a semiconductor layer in which a surface side becomes a circuit formation surface, photoelectric conversion units PD1 and PD2 of two layers or more that are stacked and formed in the semiconductor layer, and a longitudinal transistor Tr1 in which a gate electrode is formed to be embedded in the semiconductor layer from a surface of the semiconductor layer. The photoelectric conversion unit PD1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion of the gate electrode of the longitudinal transistor Tr1 embedded in the semiconductor substrate and is connected to a channel formed by the longitudinal transistor Tr1.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: January 9, 2024
    Assignee: SONY GROUP CORPORATION
    Inventor: Tetsuji Yamaguchi
  • Patent number: 11862655
    Abstract: There is provided a solid-state imaging device including: one or more photoelectric conversion elements provided on side of a first surface of a semiconductor substrate; a through electrode coupled to the one or more photoelectric conversion elements, and provided between the first surface and a second surface of the semiconductor substrate; and an amplifier transistor and a floating diffusion provided on the second surface of the semiconductor substrate, in which the one or more photoelectric conversion elements are coupled to a gate of the amplifier transistor and the floating diffusion via the through electrode.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: January 2, 2024
    Assignee: Sony Group Corporation
    Inventor: Hideaki Togashi
  • Patent number: 11863892
    Abstract: An imaging unit having a superior phase-difference detection characteristic is provided. The imaging unit includes two or more image-plane phase-difference detection pixels each including a semiconductor layer, a photoelectric converter, a charge holding section, a first light-blocking film, and a second light-blocking film. The semiconductor layer includes a front surface and a back surface on an opposite side to the front surface. The photoelectric converter is provided in the semiconductor layer, and is configured to generate electric charge corresponding to a light reception amount by photoelectric conversion. The charge holding section is provided between the front surface and the photoelectric converter in the semiconductor layer, and is configured to hold the electric charge. The first light-blocking film is positioned between the photoelectric converter and the charge holding section, and has an opening through which the electric charge is allowed to pass.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: January 2, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideo Kido, Takashi Machida
  • Patent number: 11855107
    Abstract: The present disclosure relates to an image sensor structure and a manufacturing method thereof. A detection structure layer and a blind pixel structure layer are used. The detection structure layer and the blind pixel structure layer are effectively combined and further formed by ion implantation. Thus, the space ratio of a single pixel is reduced, the integration and device sensitivity are improved, and the blind pixel array and the pixel array are also in the same environment, thereby further improving the detection sensitivity and reducing the detection error.
    Type: Grant
    Filed: February 6, 2022
    Date of Patent: December 26, 2023
    Assignee: SHANGHAI IC R&D CENTER CO., LTD.
    Inventor: Xiaoxu Kang
  • Patent number: 11855227
    Abstract: A solid-state image pickup unit includes: a substrate made of a first semiconductor; a substrate made of a first semiconductor; a photoelectric conversion device provided on the substrate and including a first electrode, a photoelectric conversion layer, and a second electrode in order from the substrate; and a plurality of field-effect transistors configured to perform signal reading from the photoelectric conversion device. The plurality of transistors include a transfer transistor and an amplification transistor, the transfer transistor includes an active layer containing a second semiconductor with a larger band gap than that of the first semiconductor, and one terminal of a source and a drain of the transfer transistor also serves the first electrode or the second electrode of the photoelectric conversion device, and the other terminal of the transfer transistor is connected to a gate of the amplification transistor.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: December 26, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Tetsuji Yamaguchi
  • Patent number: 11848341
    Abstract: A highly sensitive imaging device that can perform imaging even under a low illuminance condition is provided. One electrode of a photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of a first transistor and one of a source electrode and a drain electrode of a third transistor. The other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor. The other electrode of the photoelectric conversion element is electrically connected to a first wiring. A gate electrode of the first transistor is electrically connected to a second wiring. When a potential supplied to the first wiring is HVDD, the highest value of a potential supplied to the second wiring is lower than HVDD.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: December 19, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshiyuki Kurokawa
  • Patent number: 11849236
    Abstract: The present disclosure provides a time delay integration (TDI) sensor using a rolling shutter. The TDI sensor includes multiple pixel columns. Each pixel column includes multiple pixels arranged in an along-track direction, wherein two adjacent pixels or two adjacent pixel groups in every pixel column have a separation space therebetween. The separation space is equal to a pixel height multiplied by a time ratio of a line time difference of the rolling shutter and a frame period, or equal to a summation of at least one pixel height and a multiplication of the pixel height by the time ratio of the line time difference and the frame period. The TDI sensor further records defect pixels of a pixel array such that in integrating pixel data to integrators, the pixel data associated with the defect pixels is not integrated into corresponding integrators.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: December 19, 2023
    Assignees: PIXART IMAGING INC., TAIWAN SPACE AGENCY
    Inventors: Ren-Chieh Liu, Chao-Chi Lee, Yi-Yuan Chen, En-Feng Hsu
  • Patent number: 11843016
    Abstract: An image sensor includes a semiconductor substrate of first conductivity type having first and second surfaces and including pixel regions, photoelectric conversion regions of second conductivity type respectively provided in the pixel regions, and a pixel isolation structure disposed in the semiconductor substrate to define the pixel regions and surrounding each of the photoelectric conversion regions. The pixel isolation structure includes a semiconductor pattern extending from the first surface to the second surface of the semiconductor substrate, a sidewall insulating pattern between a sidewall of the semiconductor pattern and the semiconductor substrate, and a dopant region in at least a portion of the semiconductor pattern.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: December 12, 2023
    Inventor: Jingyun Kim
  • Patent number: 11843010
    Abstract: An imaging apparatus performs a global electronic shutter operation. During an exposure period for acquiring one frame, the imaging apparatus transfers electric charges accumulated in a first period from a photoelectric conversion portion to a holding portion. When a second period has elapsed since an end time of the first period, the holding portion holds both electric charges generated in the first period and electric charges generated in the second period. A plurality of pixels included in the imaging apparatus includes a first pixel and a second pixel each having a different saturation charge quantity of the photoelectric conversion portion included in each pixel.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: December 12, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takeru Ohya, Masahiro Kobayashi
  • Patent number: 11843886
    Abstract: A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: December 12, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mineo Shimotsusa, Fumihiro Inui
  • Patent number: 11837670
    Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. To mitigate crosstalk, multiple rings of isolation structures may be formed around the SPAD. An outer deep trench isolation structure may include a metal filler such as tungsten and may be configured to absorb light. The outer deep trench isolation structure therefore prevents crosstalk between adjacent SPADs. Additionally, one or more inner deep trench isolation structures may be included. The inner deep trench isolation structures may include a low-index filler to reflect light and keep incident light in the active area of the SPAD.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: December 5, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Marc Allen Sulfridge, Anne Deignan, Nader Jedidi, Michael Gerard Keyes
  • Patent number: 11837595
    Abstract: A semiconductor device structure includes a first chip, second chip, a first metal structure, a second metal structure, a first via structure and a second via structure. The first chip includes n inter metal dielectric (IMD) layer, which includes different materials adjacent to generate a number of staggered portions having a zigzag configuration. The second chip bonded to the first chip generates a bonding interface. The first metal structure is disposed in the first chip and between the staggered portions and the bonding interface. The first via structure in the first chip stops at the first metal structure. The first via structure includes a first via metal and a first via dielectric layer. A surface roughness of the staggered portions is substantially greater than a surface roughness of the first via dielectric layer. The second via structure extends from the first via structure to the second metal structure.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: December 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Cheng-Ying Ho, Wen-De Wang, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 11830897
    Abstract: Techniques are described for implementing a square-gate source-follower (SGSF) transistor for integration with complementary metal-oxide semiconductor (CMOS) image sensor (CIS) pixels. The SGSF transistor can have an active layer with active regions, including a drain region separated from each of two source regions to form parallel current channels. A square-gate structure layer includes main-gate regions, each disposed above a corresponding one of the current channels, and a side-gate region to couple the main-gate regions. At a particular physical width (W) and current channel length (L), the parallel current channels can act similarly to a conventional linear source-follower having dimensions of 2W and the same L. SGSF implementations can provide a number of features, including higher frame rate, lower power consumption, and lower noise, as compared to those of a conventional source-follower transistor of comparable W and L dimensions.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: November 28, 2023
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Yunfei Gao, Tae Seok Oh, Jinwen Xiao
  • Patent number: 11830954
    Abstract: Microstructures of micro and/or nano holes on one or more surfaces enhance photodetector optical sensitivity. Arrangements such as a CMOS Image Sensor (CIS) as an imaging LIDAR using a high speed photodetector array wafer of Si, Ge, a Ge alloy on SI and/or Si on Ge on Si, and a wafer of CMOS Logic Processor (CLP) ib Si fi signal amplification, processing and/or transmission can be stacked for electrical interaction. The wafers can be fabricated separately and then stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays can be enhanced with microstructure holes. Pixels can be photodiodes, avalanche photodiodes, single photon avalanche photodiodes and phototransistors on the same array and can be Ge or Si pixels. The array can be of high speed photodetectors with data rates of 56 Gigabits per second, Gbps, or more per photodetector.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: November 28, 2023
    Assignee: W&WSens Devices Inc.
    Inventors: Shih-Yuan Wang, Shih-Ping Wang
  • Patent number: 11817471
    Abstract: An imaging device comprises a first chip that includes a first semiconductor substrate including a photoelectric conversion region. The first chip includes a first insulating layer including a first multilayer wiring electrically connected to the photoelectric conversion region. The first multilayer wiring includes a first vertical signal line (VSL1) to output a first pixel signal, and a first wiring. The imaging device includes a second chip including a second semiconductor substrate including a logic circuit. The second chip includes a second insulating layer including a second multilayer wiring electrically connected to the logic circuit. The second multilayer wiring includes a second wiring. The first chip and the second chip are bonded to one another, and, in a plan view, the first wiring and the second wiring overlap with at least a portion of the first vertical signal line (VSL1).
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: November 14, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hajime Yamagishi, Shota Hida, Yuusaku Kobayashi
  • Patent number: 11817465
    Abstract: Image sensors are provided. The image sensors may include a substrate including first, second, third and fourth regions, a first photoelectric conversion element in the first region, a second photoelectric conversion element in the second region, a third photoelectric conversion element in the third region, a fourth photoelectric conversion element in the fourth region, a first microlens at least partially overlapping both the first and second photoelectric conversion elements, and a second microlens at least partially overlapping both the third and fourth photoelectric conversion elements. The image sensors may also include a floating diffusion region and first, second and third pixel transistors configured to perform different functions from each other. Each of the first, second and third pixel transistors may be disposed in at least one of first, second, third and fourth pixel regions. The first pixel transistor may include multiple first pixel transistors.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: November 14, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung Bin Yun, Eun Sub Shim, Kyung Ho Lee, Sung Ho Choi, Jung Hoon Park, Jung Wook Lim, Min Ji Jung
  • Patent number: 11815633
    Abstract: Disclosed herein are apparatuses for detecting radiation and methods of making them. The method comprises forming a recess into a semiconductor substrate, wherein a portion of the semiconductor substrate extends into the recess and is surrounded by the recess; depositing semiconductor nanocrystals into the recess, the semiconductor nanocrystals having a different composition from the semiconductor substrate; forming a first doped semiconductor region in the semiconductor substrate; forming a second doped semiconductor region in the semiconductor substrate; wherein the first doped semiconductor region and the second doped semiconductor region form a p-n junction that separates the portion from the rest of the semiconductor substrate.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: November 14, 2023
    Assignee: SHENZHEN XPECTVISION TECHNOLOGY CO., LTD.
    Inventors: Yurun Liu, Peiyan Cao
  • Patent number: 11810936
    Abstract: A pixel array may include air gap reflection structures under a photodiode of a pixel sensor to reflect photons that would otherwise partially refract or scatter through a bottom surface of a photodiode. The air gap reflection structures may reflect photons upward toward the photodiode so that the photons may be absorbed by the photodiode. This may increase the quantity of photons absorbed by the photodiode, which may increase the quantum efficiency of the pixel sensor and the pixel array.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: November 7, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: ChunHao Lin, Feng-Chien Hsieh, Yun-Wei Cheng, Kuo-Cheng Lee
  • Patent number: 11810940
    Abstract: A pointed-trench pixel-array substrate includes a floating diffusion region and a photodiode region formed in a semiconductor substrate. The semiconductor substrate includes, between a top surface and a back surface thereof, a sidewall surface and a bottom surface defining a trench extending into the semiconductor substrate away from a planar region of the top surface surrounding the trench. In a cross-sectional plane perpendicular to the top surface and intersecting the floating diffusion region, the photodiode region, and the trench, (i) the bottom surface is V-shaped and (ii) the trench is located between the floating diffusion region and the photodiode region.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: November 7, 2023
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hui Zang, Gang Chen
  • Patent number: 11809058
    Abstract: An optical phase shifter may include a waveguide core that has a top surface, and a semiconductor contact that is laterally displaced relative to the waveguide core and is electrically connected to the waveguide core. A top surface of the semiconductor contact is above the top surface of the waveguide core. The waveguide core may include a p-type core region and an n-type core region. A p-type semiconductor region may be in physical contact with the n-type core region of the waveguide core, and an n-type semiconductor region may be in physical contact with the p-type core region of the waveguide core. A phase shifter region and a light-emitting region may be disposed at different depth levels, and the light-emitting region may emit light from a phase shifter region that is in a position adjacent to the light-emitting region.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: November 7, 2023
    Assignee: Analog Photonics LLC
    Inventors: Michael Watts, Ehsan Hosseini, Christopher Poulton, Erman Timurdogan