Abstract: An image sensor includes a substrate including pixel regions and having a first surface, a second surface opposite the first surface, and a first trench recessed from the first surface, a shallow device isolation pattern provided in the first trench, and a deep device isolation pattern between the pixel regions and provided in the substrate. The deep device isolation pattern includes a semiconductor pattern penetrating at least a portion of the substrate, and an isolation pattern provided between the substrate and the semiconductor pattern. The isolation pattern includes a first isolation pattern adjacent to the second surface, and a second isolation pattern adjacent to the first surface. A first interface at which the first isolation pattern contacts the second isolation pattern is spaced apart from the shallow device isolation pattern. The first isolation pattern includes a different material from that of the second isolation pattern.

Abstract: A backside illuminated image sensor, including a semiconductor layer, a first gate structure, and a light sensing device, is provided. The semiconductor layer has a first surface and a second surface opposite to each other. The first gate structure is disposed on the second surface. The light sensing device is located in the semiconductor layer. The light sensing device extends from the first surface to the second surface.

Abstract: An optical detection device includes an optical semiconductor element having a plurality of light receiving portions and a light transmitting substrate bonded to the optical semiconductor element directly or via only a light transmitting adhesive layer. A surface of the light transmitting substrate on a side opposite to the optical semiconductor element is provided with a first refractive index changing layer having a projecting and recessed structure in which a refractive index continuously changes from a refractive index of air to a refractive index of the light transmitting substrate toward the light transmitting substrate. When a distance between the optical semiconductor element and the first refractive index changing layer is A, a distance between adjacent light receiving portions of the plurality of light receiving portions is B, and a refractive index of the light transmitting substrate to a refractive index of the air is n, A>B/[2 tan{sin?1(sin 1°/n)}] is established.

Abstract: In some embodiments, a method for forming a semiconductor device is provided. The method includes etching a substrate to form a recess within a surface of the substrate. An epitaxial material is formed within the recess, a capping structure is formed on the epitaxial material, and a capping layer is formed onto the capping structure. The capping layer laterally extends past an outermost sidewall of the capping structure. Dopants are implanted into the epitaxial material. Implanting the dopants into the epitaxial material forms a first doped region having a first doping type and a second doped region having a second doping type.

Abstract: A front-side type image sensor may include a substrate successively including: a P? type doped semiconducting support substrate, an electrically insulating layer and a semiconducting active layer, and a matrix array of photodiodes in the active layer of the substrate. The substrate may include, between the support substrate and the electrically insulating layer, a P+ type doped semiconducting epitaxial layer.

Abstract: A light detecting device includes a semiconductor layer having a first surface and a second surface located on opposite sides to each other in a thickness direction, and a photoelectric conversion cell provided in the semiconductor layer and partitioned by a first isolation region. The photoelectric conversion cell includes a first photoelectric conversion region adjacent to a second photoelectric conversion region in plan view and each having a photoelectric conversion unit and a transfer transistor, a second isolation region arranged between the first photoelectric conversion region and the second photoelectric conversion region in plan view and extending in a thickness direction of the semiconductor layer, and an element formation region partitioned on the first surface side of the semiconductor layer by a third isolation region and provided with a pixel transistor. The element formation region extends over the first and second photoelectric conversion regions in plan view.

Abstract: An event detecting device may include an event signal generator configured to output a plurality of event signals, each including a first data and a second data having mutually complementary attributes and respective address data indicating positions of pixels having output the first data and the second data, a data manager configured to store one of the first data and the second data of a first one of the plurality of event signals and the respective address data in a buffer as first sub data when only one of the first data and the second data of the first one of the plurality of event signals includes the event information, and an output signal generator configured to generate an output signal using the first sub data and a second sub data when the second sub data, different from the first sub data, is stored in the buffer.

Abstract: An NMOS structure includes a semiconductor substrate, a dielectric structure, a source doped region, a drain doped region, a channel region, a gate structure and two isolation P-type wells. The dielectric structure is formed in the semiconductor substrate to define an active region, in which the source/drain doped region and the channel region are formed. The channel region includes two opposite first sides and two opposite second sides. The source/drain doped region is respectively formed between the two second sides and the dielectric structure. The gate structure is formed on the semiconductor substrate. The gate structure covers a part of the dielectric structure beside the first sides. The two isolation P-type wells are formed in a part of the dielectric structure not covered by the gate structure. The isolation P-type wells respectively surround a periphery of the source/drain doped region and end at the respective second side.

Abstract: The present application discloses a UTBB photodetector pixel unit, array and method, including: a silicon film layer, a buried oxide layer, a charge collection layer and a substrate, the silicon film layer, the buried oxide layer, the charge collection layer and the substrate being arranged in sequence from top to bottom; the silicon film layer includes NMOS transistors or PMOS transistors; the charge collection layer includes charge collection control regions and charge accumulation regions; and the substrate includes an N-type substrate or a P-type substrate. A centripetal electric field is formed around the charge accumulation regions, and photo-generated charges are accumulated in the corresponding pixel units under the action of the centripetal electric field.

Abstract: An image sensor includes a substrate having first and second surfaces and first and second regions. Unit pixels including photoelectric conversion layers are arranged inside the first region. A pixel separation pattern extends from the first surface to the second surface in the first region, separates each of the unit pixels, and includes a pixel separation spacer film and a pixel separation filling film. A dummy pixel separation pattern extends from the first surface to the second surface in the second region, and includes a dummy pixel separation filling film. A wiring structure disposed on the second surface includes an inter-wiring insulating film and a first wiring. A first contact directly connects the dummy pixel separation filling film and connects the dummy pixel separation filling film to the first wiring. A height of the pixel separation filling film is greater than a height of the dummy pixel separation filling film.

Abstract: A second substrate including a pixel circuit that outputs a pixel signal on a basis of electric charges outputted from the sensor pixel and a third substrate including a processing circuit that performs signal processing on the pixel signal are provided. The first substrate, the second substrate, and the third substrate are stacked in this order. A semiconductor layer including the pixel circuit is divided by an insulating layer. The insulating layer divides the semiconductor layer to allow a center position of a continuous region of the semiconductor layer or a center position of a region that divides the semiconductor layer to correspond to a position of an optical center of the sensor pixel, in at least one direction on a plane of the sensor pixel perpendicular to an optical axis direction.

Abstract: In some example embodiments, a back side illumination (BSI) image sensor may include a pixel configured to generate electrical signals in response to light incident on a back side of a substrate. In some example embodiments, the pixel includes, a photodiode, a device isolation film adjacent to the photodiode, a dark current suppression layer above the photodiode, a light shield grid above the photodiode and including an opening area of 1 to 15% of an area of the pixel, a light shielding filter layer above the light shield grid, a planarization layer above the light shielding filter layer, a lens above the planarization layer, and/or an anti-reflective film between the photodiode and the lens.

Abstract: An image sensor includes a substrate including a first surface and a second surface opposite to the first surface; a plurality of pixel sensors disposed in the substrate, a sensor isolation feature disposed in the substrate defining an active region, and a dielectric layer between the sensor isolation feature and the substrate, wherein the sensor isolation feature comprises a conductive material.

Abstract: There is provided a structure to improve BSI global shutter efficiency. In a sensor pixel circuit, at least one strong electric field is formed at the position of a floating diffusion region to accordingly have the effect of shielding the floating diffusion region. Or, the semiconductor material from the floating diffusion node toward a light incident direction is removed in the manufacturing process such that a depletion region cannot be formed in this direction. Or, a reflection layer or a photoresist layer is formed in the light incident direction to block the light. In these ways, charges generated by the undesired noises are reduced, and noise charges are difficult to reach the floating diffusion region thereby improving the shutter efficiency.

Abstract: A solid-state imaging device includes: a first semiconductor substrate including a photoelectric conversion element; and a second semiconductor substrate including at least a part of a peripheral circuit arranged in a main face of the second semiconductor substrate, the peripheral circuit generating a signal based on the charge of the photoelectric conversion element, a main face of the first semiconductor substrate and the main face of the second semiconductor substrate being opposed to each other with sandwiching a wiring structure therebetween; a pad to be connected to an external terminal; and a protection circuit electrically connected to the pad and to the peripheral circuit, wherein the protection circuit is arranged in the main face of the second semiconductor substrate.

Abstract: An imaging device includes pixels. Each of the pixels includes a counter electrode, a pixel electrode, and a photoelectric conversion layer that includes carbon nanotubes. The pixels include a first pixel and a second pixel adjacent to the first pixel. The pixel electrode of the first pixel and the pixel electrode of the second pixel are isolated from each other. Carbon nanotubes included in the photoelectric conversion layer in at least one selected from the group consisting of the first pixel and the second pixel include at least one first carbon nanotube that satisfies A<B, where A denotes length of a carbon nanotube in a direction in which the pixel electrode of the first pixel and the pixel electrode of the second pixel are arranged and B denotes length of a gap between the pixel electrode of the first pixel and the pixel electrode of the second pixel.

Abstract: The present disclosure relates to a CMOS image sensor, and an associated method of formation. In some embodiments, the CMOS image sensor comprises a substrate and a transfer gate disposed from a front-side surface of the substrate. The CMOS image sensor further comprises a photo detecting column disposed at one side of the transfer gate within the substrate. The photo detecting column comprises a doped sensing layer comprising one or more recessed portions along a circumference of the doped sensing layer in parallel to the front-side surface of the substrate. By forming the photo detecting column with recessed portions, a junction interface is enlarged compared to a previous p-n junction interface without recessed portions, and thus a full well capacity of the photodiode structure is improved.

Abstract: The present disclosure provides a time delay integration (TDI) sensor using a rolling shutter. The TDI sensor includes multiple pixel columns. Each pixel column includes multiple pixels arranged in an along-track direction, wherein two adjacent pixels or two adjacent pixel groups in every pixel column have a separation space therebetween. The separation space is equal to a pixel height multiplied by a time ratio of a line time difference of the rolling shutter and a frame period, or equal to a summation of at least one pixel height and a multiplication of the pixel height by the time ratio of the line time difference and the frame period. The TDI sensor further records defect pixels of a pixel array such that in integrating pixel data to integrators, the pixel data associated with the defect pixels is not integrated into corresponding integrators.

Abstract: An image sensor includes: a first device isolation part in a substrate and defining an active region; a first gate electrode having a first and second gate sidewalls; and a first impurity region and a second impurity region adjacent to the first and second gate sidewalls, wherein the active region includes: a first active central part; a first active protrusion; and a second active protrusion, wherein the first device isolation part has a first isolation sidewall overlapping the first active central part, and wherein a first straight line is at least partially spaced apart from the first isolation sidewall, wherein the first straight line links a first point, at which the first active protrusion meets the first active central part, to a second point, at which the second active protrusion meets the first active central part.

Abstract: A method for diagnosing an optical sensor includes a photodetector and an integrator. The method comprises exposing the photodetector to incoming light; obtaining an initial integrated signal at an initial frame; at least once executing the steps of changing at least one control parameter of the optical sensor, exposing the photodetector to incoming light, and obtaining one or more subsequent integrated signals at a subsequent frame; obtaining a characteristic of the optical sensor from the obtained integrated signals; comparing the obtained characteristic with a pre-determined characteristic of the optical sensor to diagnose the optical sensor.

Abstract: An imaging device according to an embodiment of the present disclosure includes: a first substrate including a sensor pixel that performs photoelectric conversion; a second substrate including a pixel circuit that outputs a pixel signal on a basis of electric charges outputted from the sensor pixel; and a third substrate including a processing circuit that performs signal processing on the pixel signal. The first substrate, the second substrate, and the third substrate are stacked in this order, and a concentration of electrically-conductive type impurities in a region on side of the first substrate is higher than a concentration of electrically-conductive type impurities in a region on side of the third substrate, in at least one or more semiconductor layers in which a field-effect transistor of the pixel circuit is provided.

Abstract: A range-measuring device encompasses N charge-distributing gates configured to distribute the signal charges toward N charge-transfer routes, a charge-exhausting gate for exhausting unwanted charges other than the signal charges, N charge-accumulation regions for accumulating the signal charges, a driver for transmitting drive signals to the N charge-distributing gates and the charge-exhausting gate, a readout-amplifier for reading out output signals corresponding to the signal charges accumulated in the N charge-accumulation regions, an arithmetic logic circuit configured to execute a job for calculating ranges to the target after receiving the output signals transmitted through the readout-amplifier.

Abstract: A circuit for sensing radiation with high sensitivity is disclosed. The circuit comprises a first transistor configurable to reset a voltage-level at a circuit node to a voltage reference. The circuit also comprises measurement circuitry configured to measure the voltage-level at the circuit node, and at least one photodiode configured to vary the voltage-level at the circuit node in response to radiation incident upon the photodiode during an integration period. The circuit also comprises processing circuitry configured to control the first transistor to reset the voltage-level at the circuit node and to subsequently configure the measurement circuitry to measure the voltage-level at a start and at an end of the integration period.

Abstract: A semiconductor device includes a substrate, a gate all around (GAA) device overlying the substrate, and a thin film transistor (TFT) overlying the GAA device, and a passive device overlying the TFT. The substrate, the GAA device, the TFT, and the passive device is subsequently stacked on each other and at least partially overlap with each other. A via includes a first end, a second end, and a middle portion of the via that is located between the first end and the second end of the via. The first end of the via is connected to the passive device and the second end of the via is connected to one layer of the GAA device. The middle portion of the via is laterally spaced apart from the TFT and the passive device.

Abstract: An image sensor structure including a substrate, a nanowire structure, a first conductive line, a second conductive line, and a third conductive line is provided. The nanowire structure includes a first doped layer, a second doped layer, a third doped layer, and a fourth doped layer sequentially stacked on the substrate. The first doped layer and the third doped layer have a first conductive type. The second doped layer and the fourth doped layer have a second conductive type. The first conductive line is connected to a sidewall of the second doped layer. The second conductive line is connected to a sidewall of the third doped layer. The third conductive line is connected to the fourth doped layer.

Abstract: The present disclosure relates to an imaging device capable of achieving miniaturization and height reduction of a device configuration, reducing generation of a flare or a ghost, preventing separation of a lens. A size relation of “solid-state imaging element>lens non-effective region>lens effective region” is established in a vertical direction with respect to an incident direction of incident light. The present disclosure is applicable to an imaging device.

Abstract: Some aspects of the present disclosure relate to a method. In the method, a semiconductor substrate is received. A photodetector is formed in the semiconductor substrate. An interconnect structure is formed over the photodetector and over a frontside of the semiconductor substrate. A backside of the semiconductor substrate is thinned, the backside being furthest from the interconnect structure. A ring-shaped structure is formed so as to extend into the thinned backside of the semiconductor substrate to laterally surround the photodetector. A series of trench structures are formed to extend into the thinned backside of the semiconductor substrate. The series of trench structures are laterally surrounded by the ring-shaped structure and extend into the photodetector.

Abstract: An image pickup element includes: a semiconductor substrate including a photoelectric conversion section for each pixel; a pixel separation groove provided in the semiconductor substrate; and a fixed charge film provided on a light-receiving surface side of the semiconductor substrate, wherein the fixed charge film includes a first insulating film and a second insulating film, the first insulating film being provided contiguously from the light-receiving surface to a wall surface and a bottom surface of the pixel separation groove, and the second insulating film being provided on a part of the first insulating film, the part corresponding to at least the light-receiving surface.

Abstract: A light detector according to one embodiment includes a substrate, a plurality of avalanche photodiodes, a well region, and a microlens array. The plurality of avalanche photodiodes are provided above the substrate. Each of the avalanche photodiodes is surrounded by a trench portion among a plurality of trench portions. The well region is provided between the trench portions that are adjacent to each other. The well region includes at least one of a transistor and a diode. The microlens array is provided to cover the avalanche photodiodes.

Abstract: [Problem] To provide an optical sensor which can read out faster and requires lower power consumption than conventional optical sensors while maintaining advantages and superiorities of conventional optical sensors in which a transfer switch is provided between a light receiving element (PD) and a floating diffusion (CFD). [Solution] A semiconductor junction of a light-receiving element is fully depleted and a potential curve of electrons has a negative slope toward the floating diffusion and connected to an uppermost position of an electronic potential well of the floating g diffusion keeping its negative slope state.

Abstract: A trench-gate source-follower (TGSF) transistor is described, such as for integration with image sensor pixels. The TGSF transistor is at least partially built into a trench etched into a substrate. A contiguous doped region is implanted around the inner walls of the trench to form a buried-trench current channel. A trench-gate is formed to have at least a buried portion that fills the volume of the trench. A gate oxide layer can be disposed between the buried portion of the trench-gate and the buried-trench current channel. Drain and source regions are formed on either end of the trench-gate. Activating the trench-gate causes current to flow between the drain and source regions via the buried-trench current channel around the buried portion of the trench-gate. The geometry of the buried-trench current channel can effectively increase the width of the active region of the source-follower transistor without increasing its physical layout width.

Abstract: A saddle-gate source follower transistor is described, such as for integration with in-pixel circuitry of complementary metal-oxide semiconductor (CMOS) image sensor (CIS) pixels. The saddle-gate source-follower transistor structure can include a channel region having a three-dimensional geometry defined on its axial sides by trenches. A gate oxide layer is formed over the top and axial sides of the channel region, and a saddle-gate structure is formed on the gate oxide layer. As such, the saddle-gate structure includes a seat portion extending over the top of the channel region, and first and second fender portions extending over the first and second axial sides of the channel region, such that the first and second fender portions are buried below an upper surface of the semiconductor substrate (e.g., buried into trenches formed in side isolation regions).

Abstract: A unit pixel and a displaying apparatus including the unit pixel are provided. The unit pixel includes a transparent substrate, a plurality of light emitting devices arranged on the transparent substrate, a light blocking layer disposed between the transparent substrate and the light emitting devices, and having at least one window, and a semi-transmissive layer disposed between at least one of the plurality of light emitting devices and the transparent substrate to overlap with the window at least partially.

Abstract: The present technology relates to an imaging element and electronic equipment that enable an increase in the amount of saturated charge. The imaging element includes a substrate, a first photoelectric conversion region adjacent a second photoelectric conversion region in the substrate, a pixel isolation section between the first photoelectric conversion region and the second photoelectric conversion region, and a junction region in a side wall of the pixel isolation section, the junction region including a first impurity region including first impurities and a second impurity region including second impurities. The length of a side of the first impurity region, the side perpendicularly intersecting two parallel sides of four sides of the pixel isolation section enclosing the first photoelectric conversion region, is larger than the length between the two parallel sides of the pixel isolation section. The present technology is applicable to, for example, an imaging apparatus.

Abstract: Image sensors may include a base substrate including a substrate layer, a buried insulation layer on the substrate layer, and a semiconductor layer on the buried insulation layer, a photo sensing device in the substrate layer, a buried impurity region spaced apart from the photo sensing device in an upper portion of the substrate layer, a transfer gate including a vertical gate extending through the semiconductor layer and the buried insulation layer and extending into an inner portion of the substrate layer, which is between the photo sensing device and the buried impurity region, a planar gate on the semiconductor layer, and a gate insulation layer between the substrate layer and the planar gate.

Abstract: There is provided a solid-state imaging device including: a first semiconductor layer including a photoelectric converter and an electric charge accumulation section for each pixel, the electric charge accumulation section in which a signal electric charge generated in the photoelectric converter is accumulated; a pixel separation section that is provided in the first semiconductor layer, and partitions a plurality of the pixels from each other; a second semiconductor layer that is provided with a pixel transistor and is stacked on the first semiconductor layer, the pixel transistor that reads the signal electric charge of the electric charge accumulation section; and a first shared coupling section that is provided between the second semiconductor layer and the first semiconductor layer, and is provided to straddle the pixel separation section and is electrically coupled to a plurality of the electric charge accumulation sections.

Abstract: Disclosed is an image sensor. The image sensor includes at least one photosensitive unit including at least two photosensitive layers stacked and not completely overlapped, a region where each photosensitive layer is not overlapped with other photosensitive layers being configured to arrange an electrode wire, and photosensitive component contents of the at least two photosensitive layers being different. According to the present disclosure, a wavelength range of sensible light of each photosensitive unit may be enlarged, so that more image details may be recorded, images with a high dynamic range may be generated, and people may experience a visual effect close to a real environment. In addition, as there is no need to reduce a photosensitive area of the photosensitive layer for arranging the electrode wires, the photosensitive area of the photosensitive layer is increased and thereby a dynamic range of the image sensor is improved.

Abstract: An image sensor device is disclosed. The image sensor device includes a substrate having a plurality of pixel regions. Two adjacent pixel regions are optically isolated by an isolation structure. In an embodiment, a method of forming the isolation structure includes receiving a workpiece having a first substrate, etching a frontside of the first substrate to form a first trench, depositing a fill layer in the first trench, removing a portion of the fill layer from the backside of the first substrate to form a second trench surrounded by the fill layer, and depositing a metal layer in the second trench to form the isolation structure.

Abstract: A pixel cell readout circuit comprises a comparator with a current mirror having first and second current paths, a first input transistor coupled to the first current path, a low conversion gain (LCG) second input transistor selectively coupled to the second current path, and a high conversion gain (HCG) second input transistor selectively coupled to the second current path. The pixel cell readout circuit further comprises a gain network coupled between a gate node of the first input transistor and a ramp generator output, wherein the gain network is configured to provide a variable comparator gain to the comparator, an LCG auto-zero switch coupled between a drain node and a gate node of the LCG second input transistor, and an HCG auto-zero switch coupled between a drain node and a gate node of the HCG second input transistor.

Abstract: A photoelectric conversion element includes: a first electrode; a second electrode; and a photoelectric conversion layer disposed between the first electrode and the second electrode and containing semiconducting carbon nanotubes and a first material that functions as a donor or an acceptor for the semiconducting carbon nanotubes. The semiconducting carbon nanotubes have light absorption characteristics including a first absorption peak at a first wavelength, a second absorption peak at a second wavelength shorter than the first wavelength, and a third absorption peak at a third wavelength shorter than the second wavelength. The first material is transparent to light in at least one wavelength range selected from the group consisting of a first wavelength range between the first wavelength and the second wavelength and a second wavelength range between the second wavelength and the third wavelength.

Abstract: An image sensor includes a semiconductor substrate of first conductivity type having first and second surfaces and including pixel regions, photoelectric conversion regions of second conductivity type respectively provided in the pixel regions, and a pixel isolation structure disposed in the semiconductor substrate to define the pixel regions and surrounding each of the photoelectric conversion regions. The pixel isolation structure includes a semiconductor pattern extending from the first surface to the second surface of the semiconductor substrate, a sidewall insulating pattern between a sidewall of the semiconductor pattern and the semiconductor substrate, and a dopant region in at least a portion of the semiconductor pattern.

Abstract: An imaging device includes a plurality of imaging elements 10. Each of the imaging elements 10 includes: a plurality of photoelectric conversion regions PD arrayed in a first direction and a second direction; a floating diffusion layer FD shared by the photoelectric conversion regions PD; a transfer control electrode TG; a first charge transfer control electrode CG that controls charge transfer between the photoelectric conversion regions PD arrayed in the first direction; and a second charge transfer control electrode CG that controls charge transfer between the photoelectric conversion regions PD arrayed in the second direction.

Abstract: Provided is a solid-state imaging device capable of further improving reliability of a solid-state imaging device and further reducing manufacturing cost. Provided is a solid-state imaging device including a second semiconductor substrate provided with a photoelectric conversion unit and a second element, a second insulating layer, a first semiconductor substrate provided with a first element, and a first insulating layer arranged in this order from a light incident side, and including a groove formed on the first semiconductor substrate, in which the groove has a first side wall and a second side wall, and a part of at least one side wall of the first side wall or the second side wall extends in an oblique direction with respect to a surface of the first semiconductor substrate on the light incident side.

Abstract: An image sensor includes a pixel array including first pixels and second pixels, each of the first and second pixels including photodiodes, a sampling circuit detecting a reset voltage and a pixel voltage from the first and second pixels and generating an analog signal, an analog-to-digital converter image data from the analog signal, and a signal processing circuit generating an image using the image data. Each of the first pixels includes a first conductivity-type well separating the photodiodes and having impurities of a first conductivity-type. The photodiodes have impurities of a second conductivity-type different from the first conductivity-type. Each of the second pixels includes a second conductivity-type well separating the photodiodes and having impurities of the second conductivity-type different from the first conductivity-type. A potential level of the second conductivity-type well is higher than a potential level of the first conductivity-type well.

Abstract: A display apparatus including a substrate including a display area and a peripheral area outside the display area, a first insulating layer over the substrate in the display area and the peripheral area, the first insulating layer including a plurality of first contact holes located in the display area, a plurality of second contact holes located in the peripheral area, and a plurality of dummy contact holes located between the plurality of first contact holes and the plurality of second contact holes, first wirings filling the plurality of first contact holes, second wirings filling the plurality of second contact holes, and a second insulating layer covering the first wirings and the second wirings and filling the plurality of dummy contact holes.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming a semiconductor device, the method including forming a plurality of photodetectors in a substrate. A device isolation structure is formed within the substrate. The device isolation structure laterally wraps around the plurality of photodetectors. An outer isolation structure is formed within the substrate. The device isolation structure is spaced between sidewalls of the outer isolation structure. The device isolation structure and the outer isolation structure comprise a dielectric material.

Abstract: An image sensor includes a substrate, a first isolation region defining a unit pixel, a first photoelectric conversion region in the unit pixel, a second photoelectric conversion region in the unit pixel, the second photoelectric conversion region spaced apart from the first photoelectric conversion region, a floating diffusion region, the floating diffusion region adjacent to the first surface of the substrate, a first transfer gate on the first surface of the substrate, the first transfer gate between the first photoelectric conversion region and the floating diffusion region, and a second transfer gate on the first surface of the substrate, the second transfer gate between the second photoelectric conversion region and the floating diffusion region. At least a part of the first transfer gate is buried in the substrate, and a bottom surface of the first transfer gate is different in height from a bottom surface of the second transfer gate.

Abstract: Provided is a photoelectric sensor, a random accessible active pixel circuit, an image sensor and a camera.

Abstract: The present disclosure provides a CMOS image sensor and a pixel structure thereof, and a method for manufacturing a deep trench isolation grid structure in the pixel structure. The method for manufacturing the deep trench isolation grid structure comprises: depositing a first isolation layer and a second isolation layer sequentially on the side walls and bottom surface of each deep trench; and depositing a third isolation layer that fills each deep trench on the upper surface of the second isolation layer, so that the first isolation layer, the second isolation layer and the third isolation layer in the plurality of deep trenches constitute the grid. The deep trench isolation grid structure formed by the method can effectively reduce electrical crosstalk between adjacent grid lines, thereby improving the device performance of the CMOS image sensor which is built upon the deep trench isolation grid structure and the pixel structure thereof.

Abstract: A sensor includes pixels supported by a substrate doped with a first conductivity type. Each pixel includes a portion of the substrate delimited by a vertical insulation structure with an image sensing assembly and a depth sensing assembly. The image sensing assembly includes a first region of the substrate more heavily doped with the first conductivity type and a first vertical transfer gate completely laterally surrounding the first region. Each of the depth sensing assemblies includes a second region of the substrate more heavily doped with the first conductivity type a second vertical transfer gate opposite a corresponding portion of the first vertical transfer gate. The second region is arranged between the second vertical transfer gate and the corresponding portion of the first vertical transfer gate.