Photodiode Array Or Mos Imager (epo) Patents (Class 257/E27.133)
  • Patent number: 10629786
    Abstract: A light-emitting device and a manufacturing method thereof are provided, which device yields light exhibiting an actual hue with a deviation reduced as much as possible from a designed hue value, wherein the light is a mixture of light emitted from densely-mounted light-emitting elements and excited light from a phosphor contained in a resin sealing the light-emitting elements. The light-emitting device includes a board, light-emitting elements mounted densely on the board so that light-emitting surfaces thereof face opposite to the board, and a seal resin containing a plurality of different phosphors and covering all of the light-emitting elements, wherein the phosphors are excited by light from the light-emitting elements and deposited on upper surfaces of the light-emitting elements. A space between adjacent light-emitting elements has a length of 5 ?m or more and 120% or less of a median diameter D50 of a phosphor which has the largest average particle size of the phosphors.
    Type: Grant
    Filed: May 30, 2016
    Date of Patent: April 21, 2020
    Assignees: CITIZEN ELECTRONICS CO., LTD., CITIZEN WATCH CO., LTD.
    Inventors: Sadato Imai, Masahide Watanabe, Hirohiko Ishii, Koki Hirasawa
  • Patent number: 10157954
    Abstract: An optical sensor including a semiconductor substrate; a first light absorption region formed in the semiconductor substrate, the first light absorption region configured to absorb photons at a first wavelength range and to generate photo-carriers from the absorbed photons; a second light absorption region formed on the first light absorption region, the second light absorption region configured to absorb photons at a second wavelength range and to generate photo-carriers from the absorbed photons; and a sensor control signal coupled to the second light absorption region, the sensor control signal configured to provide at least a first control level and a second control level.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: December 18, 2018
    Assignee: Artilux Corporation
    Inventors: Yun-Chung Na, Szu-Lin Cheng, Shu-Lu Chen, Han-Din Liu, Hui-Wen Chen, Che-Fu Liang
  • Patent number: 10140689
    Abstract: An efficient patch-based method for video denoising is described herein. A noisy patch is selected from a current frame and a motion-compensated patch in the previous denoised frame is found. The two patches go through a patch-denoising process to generate a denoised patch. A rotational buffer and aggregation technique is used to generate the denoised current video frame.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: November 27, 2018
    Assignee: Sony Corporation
    Inventor: Xiaogang Dong
  • Patent number: 10063801
    Abstract: An image capturing device includes a pixel unit and a buffer. In the pixel unit, pixels are arranged in a matrix, wherein each pixel includes a photoelectric conversion unit, a transfer transistor, and an amplification transistor. In the pixel unit, first and second pixel rows are arranged in a column direction. A first pixel row first pixel includes a first switch that changes a capacitance value at an input node of an amplification transistor included in the first pixel. A second pixel row second pixel includes a second switch that changes a capacitance value at an input node of an amplification transistor included in the second pixel. The buffer drives the first and second switches. A buffer output node is electrically connected to a first switch input node and a second switch input node to be common to the first switch input node and the second switch input node.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: August 28, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiromasa Tsuboi
  • Patent number: 9979483
    Abstract: Receiving a plurality of optical signals from a plurality of optical paths using a single optical receiver having a large-area photodiode having an active area that is optically coupled to the plurality of optical paths provides significant commercial advantages such as lower cost as well as reduced size and maintenance.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: May 22, 2018
    Assignee: Aurora Networks, Inc.
    Inventor: Sudhesh Mysore
  • Patent number: 9893112
    Abstract: An optical sensor including a semiconductor substrate; a first light absorption region formed in the semiconductor substrate, the first light absorption region configured to absorb photons at a first wavelength range and to generate photo-carriers from the absorbed photons; a second light absorption region formed on the first light absorption region, the second light absorption region configured to absorb photons at a second wavelength range and to generate photo-carriers from the absorbed photons; and a sensor control signal coupled to the second light absorption region, the sensor control signal configured to provide at least a first control level and a second control level.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: February 13, 2018
    Assignee: Artilux Corporation
    Inventors: Yun-Chung Na, Szu-Lin Cheng, Shu-Lu Chen, Han-Din Liu, Hui-Wen Chen, Che-Fu Liang
  • Patent number: 9871067
    Abstract: An infrared image sensor component includes at least one III-V compound layer on the semiconductor substrate, in which the portion of the III-V compound layer(s) uncovered by the patterns is utilized as active pixel region for detecting the incident infrared ray. The infrared image sensor component includes at least one transistor coupled to the active pixel region, and charge generated by the active pixel region is transmitted to the transistor.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: January 16, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Ying Wu, Li-Hsin Chu, Chung-Chuan Tseng, Chia-Wei Liu
  • Patent number: 9853085
    Abstract: There is provided an imaging device that includes photovoltaic type pixels that have photoelectric conversion regions generating photovoltaic power for each pixel depending on irradiation light; and an element isolation region that is provided between the photoelectric conversion regions of adjacent pixels and in a state of substantially surrounding the photoelectric conversion region.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: December 26, 2017
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Tsutomu Imoto, Keiji Mabuchi
  • Patent number: 9825077
    Abstract: A photoelectric conversion device includes a photoelectric conversion region having a plurality of photoelectric conversion elements and a first MOS transistor configured to read a signal in response to an electric charge of each photoelectric conversion element; and a peripheral circuit region having a second MOS transistor configured to drive the first MOS transistor and/or amplify the signal read from the photoelectric conversion region, the photoelectric conversion region and the peripheral circuit region being located on the same semiconductor substrate, wherein an impurity concentration in a drain of the first MOS transistor is lower than an impurity concentration in a drain of the second MOS transistor.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: November 21, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Watanabe, Tetsuya Itano, Hidekazu Takahashi, Shunsuke Takimoto, Kotaro Abukawa, Hiroaki Naruse, Shigeru Nishimura, Masatsugu Itahashi
  • Patent number: 9806124
    Abstract: When forming a hollow portion between each color filter, in order to realize the formation of the hollow portions with a narrower width, a plurality of light receiving portions are formed on the upper surface of a semiconductor substrate, a plurality of color filters corresponding to each of the light receiving portions are formed above the semiconductor substrate, a photoresist is formed on each color filter, side walls are formed on the side surfaces of the photoresist, and a hollow portion is formed between each color filter by performing etching using at least the side walls as a mask.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: October 31, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kyouhei Watanabe
  • Patent number: 9768224
    Abstract: A method includes fabricating an image sensing element in a substrate. A plurality of inter-metal dielectric (IMD) layers are formed over the substrate. Each IMD layer includes a metal layer and a dielectric layer. A planar top surface of a top IMD layer of the plurality of IMD layers is planarized. A portion of the top IMD layer is then removed to transform a region of the planar top surface to a curved recess. A lens is formed on the top IMD layer and in the curved recess. A color filter layer is disposed over the lens and the image sensing element.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: September 19, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Hsuan Hsu, Dun-Nian Yaung, Yean-Kuen Fang
  • Patent number: 9762818
    Abstract: An image sensing device, a system and a method thereof and a charge sensing device are provided. The image sensing device includes a charge sensor, a pixel circuit, a selector and a pulse generator. The charge sensor includes a sensing electrode and generates an induced charge on the sensing electrode. The pixel circuit transforms the induced charge into a pixel voltage. Before the image sensing device outputs the pixel voltage, the pixel circuit receives a pulse voltage from the pulse generator such that at least one transistor in the pixel circuit raises a hot carrier injection effect, so as to amplify the induced charge on the sensing electrode.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: September 12, 2017
    Assignee: Industrial Technology Research Institute
    Inventors: Sheng-Yu Peng, Hui-Hsin Lu
  • Patent number: 9571765
    Abstract: An imager including sub-imager pixel arrays having a plurality of four-side buttable imagers distributed on a substrate and an on-chip digitizing readout circuit. Pixel groupings formed from among the plurality of four-side buttable imagers. The readout electronics including a buffer amplifier for each of the pixel groupings and connected to respective outputs of each four-side buttable imager of the pixel grouping. A plurality of shared analog front ends, each shared analog front end connected to respective multiple buffer amplifiers from among the plurality of pixel groupings. An analog-to-digital converter located at a common centroid location relative to the plurality of shared analog front ends, the analog-to-digital converter having a fully addressable input selection to individually select an output from each of the plurality of shared analog front ends. An output of the analog-to-digital converter connected to a trace on a back surface of the wafer substrate by a through-substrate-via.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: February 14, 2017
    Assignee: General Electric Company
    Inventors: Jianjun Guo, Brian David Yanoff, Jonathan David Short, Biju Jacob
  • Patent number: 9379151
    Abstract: An image sensor device is provided, and includes pixel units. Each of the pixel units includes a light sensing element, a first transistor and a second transistor. The first transistor is coupled to the light sensing element. The second transistor is coupled to the light sensing element and the first transistor. The first transistor includes a first gate structure having a first width, and the second transistor includes a second gate structure having a second width, in which a distance between the first gate structure and the second gate structure is substantially greater than the first width and the second width.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: June 28, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Yu Wei, Yin-Chen Chen, Yen-Liang Lin, Yung-Lung Hsu, Hsin-Chi Chen
  • Patent number: 9252183
    Abstract: When forming a hollow portion between each color filter, in order to realize the formation of the hollow portions with a narrower width, a plurality of light receiving portions are formed on the upper surface of a semiconductor substrate, a plurality of color filters corresponding to each of the light receiving portions are formed above the semiconductor substrate, a photoresist is formed on each color filter, side walls are formed on the side surfaces of the photoresist, and a hollow portion is formed between each color filter by performing etching using at least the side walls as a mask.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: February 2, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masaki Kurihara, Daisuke Shimoyama, Masataka Ito, Kyouhei Watanabe
  • Patent number: 9041132
    Abstract: A solid-state image pickup device includes a plurality of pixels, each of the pixels including a photoelectric conversion portion, a charge holding portion, a floating diffusion, and a transfer portion. The pixel also includes a beneath-holding-portion isolation layer and a pixel isolation layer. An end portion on a photoelectric conversion portion side of the pixel isolation layer is away from the photoelectric conversion portion compared to an end portion on a photoelectric conversion portion side of the beneath-holding-portion isolation layer, and an N-type semiconductor region constituting part of the photoelectric conversion portion is disposed under at least part of the beneath-holding-portion isolation layer.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: May 26, 2015
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masahiro Kobayashi, Yuichiro Yamashita, Yusuke Onuki
  • Patent number: 9029749
    Abstract: According to one embodiment, a solid-state imaging device including a plurality of pixels two-dimensionally arranged at a preset pitch in a semiconductor substrate is provided. Each of the pixels is configured to include first and second photodiodes that photoelectrically convert incident light and store signal charges obtained by conversion, a first micro-lens that focuses light on the first photodiode, and a second micro-lens that focuses light on the second photodiode. The saturation charge amount of the second photodiode is larger than that of the first photodiode. Further, the aperture of the second micro-lens is smaller than that of the first micro-lens.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: May 12, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoko Unagami, Makoto Monoi, Nagataka Tanaka
  • Patent number: 9024288
    Abstract: Embodiments of the present invention provide an array substrate, a manufacturing method thereof and a display device. The manufacturing method of an array substrate, comprising: forming a gate electrode on a base substrate by a first patterning process, and then depositing a gate insulating layer on the base substrate on which the gate electrode is formed; forming source and drain electrodes on the base substrate obtained after the above step, by a second patterning process; forming an active layer formed of a graphene layer, and a protective layer disposed on the active layer, on the base substrate obtained after the above steps, by a third patterning process; and forming a planarizing layer on the base substrate, obtained after the above steps, by a fourth patterning process, in which the planarizing layer is provided with a through hole through which the source or drain electrode is exposed.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: May 5, 2015
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Tuo Sun
  • Patent number: 9000541
    Abstract: A photoelectric conversion device includes circuit portions disposed on a substrate, a first electrode electrically connected to one of the circuit portions, an optically transparent second electrode opposing the first electrode, and a photoelectric conversion portion disposed between the first electrode and the second electrode. The photoelectric conversion portion has a multilayer structure including a light absorption layer made of a p-type compound semiconductor film having a chalcopyrite structure, an amorphous oxide semiconductor layer, and a window layer made of an n-type semiconductor film.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: April 7, 2015
    Assignee: Seiko Epson Corporation
    Inventors: Yasunori Hattori, Tomotaka Matsumoto, Tsukasa Eguchi
  • Patent number: 9000434
    Abstract: A semiconductor device including a semiconductor substrate having a surface including an active semiconductor device including one of a laser and a photodiode; and a visual indicator disposed on the semiconductor body and at least adjacent to a portion of said active semiconductor device, the indicator having a state that shows if damage to the active semiconductor device may have occurred.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: April 7, 2015
    Assignee: Emcore Corporation
    Inventors: Richard Carson, Elaine Taylor, Douglas Collins
  • Patent number: 8981439
    Abstract: A solid-state imaging device includes a photoelectric converting portion including a first semiconductor region capable of accumulating a signal charge, a second semiconductor region of the same conductivity type as the first semiconductor region, a gate electrode provided between the first and second semiconductor regions, and an insulating layer provided on the first semiconductor region, the second semiconductor region, and the gate electrode. The solid-state imaging device further includes a first light-shielding portion including a metal portion provided in an opening or a trench of the insulating layer between the first and second semiconductor regions, and a second light-shielding portion including a metal portion provided on the insulating layer on the second semiconductor region.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: March 17, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kouhei Hashimoto
  • Patent number: 8957357
    Abstract: A solid-state imaging device includes plural photodiodes which are formed in a photodiode area of a unit pixel with no element separating area interposed therebetween and in which impurity concentrations of pn junction areas are different from each other.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: February 17, 2015
    Assignee: Sony Corporation
    Inventor: Kazuichiro Itonaga
  • Patent number: 8952474
    Abstract: Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: February 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Chieh Huang, Dun-Nian Yaung, Chih-Jen Wu, Chen-Ming Huang
  • Patent number: 8952475
    Abstract: A pixel and pixel array for use in an image sensor are provided. The image sensor includes floating sensing nodes symmetrically arranged with respect to a photodiode in each pixel.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: February 10, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-seok Oh, Eun-sub Shim, Jung-chak Ahn, Moo-sup Lim, Sung-ho Choi
  • Patent number: 8946840
    Abstract: A solid state imaging device having a light sensing section that performs photoelectric conversion of incident light includes: an insulating layer formed on a light receiving surface of the light sensing section; a layer having negative electric charges formed on the insulating layer; and a hole accumulation layer formed on the light receiving surface of the light sensing section.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: February 3, 2015
    Assignee: Sony Corporation
    Inventors: Itaru Oshiyama, Takashi Ando, Susumu Hiyama, Tetsuji Yamaguchi, Yuko Ohgishi, Harumi Ikeda
  • Patent number: 8946797
    Abstract: There is provided a solid-state imaging device including a sensor substrate having a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion section is provided and a sensor-side wiring layer provided on an opposite surface side from a light receiving surface of the sensor-side semiconductor layer, a circuit substrate having a circuit-side semiconductor layer and a circuit-side wiring layer and provided on a side of the sensor-side wiring layer of the sensor substrate, a connection unit region in which a connection section is provided, the connection section having a first through electrode, a second through electrode, and a connection electrode connecting the first through electrode and the second through electrode, and an insulating layer having a step portion which has the connection electrode embedded therein and has a film thickness that gradually decreases from the connection unit region to the pixel region.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: February 3, 2015
    Assignee: Sony Corporation
    Inventors: Kyohei Mizuta, Osamu Oka, Kaoru Koike, Nobutoshi Fujii, Hideki Kobayashi, Hirotaka Yoshioka
  • Patent number: 8947566
    Abstract: The first face of the pad is situated between the front-side face of the second semiconductor substrate and a hypothetical plane including and being parallel to the front-side face, and a second face of the pad that is a face on the opposite side of the first face is situated between the first face and the front-side face of the second semiconductor substrate, and wherein the second face is connected to the wiring structure so that the pad is electrically connected to the circuit arranged in the front-side face of the second semiconductor substrate via the wiring structure.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: February 3, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masahiro Kobayashi, Mineo Shimotsusa
  • Patent number: 8941204
    Abstract: A method for reducing cross talk in image sensors comprises providing a backside illuminated image sensor wafer, forming an isolation region in the backside illuminated image sensor wafer, wherein the isolation region encloses a photo active region, forming an opening in the isolation region from a backside of the backside illuminated image sensor wafer and covering an upper terminal of the opening with a dielectric material to form an air gap embedded in the isolation region of the backside illuminated image sensor wafer.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: January 27, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Tzu-Hsuan Hsu, Shuang-Ji Tsai, Min-Feng Kao
  • Patent number: 8940574
    Abstract: A method includes forming a plurality of image sensors on a front side of a semiconductor substrate, and forming a dielectric layer on a backside of the semiconductor substrate. The dielectric layer is over the semiconductor substrate. The dielectric layer is patterned into a plurality of grid-filling regions, wherein each of the plurality of grid-filling regions overlaps one of the plurality of image sensors. A metal layer is formed on top surfaces and sidewalls of the plurality of grid-filling regions. The metal layer is etched to remove horizontal portions of the metal layer, wherein vertical portions of the metal layer remain after the step of etching to form a metal grid. A transparent material is filled into grid openings of the metal grid.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: January 27, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chien Wang, Chu-Wei Chang, Wang-Pen Mo, Hung-Chang Hsieh
  • Patent number: 8933530
    Abstract: An image sensor includes a substrate having a front side and a back side, an insulating structure containing circuits on the front side of the substrate, contact holes extending through the substrate to the circuits, respectively, and a plurality of pads disposed on the backside of the substrate, electrically connected to the circuits along conductive paths extending through the contact holes, and located directly over the circuits, respectively. The image sensor is fabricated by a process in which a conductive layer is formed on the back side of the substrate and patterned to form the pads directly over the circuits.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: January 13, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Ho Kim, Young-Hoon Park
  • Patent number: 8928041
    Abstract: A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: January 6, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mineo Shimotsusa, Fumihiro Inui
  • Patent number: 8921187
    Abstract: Embodiments of a process including depositing a sacrificial layer on the surface of a substrate over a photosensitive region, over the top surface of a transfer gate, and over at least the sidewall of the transfer gate closest to the photosensitive region, the sacrificial layer having a selected thickness. A layer of photoresist is deposited over the sacrificial layer, which is patterned and etched to expose the surface of the substrate over the photosensitive region and at least part of the transfer gate top surface, leaving a sacrificial spacer on the sidewall of the transfer gate closest to the photosensitive region. The substrate is plasma doped to form a pinning layer between the photosensitive region and the surface of the substrate. The spacing between the pinning layer and the sidewall of the transfer gate substantially corresponds to a thickness of the sacrificial spacer. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: December 30, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventors: Gang Chen, Duli Mao, Hsin-Chih Tai, Vincent Venezia, Yin Qian, Howard E. Rhodes
  • Patent number: 8907439
    Abstract: A modular, scalable focal plane array is provided as an array of integrated circuit dice, wherein each die includes a given amount of modular pixel array circuitry. The array of dice effectively multiplies the amount of modular pixel array circuitry to produce a larger pixel array without increasing die size. Desired pixel pitch across the enlarged pixel array is preserved by forming die stacks with each pixel array circuitry die stacked on a separate die that contains the corresponding signal processing circuitry. Techniques for die stack interconnections and die stack placement are implemented to ensure that the desired pixel pitch is preserved across the enlarged pixel array.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: December 9, 2014
    Assignee: Sandia Corporation
    Inventors: Randolph R. Kay, David V. Campbell, Subhash L. Shinde, Jeffrey L. Rienstra, Darwin K. Serkland, Michael L. Holmes, Seethambal S. Mani, Joy M. Barker, Dahwey Chu, Thomas Gurrieri
  • Patent number: 8906728
    Abstract: A photodetector with a bandwidth-tuned cell structure is provided. The photodetector is fabricated from a semiconductor substrate that is heavily doped with a first dopant. A plurality of adjoining cavities is formed in the semiconductor substrate having shared cell walls. A semiconductor well is formed in each cavity, moderately doped with a second dopant opposite in polarity to the first dopant. A layer of oxide is grown overlying the semiconductor wells and an annealing process is performed. Then, metal pillars are formed that extend into each semiconductor well having a central axis aligned with an optical path. A first electrode is connected to the metal pillar of each cell, and a second electrode connected to the semiconductor substrate. The capacitance between the first and second electrodes decreases in response to forming an increased number of semiconductor wells with a reduced diameter, and forming metal pillars with a reduced diameter.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: December 9, 2014
    Assignees: Applied Micro Circuits Corporation, Volex PLC
    Inventors: Subhash Roy, Igor Zhovnirovsky, Sergey Vinogradov
  • Patent number: 8907357
    Abstract: According to one embodiment, a light emitting module includes a mounting substrate, a plurality of light emitting chips, a transparent layer, and a phosphor layer. The transparent layer is provided between the plurality of light emitting chips on the mounting face and on the light emitting chip. The transparent layer has a first transparent body and a scattering agent dispersed at least in the first transparent body between the plurality of light emitting chips. The scattering agent has a different refraction index from a refraction index of the first transparent body. The phosphor layer is provided on the transparent layer. The light emitting chip includes a semiconductor layer, a p-side electrode, an n-side electrode, a p-side external terminal, and an n-side external terminal.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: December 9, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Kojima, Hideto Furuyama, Miyoko Shimada, Yosuke Akimoto, Hideyuki Tomizawa
  • Patent number: 8896036
    Abstract: A solid-state imaging device in which a pixel circuit formed on the first surface side of a semiconductor substrate is shared by a plurality of light reception regions and second surface side of the semiconductor substrate is the light incident side of the light reception regions. The second surface side regions of the light reception regions are arranged at approximately even intervals and the first surface side regions of the light reception regions e are arranged at uneven intervals. Respective second surface side regions and first surface side regions are joined in the semiconductor substrate so that the light reception regions extend from the second surface side to the first surface side of the semiconductor substrate.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: November 25, 2014
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8889461
    Abstract: A method includes performing a first epitaxy to grow a first epitaxy layer of a first conductivity type, and performing a second epitaxy to grow a second epitaxy layer of a second conductivity type opposite the first conductivity type over the first epitaxy layer. The first and the second epitaxy layers form a diode. The method further includes forming a gate dielectric over the first epitaxy layer, forming a gate electrode over the gate dielectric, and implanting a top portion of the first epitaxy layer and the second epitaxy layer to form a source/drain region adjacent to the gate dielectric.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: November 18, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shiu-Ko JangJian, Min Hao Hong, Kei-Wei Chen, Chih-Cherng Jeng
  • Patent number: 8890148
    Abstract: An organic light emitting display and a method of manufacturing the same are disclosed. In one embodiment, the display includes a gate electrode formed over a substrate and an active layer electrically insulated from the gate electrode, wherein the gate electrode is closer to the substrate than the active layer. The display further includes i) a first gate insulating layer and a second gate insulating layer formed between the gate electrode and active layer so as to electrically insulate the active layer from the gate electrode and ii) source and drain electrodes each contacting the active layer.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: November 18, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Min-Kyu Kim, Jae-Wook Kang
  • Patent number: 8884347
    Abstract: The present disclosure provides a method of manufacturing a photoelectric conversion device, including, a first step of forming a plurality of photoelectric conversion regions on a surface on one side of a semiconductor wafer, a second step of preparing a light-blocking wafer having insertion openings, a third step of bonding the one-side surface of the semiconductor wafer and a surface on the opposite side to a surface on the one side of the light-blocking wafer to each other to form a bonded wafer body, and a fourth step of dividing the bonded wafer body in peripheries of the photoelectric conversion regions, to obtain bonded-body chips each having the photoelectric conversion region.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: November 11, 2014
    Assignee: Sony Corporation
    Inventor: Yasuhide Nihei
  • Patent number: 8878242
    Abstract: A device includes a device isolation region formed into a semiconductor substrate, the device isolation region having gaps for photo-sensitive devices, a dummy gate structure formed over the substrate, the dummy gate structure comprising at least one structure that partially surrounds a doped pickup region formed into the device isolation region, and a via connected to the doped pickup region.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: November 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Tzu-Hsuan Hsu, Szu-Ying Chen, Wei-Cheng Hsu, Hsiao-Hui Tseng
  • Patent number: 8878267
    Abstract: A purpose of the present invention is to provide a preferable separation structure of wells when a photoelectric conversion unit and a part of a peripheral circuit unit or a pixel circuit are separately formed on separate substrates and electrically connected to each other. To this end, a solid-state imaging device includes a plurality of pixels including a photoelectric conversion unit and a amplification transistor configured to amplify a signal generated by the photoelectric conversion unit; a first substrate on which a plurality of the photoelectric conversion units are disposed; and a second substrate on which a plurality of the amplification transistors are disposed. A well of a first conductivity type provided with a source region and a drain region of the amplification transistor is separated from a well, which is disposed adjacent to the well in at least one direction, of the first conductivity type provided with the source region and the drain region of the amplification transistor.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: November 4, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Fumihiro Inui
  • Patent number: 8878264
    Abstract: A global shutter pixel cell includes a serially connected anti-blooming (AB) transistor, storage gate (SG) transistor and transfer (TX) transistor. The serially connected transistors are coupled between a voltage supply and a floating diffusion (FD) region. A terminal of a photodiode (PD) is connected between respective terminals of the AB and the SG transistors; and a terminal of a storage node (SN) diode is connected between respective terminals of the SG and the TX transistors. A portion of the PD region is extended under the SN region, so that the PD region shields the SN region from stray photons. Furthermore, a metallic layer, disposed above the SN region, is extended downwardly toward the SN region, so that the metallic layer shields the SN region from stray photons. Moreover, a top surface of the metallic layer is coated with an anti-reflective layer.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: November 4, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Sergey Velichko, Jingyi Bai
  • Patent number: 8866199
    Abstract: An object of the present invention is to provide a group III-V compound semiconductor photo detector comprising an absorption layer having a group III-V compound semiconductor layer containing Sb as a group V constituent element, and an n-type InP window layer, resulting in reduced dark current. The InP layer 23 grown on the absorption layer 23 contains antimony as impurity, due to the memory effect with antimony which is supplied during the growth of a GaAsSb layer of the absorption layer 21. In the group III-V compound semiconductor photo detector 11, the InP layer 23 contains antimony as impurity and is doped with silicon as n-type dopant. Although antimony impurities in the InP layer 23 generate holes, the silicon contained in the InP layer 23 compensates for the generated carriers. As a result, the second portion 23d of the InP layer 23 has sufficient n-type conductivity.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: October 21, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Takashi Ishizuka, Kei Fujii, Youichi Nagai
  • Patent number: 8860100
    Abstract: A solid-state imaging device includes: a first photodiode receiving light of a first color; a second photodiode that is arranged next to the first photodiode in a first direction and receives light of a second color; a third photodiode that is arranged next to the second photodiode in a second direction and receives light of the first color; a fourth photodiode that is arranged next to the third photodiode in the first direction and receives light of a third color; a first reset transistor for discharging a charge generated in the first photodiode and the second photodiode; and a second reset transistor for discharging a charge generated in the third photodiode and the fourth photodiode. The first photodiode and the third photodiode have a small difference in area.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: October 14, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Kazunobu Kuwazawa
  • Patent number: 8860121
    Abstract: A semiconductor memory device includes: a semiconductor substrate; a plurality of element isolation insulators disposed in parts of an upper layer portion of the semiconductor substrate and dividing the upper layer portion into a plurality of active areas extended in one direction; tunnel insulating films provided on the active areas: charge storage members provided on the tunnel insulating films; and control gate electrodes provided on the charge storage members. A width of a middle portion of one of the active areas in the up-to-down direction being smaller than a width of a portion of the active areas upper of the middle portion and a width of a portion of the active areas below the middle portion.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: October 14, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiko Kato, Mitsuhiro Noguchi, Hiroyuki Kutsukake
  • Patent number: 8835924
    Abstract: A photo-detecting device including a plurality of pixels, each including at least one alternate stack of photodiodes and electrically conducting electrodes. Each photodiode includes one intrinsic amorphous semiconductor layer in contact with one doped amorphous semiconductor layer distinct from the amorphous semiconductor layers in other photodiodes, and is arranged between two electrodes. Each pair of photodiodes includes one of the electrodes arranged between photodiodes. In each pixel: each electrode includes an electrically conducting portion not superposed on other electrodes of the pixel and electrically connected to one interconnection hole filled with an electrically conducting material; and portions of an electrically conducting material are superposed approximately on each of non-superposed portions of electrodes.
    Type: Grant
    Filed: July 5, 2010
    Date of Patent: September 16, 2014
    Assignee: Commissariat a l'energie atomique et aux energies Alternatives
    Inventors: Pierre Gidon, Benoit Giffard, Norbert Moussy
  • Patent number: 8829525
    Abstract: An organic light emitting display device includes: a first substrate; a plurality of organic light emitting diodes on the first substrate; a plurality of spacers spaced apart from each other on sides of light emitting regions corresponding to the plurality of organic light emitting diodes; and a second substrate facing the first substrate and spaced apart from the first substrate at an interval by the plurality of spacers.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: September 9, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Tae-Gon Kim
  • Patent number: 8823123
    Abstract: According to one embodiment, there is provided a solid-state image sensor including a photoelectric conversion layer, and a multilayer interference filter. The multilayer interference filter is arranged to conduct light of a particular color, of incident light, selectively to the photoelectric conversion layer. The multilayer interference filter has a laminate structure in which a first layer having a first refraction index and a second layer having a second refraction index are repeatedly laminated, and a third layer which is in contact with a lower surface of the laminate structure and has a third refraction index. A lowermost layer of the laminate structure is the second layer. The third refraction index is not equal to the first refraction index and is higher than the second refraction index.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: September 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Kokubun, Yusaku Konno
  • Patent number: 8816405
    Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: August 26, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Salman Akram
  • Patent number: RE45357
    Abstract: A CMOS imager which includes a substrate voltage pump to bias a doped area of a substrate to prevent leakage into the substrate from the transistors formed in the doped area. The invention also provides a CMOS imager where a photodetector sensor array is formed in a first p-well and readout logic is formed in a second p-well. The first p-well can be selectively doped to optimize cross-talk, collection efficiency and transistor leakage, thereby improving the quantum efficiency of the sensor array while the second p-well can be selectively doped and/or biased to improve the speed and drive of the readout circuitry.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: February 3, 2015
    Assignee: Round Rock Research, LLC
    Inventor: Howard E. Rhodes