Package and the Method for Making the Same, and a Stacked Package
The present invention relates to a package and the method for making the same, and a stacked package. The method for making the package includes the following steps: (a) providing a carrier having a plurality of platforms; (b) providing a plurality of dice, and disposing the dice on the platforms; (c) performing a reflow process so that the dice are self-aligned on the platforms; (d) forming a molding compound in the gaps between the dice, and (e) performing a cutting process so as to form a plurality of packages. Since the dice are self-aligned on the platforms during the reflow process, a die attach machine with low accuracy can achieve highly accurate placement.
This is a divisional of U.S. application Ser. No. 12/185,879, filed Aug. 5, 2008, and claims priority to Taiwanese Patent No. 096129098, filed Aug. 7, 2007, each of which is incorporated by reference herein.
BACKGROUND OF THE INVENTION1. Field of the Invention
The present invention relates to a package and the method for making the same, and more particularly to a package and the method for making the same, and a stacked package.
2. Description of the Related Art
In a conventional method for making a stacked package, a plurality of die elements are formed on a wafer first, then two or more than two wafers are stacked, and a cutting process is performed so as to form a plurality of stacked package. The conventional method has a disadvantage, which is that the die elements on the wafer are not tested. Therefore, the stacked packages formed as described above have the problem of high defective fraction. Especially, if more wafers are stacked, more defective fraction will occur.
In order to eliminate the above-mentioned disadvantage, another conventional method is provided. First, the die elements on the wafer are cut off, and then stacked after being tested. The method's disadvantage is that it is hard to align the die elements during the stacking process, which results in a shift between the corresponding upper and lower die elements.
Therefore, it is necessary to provide a package and the method for making the same, and a stacked package to solve the above problems.
SUMMARY OF THE INVENTIONThe present invention is directed to a method for making a package. The method comprises the following steps: (a) providing a carrier having a plurality of platforms; (b) providing a plurality of dice, and disposing the dice on the platforms; (c) performing a reflow process so that the dice are self-aligned on the platforms; (d) forming a molding compound in the gaps between the dice; and (e) performing a cutting process so as to form a plurality of packages. Since the dice are self-aligned during the reflow process, a die attach machine with high accuracy is unnecessary. That is, a die attach machine with low accuracy can achieve highly accurate placement, so the cost of the die attach machine is reduced.
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In the embodiment, the pads 12 are formed on the carrier 1 by a photo-lithography process, and the solder layer 11 is formed on the pads 12 by electroplating, so that highly accurate placement can be achieved. Moreover, the dice 4 can be self-aligned during the reflow process, so a die attach machine with high accuracy is unnecessary. That is, in the embodiment, a die attach machine with low accuracy can achieve highly accurate placement, so the cost of the die attach machine is reduced.
The molding compound 14 has a first surface 141, a second surface 142 and an accommodating groove 143. The accommodating groove 143 penetrates the molding compound 14. The platform 10 is disposed in the accommodating groove 143 and exposed to the second surface 142 of the molding compound 14. In the embodiment, the platform 10 comprises a solder layer 11 and a pad 12. The solder layer 11 is disposed between the pad 12 and the wettable layer 23. The material of the pad 12 is metal.
The die 2 is disposed in the accommodating groove 143, and has a first surface 21 and a second surface 22. The first surface 21 of the die 2 is exposed to the first surface 141 of the molding compound 14. Preferably, the first surface 21 of the die 2 further comprises a plurality of ball pads 24.
The wettable layer 23 is disposed on the second surface 22 of the die 2, and connects the solder layer 11 of the platform 10. The circuit layer 16 is disposed on the first surface 141 of the molding compound 14, and the circuit layer 16 electrically connects the first surface 21 of the die 2. In the embodiment, the circuit layer 16 comprises a redistribution layer 161, and the redistribution layer 161 connects the ball pads 24. Preferably, the circuit layer 16 further comprises a plurality of solder balls 17. The solder balls 17 connect the redistribution layer 161, and further electrically connect the ball pads 24. In another embodiment, the package 3 further comprises a carrier (not shown) disposed on the second surface 142 of the molding compound 14.
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The first package 9A comprises a first molding compound 44, a plurality of first dice 5, a first upper circuit layer 46 and a first lower circuit layer 47. The first molding compound 44 has a first surface 441, a second surface 442 and a plurality of first accommodating grooves 443. The first accommodating grooves 443 penetrate the first molding compound 44. The first dice 5 are disposed in the first accommodating grooves 443, and each of the first dice 5 has a first surface 51, a second surface 52 and at least one first via 55. The first surfaces 51 of the first dice 5 are exposed to the first surface 441 of the first molding compound 44, and the second surfaces 52 of the first dice 5 are exposed to the second surface 442 of the first molding compound 44.
The first upper circuit layer 46 is disposed on the second surface 442 of the first molding compound 44. The first lower circuit layer 47 is disposed on the first surface 441 of the first molding compound 44. The first upper circuit layer 46 is electrically connected to the first lower circuit layer 47 by the first via 55. Preferably, the first package 9A further comprises a plurality of first ball pads 54 disposed on the first surfaces 51 of the first dice 5. Preferably, a plurality of first solder balls 48 are further formed on the first lower circuit layer 47, and connect the first lower redistribution layer 471.
In other embodiment, if the first package 9A undergoes a cutting process, the first package elements 6A will become a singulated package, and comprises a first molding compound 44, a first die 5, a first upper circuit layer 46 and a first lower circuit layer 47. The first molding compound 44 has a first surface 441, a second surface 442 and a first accommodating groove 443. The first accommodating groove 443 penetrates the first molding compound 44. The first die 5 is disposed in the first accommodating groove 443, and has a first surface 51, a second surface 52 and at least one first via 55. The first surface 51 of the first die 5 is exposed to the first surface 441 of the first molding compound 44, and the second surface 52 of the first die 5 is exposed to the second surface 442 of the first molding compound 44.
The first upper circuit layer 46 is disposed on the second surface 442 of the first molding compound 44. The first lower circuit layer 47 is disposed on the first surface 441 of the first molding compound 44. The first upper circuit layer 46 is electrically connected to the first lower circuit layer 47 by the first via 55. Preferably, the package further comprises a plurality of first ball pads 54 disposed on the first surface 51 of the first die 5. Preferably, a plurality of first solder balls 48 are further formed on the first lower circuit layer 47, and connect the first lower redistribution layer 471.
Afterward, a second package element is provided. The second package element may be a package of any type. In the embodiment, the second package element is substantially the same as the first package element 6A, and the method for making the second package is described as below.
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Afterward, a second flux (not shown) is formed on the second platforms 70 and the second carrier 7.
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The second package 9B comprises a second molding compound 74, a plurality of second dice 8, a second upper circuit layer 76 and a second lower circuit layer 77. The second molding compound 74 has a first surface 741, a second surface 742 and a plurality of second accommodating grooves 743. The second accommodating grooves 743 penetrate the second molding compound 74. The second dice 8 are disposed in the second accommodating grooves 743, and each of the second dice 8 has a first surface 81, a second surface 82 and at least one second via 85. The first surfaces 81 of the second dice 8 are exposed to the first surface 741 of the second molding compound 74, and the second surfaces 82 of the second dice 8 are exposed to the second surface 742 of the second molding compound 74.
The second upper circuit layer 76 is disposed on the second surface 742 of the second molding compound 74. The second lower circuit layer 77 is disposed on the first surface 441 of the second molding compound 74. The second upper circuit layer 76 is electrically connected to the second lower circuit layer 77 by the second via 85. Preferably, the first package 9B further comprises a plurality of second ball pads 84 disposed on the first surfaces 81 of the second dice 8. Preferably, a plurality of second solder balls 78 are further formed on the second lower circuit layer 77, and connect the second lower redistribution 771.
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The first package element 6A comprises a first molding compound 44, a first die 5, a first upper circuit layer 46 and a first lower circuit layer 47.
The first molding compound 44 has a first surface 441, a second surface 442 and a first accommodating groove 443. The first accommodating groove 443 penetrates the first molding compound 44. The first die 5 is disposed in the first accommodating groove 443, and has a first surface 51, a second surface 52 and at least one first via 55. The first surface 51 of the first die 5 is exposed to the first surface 441 of the first molding compound 44, and the second surface 52 of the first die 5 is exposed to the second surface 442 of the first molding compound 44. Preferably, the first surface 51 of the first die 5 further comprises a plurality of first ball pads 54.
The first upper circuit layer 46 is disposed on the second surface 442 of the first molding compound 44. The first lower circuit layer 47 is disposed on the first surface 441 of the first molding compound 44. The first upper circuit layer 46 is electrically connected to the first lower circuit layer 47 by the first via 55. Preferably, the first lower circuit layer 47 further comprises a plurality of first solder balls 48.
The second package element 6B is stacked on the first package element 6A, and electrically connected to the first upper circuit layer 46.
The second package element 6B comprises a second molding compound 74, a second die 8, a second upper circuit layer 76 and a second lower circuit layer 77.
The second molding compound 74 has a first surface 741, a second surface 742 and a second accommodating groove 743. The second accommodating groove 743 penetrates the second molding compound 74. The function or size of the second die 8 may be the same as or different from that of the first die 5. The second die 8 is disposed in the second accommodating 743, and has a first surface 81, a second surface 82 and at least one second via 85. The first surface 81 of the second die 8 is exposed to the first surface 841 of the second molding compound 84, and the second surface 82 of the second die 8 is exposed to the second surface 842 of the second molding compound 84. Preferably, the first surface 81 of the second die 8 further comprises a plurality of second ball pads 84.
The first upper circuit layer 46 is disposed on the second surface 442 of the first molding compound 44. The first lower circuit layer 47 is disposed on the first surface 441 of the first molding compound 44. The first upper circuit layer 46 is electrically connected to the first lower circuit layer 47 by the first via 55. Preferably, the second lower circuit layer 77 further comprises a plurality of second solder balls 78. The second lower circuit layer 77 is electrically connected to the first upper circuit layer 46 by the second solder balls 78.
In the embodiment, the dice are tested and are known good dice, and stacked with highly accurate placement, so the yield rate is raised. Moreover, dice with different sizes can be stacked in the embodiment, so the flexibility of layout is increased.
While several embodiments of the present invention have been illustrated and described, various modifications and improvements can be made by those skilled in the art. The embodiments of the present invention are therefore described in an illustrative but not restrictive sense. It is intended that the present invention should not be limited to the particular forms as illustrated, and that all modifications which maintain the spirit and scope of the present invention are within the scope defined in the appended claims.
Claims
1. A stacked package, comprising:
- a first package element, comprising: a first molding compound, having a first surface, a second surface and a first accommodating groove, wherein the first accommodating groove penetrates the first molding compound; a first die, disposed in the first accommodating groove and having a first surface, a second surface and at least one first via, wherein the first surface of the first die is exposed to the first surface of the first molding compound, the second surface of the first die is exposed to the second surface of the first molding compound; a first upper circuit layer, disposed on the second surface of the first molding compound; and a first lower circuit layer, disposed on the first surface of the first molding compound, and the first upper circuit layer electrically connected to the first lower circuit layer by the first via; and
- a second package element, stacked on the first package element, and electrically connected to the first upper circuit layer.
2. The stacked package as claimed in claim 1, wherein the first die further comprises a plurality of first ball pads disposed on the first surface of the first die.
3. The stacked package as claimed in claim 1, further comprising a plurality of first solder balls disposed on the first lower circuit layer.
4. The stacked package as claimed in claim 1, wherein the second package element comprises:
- a second molding compound, having a first surface, a second surface and a second accommodating groove, wherein the second accommodating groove penetrates the second molding compound;
- a second die, disposed in the second accommodating groove and having a first surface, a second surface and at least one second via, wherein the first surface of the second die is exposed to the first surface of the second molding compound, and the second surface of the second die is exposed to the second surface of the second molding compound;
- a second upper circuit layer, disposed on the second surface of the second molding compound; and
- a second lower circuit layer, disposed on the first surface of the second molding compound, and the second upper circuit layer electrically connected to the second lower circuit layer by the second via, and the second lower circuit layer electrically connected to the first upper circuit layer.
5. The stacked package as claimed in claim 4, wherein the second die further comprises a plurality of second ball pads disposed on the first surface of the second die.
6. The stacked package as claimed in claim 4, further comprising a plurality of second solder balls disposed on the second lower circuit layer and connecting the first upper circuit layer.
7. The stacked package as claimed in claim 1, wherein the first upper circuit layer comprises a first upper redistribution layer and the first lower circuit layer comprises a first lower redistribution layer.
8. The stacked package as claimed in claim 4, wherein the second upper circuit layer comprises a second upper redistribution layer and the second lower circuit layer comprises a second lower redistribution layer.
9. A package, comprising:
- a first molding compound, having a first surface, a second surface and a plurality of first accommodating grooves, wherein the first accommodating grooves penetrate the first molding compound;
- a plurality of first dice, disposed in the first accommodating grooves, each of the first dice having a first surface, a second surface and at least one first via, wherein the first surfaces of the first dice are exposed to the first surface of the first molding compound, the second surfaces of the first dice are exposed to the second surface of the first molding compound;
- a first upper circuit layer, disposed on the second surface of the first molding compound; and
- a first lower circuit layer, disposed on the first surface of the first molding compound, and the first upper circuit layer electrically connected to the first lower circuit layer by the first via.
10. The package as claimed in claim 9, further comprising a plurality of first ball pads disposed on the first surfaces of the first dice.
11. The package as claimed in claim 9, further comprising a plurality of first solder balls disposed on the first lower circuit layer.
12. The stacked package as claimed in claim 9, wherein the first upper circuit layer comprises a first upper redistribution layer and the first lower circuit layer comprises a first lower redistribution layer.
13. A package, comprising:
- a molding compound, having a first surface, a second surface and a accommodating groove, wherein the accommodating groove penetrates the molding compound;
- a die, disposed in the accommodating groove, having a first surface, a second surface and at least one via, wherein the first surface of the die is exposed to the first surface of the molding compound, and the second surface of the die is exposed to the second surface of the molding compound;
- an upper circuit layer, disposed on the second surface of the molding compound; and
- a lower circuit layer, disposed on the first surface of the molding compound, and the upper circuit layer electrically connected to the lower circuit layer by the via.
14. The package as claimed in claim 13, further comprising a plurality of ball pads disposed on the first surface of the die.
15. The package as claimed in claim 13, further comprising a plurality of solder balls disposed on the lower circuit layer.
16. The package as claimed in claim 13, wherein the upper circuit layer comprises an upper redistribution layer and the lower circuit layer comprises a lower redistribution layer.
Type: Application
Filed: Sep 7, 2010
Publication Date: Dec 30, 2010
Inventors: Meng-Jen Wang (Kaohsiung), Wei-Chung Wang (Kaohsiung)
Application Number: 12/876,907
International Classification: H01L 23/498 (20060101);