WAFER CONTAINER WITH STAGGERED WALL STRUCTURE
A wafer container comprising a base and a cover that nest together. The base includes a staggered wall structure composed of inner and outer walls. The staggered wall structure is arranged so that forces from side impacts are absorbed principally by outer wall segments. A rib on the cover restrains the outer wall segments from flexing beyond the inner wall diameter. Reference tabs on the base facilitate alignment of the base to the cover.
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Semiconductor wafers are fragile substrates that can easily become scratched or damaged if not properly protected during transport. Each semiconductor wafer is patterned with numerous integrated circuits on a silicon substrate. Numerous containers have been developed to protect semiconductor wafers from damage during shipping and handling.
Frequently, the top and bottom half of wafer containers are improperly combined by an operator or become misaligned by forces that impact the containers during shipping. Such misalignment may contaminate, crack, or otherwise damage the valuable wafers stored within the containers.
Among the variety of horizontal wafer containers for semiconductor wafers, are containers having a dual wall structure. U.S. Pat. No. 6,193,068 (Lewis) is one example. The double walls in Lewis were designed to protect wafers from forces that may contact the outer wall of the base. However, in Lewis the outer wall is directly behind the inner wall and is aligned in a similar angular sector. Inner walls in such wafer containers are generally rigid and inadequately shock absorbent. An external force may be substantial enough to flex the outer wall into the inner wall, which in turn would damage the wafers stored within the wafer container.
There remains a need for a wafer container that is less prone to becoming separated and that is sufficiently robust to protect semiconductor wafers from forces transmitted during shipping and handling.
SUMMARY OF THE INVENTIONThe present invention concerns a wafer container having a dual wall structure on the base. The wall structure comprises multiple outer walls and multiple inner walls. Each inner wall shares a minimal percentage of a common angular sector with each adjacent outer wall.
The present invention also concerns an alignment system for facilitating the proper alignment of a cover with a base. The alignment system includes reference tabs that are received by the cover and a visual identifier for guiding an operator in the proper alignment of the two halves of the container.
Another embodiment of the invention concerns a locking mechanism for securing two halves of a wafer container together. The bottom half comprises a wall structure perpendicular to the base. The wall structure comprises segmented inner and outer walls, each portion of the wall structure has a distinctive arc length. The arc length of each inner wall does not completely overlap with the arc length of any outer wall.
Yet another embodiment of the invention concerns a cover for a wafer container that engages to a base. The cover includes one or more notches, each having a ramp that easily receive latches from the base.
The container of the present invention stores semiconductor wafers, or semiconductor film frames.
Upon impact, outer wall segments 90A, 90B, 92A, and 92B will flex to the inner diameter 12 of inner wall segments 80. Outer wall segments 90A, 90B, 92A, and 92B absorb the bulk of energy from side impact, thereby transferring a reduced amount of energy to the inner wall segments 80. Consequently, wafers 30 and 32 are sheltered from the brunt of forceful impact by the staggered wall structure of the invention.
In
The height dimension H1 of the latch hook is shown in
To illustrate how the segmented wall structure of base 100 mates with its cover 200, a side view of container 250 is shown in
The various wall segments on base 100 occupy specific areas within a circumference on base 100. These areas are referred to herein as angular sectors.
Since inner wall segments alternate with outer wall segments, the arc of an inner wall may encroach into an adjoining angular sector. In a preferred embodiment of the invention, the arc length of each inner wall segment encroaches approximately 0 to 50% of the arc length of an adjoining angular sector of an outer wall. In a more preferred embodiment of the invention, inner wall 82 occupies angular sector R3 and shares between 0.1% to 25% of angular sector R4 with outer wall 92A; inner wall 82 also shares between 0.1% to 25% of angular sector R2 with outer wall 90A. Most preferably, inner wall 82 shares between 0.1% to 10% of angular sector R4 with outer wall 92A and between 0.1% to 10% of angular sector R2 with outer wall 90A. Similarly, inner wall 80, which principally occupies angular sector R1, preferably shares between 0 to 50% of angular sector R2 with outer wall 90A and between 0-50% of angular sector R8 with outer wall 92B. More preferably, inner wall 80 shares between 0.1% to 25% of angular sector R2 with outer wall 90A; inner wall 80 also shares between 0.1% to 25% of angular sector R8 with outer wall 92B. Most preferably, inner wall 80 shares between 0.1% to 10% of angular sector R2 with outer wall 90A and between 0.1% to 10% of angular sector R8 with outer wall 92B.
The invention is not limited to a container that has only the eight angular sectors R1-R8 shown in
Outer walls 90A, 90B, 92A and 92B are staggered relative to inner walls 80, 82, 84 and 86 as shown in
The deck 60 of
A detailed view of the cover 200 is shown in
In addition to ribs, cover 200 contains a sidewall 75 that extends perpendicularly from surface 44. In a preferred embodiment, two slots 35 are present in sidewall 75. Slots 35 are each surrounded by support bracket 71 or 73. Support brackets 70A and 70B are also attached to sidewall 75 on cover 200. Support brackets 70, 71 and 73 serve to orient cover 200 into a proper position on base 100. Bracket 73 has two fins 77A and 77B connected together by a narrow tie 74 so as to form recesses 72A and 72B. In addition, located within support bracket 71 are recesses 74A and 74B. The four corner regions 60 of cover 200 each have a notch 43 for receiving a respective latch 25. To enhance the security of cover 200 from becoming disengaged from base 100, notch 43 is provided with a ramp 85.
The examples described herein of the various segmented walls are solely representative of the present invention. It is understood that various modifications and substitutions may be made to the foregoing examples and methods of operation of the wafer container without departing from either the spirit or scope of the invention. In some instances certain features of the invention will be employed without other features depending on the particular situation encountered by the ordinary person skilled in the art. It is therefore the intent that the scope of the invention is to be defined by the appended claims.
Claims
1-22. (canceled)
23. A wafer container for storing a plurality of semiconductor wafers, the wafer container comprising:
- a cover;
- a base comprising an upper surface and further comprising a latch on at least two corners of the base;
- a notch on the cover comprising a first edge and a second edge, wherein the second edge is longer than the first edge, and wherein the second edge comprises a ramp for receiving the latch;
- a wall structure extending from the base, wherein the wall structure comprises inner wall segments that alternate with outer wall segments;
- a pair of reference tabs located on each side of the upper surface of the base; and
- a plurality of brackets on the cover, wherein each bracket comprises a pair of recesses that slip over a respective pair of the reference tabs to form a closed wafer container.
24. The wafer container of claim 23, further comprising a plurality of semiconductor wafers stored therein.
25. A wafer container comprising:
- a base comprising a plurality of inner walls having a first arc and a plurality of outer walls having a second arc, wherein the outer walls occupy a different radial axis than the inner walls;
- a plurality of angular sectors, each angular sector having a boundary defined by either the first or the second arc;
- the walls formed of individual wall segments such that each inner wall segment is unconnected to the outer wall segments, each inner wall segment alternating with an outer wall segment, and sharing between 0.1 to 25% of a common angular sector with an outer wall segment, wherein the inner wall segments are capable of moving independently from the outer wall segments when the wafer container receives an external impact; and
- a cover comprising a plurality of brackets that include a pair of recesses, wherein the recesses of each bracket slip over a respective pair of reference tabs to form a closed wafer container.
26. The wafer container of claim 25, further comprising a plurality of semiconductor wafers stored therein.
27. The wafer container of claim 25, further comprising:
- a pair of reference tabs on opposite sides of an upper surface of the base.
28. A wafer container comprising:
- a base comprising a major surface that includes a plurality of angular sectors;
- segmented inner walls formed of individual wall segments located on a respective first arc on the base and separated from an adjacent wall by a space in a radial direction along the major surface;
- segmented outer walls formed of individual wall segments located on a respective second arc on the base and separated from an adjacent wall by a space in a radial direction along the major surface, each of the outer walls being unconnected to the inner walls along the entire length of the inner walls, wherein between 0.1 and 25% of the arc length of the first arc is located in the same angular sectors as the arc length of the second arc; and
- a slot in at least one of the outer walls that extends at least substantially along the entire height of the outer walls, and has a width dimension that is greater than the distance between an inner wall and an outer wall.
29. The wafer container of claim 28, further comprising a plurality of semiconductor wafers stored therein.
30. The wafer container of claim 28, wherein the segmented inner walls alternate with the segmented outer walls.
31. The wafer container of claim 28, further comprising:
- a cover that engages to the base to form a closed container;
- a plurality of brackets on the cover, wherein each bracket includes a pair of recesses; and
- a pair of reference tabs on opposite sides of an upper surface of the base;
- wherein the recesses of each bracket slip over a respective pair of reference tabs to form a closed wafer container.
32. The wafer container of claim 28, further comprising:
- a cover that engages to the base to form a closed container.
33. The wafer container of claim 32, wherein the cover comprises a notch comprising a ramp, wherein the ramp comprises a positive slope relative to a top surface of the cover for receiving the base.
34. The container of claim 32, further comprising:
- a pair of latches connected to the base, wherein the latches secure the base to the cover when each latch locks onto a respective ramp on the cover.
35. A wafer container for storing a plurality of semiconductor wafers, the wafer container comprising:
- a cover;
- a base having a circumference that includes a plurality of angular sectors;
- segmented inner walls formed of individual wall segments located on a respective first arc on the base and separated from an adjacent wall by a space in a radial direction along the circumference; and
- segmented outer walls formed of individual wall segments located on a respective second arc on the base and separated from an adjacent wall by a space in a radial direction along the circumference, each of the walls being unconnected to the other walls, wherein between 0.1 and 50% of the arc length of the first arc is located in the same angular sectors as the arc length of the second arc, and wherein the segmented inner walls alternate with the segmented outer walls.
36. The wafer container of claim 35, further comprising a plurality of semiconductor wafers stored therein.
37. The wafer container of claim 35, wherein between 0.1 to 25% of the arc length of the first arc is located in the same angular sector as the arc length of the second arc.
38. The wafer container of claim 35, wherein a slot is provided in at least one of the outer walls, the slot defined by a lower portion that extends near the level of the base, and by a lateral portion that extends to the upper surface of the outer wall.
39. The wafer container of claim 35, further comprising:
- a plurality of brackets on the cover, wherein each bracket includes a pair of recesses; and
- a pair of reference tabs on opposite sides of an upper surface of the base.
40. The wafer container of claim 35, further comprising:
- a plurality of brackets on the cover, wherein each bracket includes a pair of recesses; and
- a pair of reference tabs on opposite sides of an upper surface of the base;
- wherein the recesses of each bracket slip over a respective pair of reference tabs to form a closed wafer container.
41. The wafer container of claim 35, wherein the a notch is located on a top surface of the cover, and wherein the notch includes a ramp that has a positive slope relative to the top surface of the cover.
42. The container of claim 35, wherein the a notch is located on a top surface of the cover, and wherein the notch includes a ramp that has a positive slope relative to the top surface of the cover, and further comprising a pair of latches connected to the base, wherein the latches secure the base to the cover when each latch locks onto a respective ramp on the cover.
Type: Application
Filed: Dec 23, 2011
Publication Date: Jul 5, 2012
Applicant: Daewon Semiconductor Packaging Industrial Co. Ltd. (Hanam-Si)
Inventors: James D. Pylant (Temecula, CA), Galen J. Hoffman (Corona, CA), Alan Waber (Wildomar, CA), Amos E. Avery (Rochester, CA)
Application Number: 13/336,582
International Classification: B65D 85/00 (20060101);