ULTRA HIGH SPEED SIGNAL TRANSMISSION/RECEPTION
An interconnect for transmitting an electric signal between electronic devices includes a first coupling element electromagnetically coupled to, and immediately juxtaposed to, a second coupling element. The first coupling element is mounted on and is electrically connected to a first electronic device having a first integrated circuit. The second coupling element may be mounted on and electrically connected to the first electronic device, and electrically connected to an interconnect on a second electronic device, or the second coupling element may be mounted on and electrically connected to the second electronic device.
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The present patent document relates to a communication link for transmitting an electric signal between electronic devices
BACKGROUNDCommunication within or between integrated circuits is a fundamental attribute of electronic devices. Such communication can involve communication between similar or different chips on a laminate printed circuit board or similar substrate material or within the chip itself. The chips themselves may be manufactured using similar or different technologies. Recent trends show demand for high-speed communication technology is increasing and is critical to address the demand of higher bandwidth and to accommodate testing of high-speed devices at the device and circuit levels. In addition to this, as devices are increasing in complexity there is increasing need to lower the power consumption, decrease the size and reduce the overall system cost. This has created a significant momentum in the area for high-speed interfacing and interconnect.
In recent years interconnect technology has evolved from parallel digital to serial based communication to enable transfer of data in the gigabit range using direct wiring or external transform coupling. Conventional serial I/O cells require ESD (Electro Static Discharge) protection circuits resulting in less power-efficiency, speed limitations, and larger pad size. Furthermore, within a modest power budget, signals can only be consistently and reliably transmitted over a short data path, making them prone to interference and of limited operating range for high-speed/frequency. It is possible to overcome the signal limits but at the expense of increased power. For example it is possible to go 10 Gbits/second using the 10G Ethernet serial wired link. However, such transceivers require up to 15 Watts of power which is not a practical communications method except for point to point communication for a small number of channels. Power consumption is a major limiting factor where multiple channels of I/O are required thus each individual I/O channel must meet a prescribed power budget many times lower than that of the proposed 10G standard. Large amounts of power are required as a consequence of techniques used to address signal degradation which increases with the length of the data path. Data path length and its impact on signal integrity is often a major concern with prior art solutions. Examples of high-speed signal communication include transfer and/or sharing of data at chip-to-chip, chip-to-substrate, and board-to-board or backplane level and their converse.
The most commonly used methods of signal communication between electronic devices include making physical, electrical contact between two nodes. Electrical signals may comprise DC or AC signals or both. Alternative methods to interconnect nodes include methods of AC coupling including capacitive and inductive techniques where the DC component is not available or where the DC component would add noise or have some other unwanted effect. Further, signals may be coupled using optical methods, magnetic methods, or radio frequency transmission/reception. While digital communications between integrated circuits are of primary interest, communication involving both digital and analog signals is also needed.
Referring to
Such apparatus 10 has limitations. Compensation is required when buffers 18 and pad 112 have different characteristics. Electrostatic discharge diodes 20 and associated protective circuits exhibit a large amount of parasitic capacitance and thus apparatus 10 introduces a large amount of capacitance into the signal path. The signal energy is absorbed by the parasitic capacitance and dissipated as heat as signal 14 is propagated toward pad 112. Generally, the amount of signal loss increases with frequency. Further, signal 14 is delayed in time as it is propagated by the chain of buffers 18. The compensation and protection thus provided lowers the energy of wanted signals 14 coming from or going between the internal circuits and the external pad and, by extension, lowers available signal levels at a far transmitter or receiver.
Prior art I/O cells involve use of protective diodes and passive and active elements to absorb and attenuate destructive voltages and currents. These typically involve active structures, which load the I/O cell. For example, it is known that a typical protection diode structure has an equivalent capacitance of approximately 1 pF. The effect of a 1 pF capacitance in the signal path of a 2 GHz signal would be an effective load of 88 ohms per wire In a differential signalling schema this would present an equivalent load of 44 ohm compared to a typical transmission impedance of 50 ohms. In other words there is more energy used (in this case) overcoming the load of the protection system than is used to send the active signals, and so the signal path requires additional amplification to compensate for the signal loss. Consequently, in our example, the system requires twice the area and consumes twice the power. While this case is a simplification, it is illustrative of the problems that the current practices involve. In fact, if an I/O system is to achieve higher data rates the problem is even worse: at twice the frequency approximately 80% of the driver's energy is consumed to overcome the load of the protection circuitry.
Referring to
FIG. 16a of United States Publication No. 2005/0271147 (Dupuis) entitled “Transformer isolation for digital power supply” teaches a transformer apparatus to provide isolation between two integrated circuits located in close proximity within a single component package (Dupuis
Similarly, Lane et al. in U.S. Pat. No. 7,064,442 teaches an apparatus to provide isolation between two integrated circuits located in close proximity within a single component package using a transformer, the transformer being located on a separate circuit within the same package. In this case, the external I/O signals interface directly with active electronic elements. Only for internal signals, after active electronics processing, within the package is the transformer/dielectric isolation formed and utilized.
In a similar manner as Lane et al, U.S. Pat. No. 5,952,849 (Haigh) entitled “Logic isolator with high transient immunity”, discloses an apparatus to provide isolation between two circuits using a transformer, where the transformer 38 is formed by windings 36 and 42 on separate and discrete ferrite cores coupled by winding 42.
In a similar manner as Dupuis, U.S. Pat. No. 7,075,329 (Chen et al.) entitled “Signal isolators using micro-transformers” discloses an apparatus that provides isolation between two circuits using a transformer, where the transformer is a separate and discrete component. In Chen the external I/O pads or signals labelled ‘input’ and ‘output’ are interfaced with active electronics before and after the transformer isolation occurs and thus share the disadvantages of the Dupuis, Lane, Haigh and others.
The article H. Ishikuro, N. Miura, and T. Kuroda, “Wideband Inductive-coupling Interface for High-performance Portable System”, IEEE 2007 Custom Integrated Circuits Conference (CICC) shows an inductive coupling system in which chips are designed with inductive elements which enable direct face to face chip to chip communications. In this case the inductor on chip is an individual element and not combined with an integrated second inductive element on the same IC. This reference also shows separate coils for applications outside a package. In this case, the coils are fabricated separately and interfaced conductively with drive electronics.
U.S. Pat. No. 5,361,277 (Grover) entitled “Method and apparatus for clock distribution and for distributed clock synchronization” describes a system in which the timing is coordinated such that transmitters and receivers are coordinated so that even with distant systems a common time and clocking reference is obtained. In a similar manner, U.S. Pat. No. 5,243,703 (Farmwald et al.) entitled “Apparatus for synchronously generating clock signals in a data processing system” and U.S. Pat. No. 5,954,804 (Farmwald et al.) entitled “Synchronous memory device having an internal register” describe a system in which timing is coordinated through the knowledge of clock edges following different paths. It should also be noted that the Grover and Farmwald patents describe wired systems such as direct wired memory or logic systems which further limit their systems. Wired systems as shown in the prior art are encumbered by the need for ESD structures which limit speed and increase power consumption.
U.S. Pat. No. 6,882,239 (Miller et al.) entitled “Electromagnetically coupled interconnect system” describes electromagnetic coupling between components in a test system in which the IC is contained in a package with a separate electromagnetic (EM) coupler. In general, this patent provides loosely coupled signals in which there is at least 10 dB of attenuation and further loss because of extra shielding. The goal of Miller et al. is to receive loosely coupled signals and is restricted for the case of testing and measuring other signals without major interference to those other signals which are required to be not perturbed.
U.S. Pat. No. 7,200,830 (Drost et al.) entitled “Enhanced electrically-aligned proximity communication and United States publication no. 20060224796 (Vigouroux et al.) entitled “Network chip design for grid communication” describe systems for self described ‘proximity’ communications which are close field capacitive coupling to enable the communications path. These are targeted at coupling chips capacitively to enable high speed communications, and require nearly intimate coupling contact to enable sufficient capacitive field interaction for communications.
Another form of near field interconnect package is shown in United States publication no. 20060022336 (Franzon et al.) entitled “Microelectronic packages including solder bumps and AC-coupled interconnect elements” and 20030100200 (Franzon, et al.) entitled “Buried solder bumps for AC-coupled microelectronic interconnects”. These include solder bumps and AC-coupled interconnect elements. In the same vein is U.S. Pat. Nos. 6,885,090 (Franzon et al.) entitled “Inductively coupled electrical connectors” and 6,927,490 (Franzon et al.) entitled “Buried solder bumps for AC-coupled microelectronic interconnects”. The Franzon packages are dependent on separately constructed and maintained structures. In U.S. Pat. No. 6,885,090, an essential element is to keep the structures separate because they will conduct if touching. The Franzon applications discuss a specific package technique and interconnect topology solder posts.
SUMMARYThe interconnect described below uses a miniature integrated monolithic interface element, hereinafter referred to as “MIMICE,” comprising one or more elements that are conductive, insulating, inductive, and capacitive providing high speed I/O capability to integrated circuits. The MIMICE is a primary component of the interconnect, and may be formed on a single chip, or partially formed on two physically distinct chips. The MIMICE structure, shown for simplicity as coupled inductors, is two half-cell elements containing, for example, inductive+capacitive+conductive elements monolithically built into the IC or package or communications substrate. The term MIMICE is used for convenience in the description herein. However, as will be apparent, it may or may not be formed monolithically.
In one embodiment, both half cells are constructed in one monolithic IC with one half-cell connected to the internal chip circuitry and the other half-cell connected to pads of the IC, which are then connected to external elements. In other embodiments, the second half-cell may be connected to intermediate conductors including MIMICE devices themselves. In other embodiments, the second half cell may be configured into a substrate device or a second IC.
MIMICE, in contrast to current methods, involves using coupling inside the chip in such a way as to reduce or eliminate the need for an Electro-Static-Discharge (ESD) circuits structure (prior art
Electrical isolation between input and output inside the MIMICE I/O cell framework of the cell provides inherent discharge voltage protection. Since there is no direct electrical connection between the input and the output half cells (or components), the isolation gap between the primary (Tx) and the secondary (Rx) components of MIMICE is sufficient for transient voltage and differential voltage protection. Additional isolation between input and output connections can be achieved by increasing the separation distance between the primary (Tx) and secondary (Rx) by moving them further apart, for example by increasing the number and/or thickness of layers of a chip separating Tx and Rx, thus increasing the isolation barrier. The isolation layer can comprise silicon dioxide, which is a common component of semiconductor device manufacturing processes. It is possible to increase the isolation barrier by utilizing a material other than silicon dioxide in the gap region.
In current devices ESD circuit structures typically introduce signal delay; increases the required I/O cell size; and at the same time causes the I/O cell to use considerable power especially at high frequencies or high data rates. In fact current I/O cell speed capability in standard low power integrated circuits is limited to approximately 500 MHz. Replacing Tx and Rx capability having protective ESD structure with MIMICE provides advantage of smaller size, less power consumption and significantly higher operating speed. Optionally, a very small ESD protection circuit structure at the secondary of the transformer (Rx) can be used to improve discharge voltage protection. For example an ESD structure of 1/10 the size of normal may be included in combination with MIMICE to exceptional protection levels over that of existing solutions.
The MIMICE scheme for communication also makes it possible to send more than one signal over the same pad concurrently at different frequencies. MIMICE makes this possible because of the reduced signal attenuation achieved by having removed the ESD loads. To achieve this, a conditioning mechanism is used at the receiving side of the MIMICE to extract the signals.
The circuit performance can be improved by using pre-emphasis techniques to shape the transmitted waveform to compensate for signal distortion and “smearing” due to interconnect parasitic elements and better match the transmission characteristics of the intervening communications medium.
According to one embodiment, there is provided an interconnect for transmitting an electric signal between electronic devices, comprising a first coupling element electromagnetically coupled to, and immediately juxtaposed to, a second coupling element. The first coupling element is mounted on and electrically connected to a first electronic device having a first integrated circuit. The second coupling element is mounted on and electrically connected to a second electronic device having a second integrated circuit. Each of the first electronic device and the second electronic device has a first face and a second face, the first face of the first electronic device being immediately adjacent to the first face of the second electronic device. The first coupling element is recessed from the first face of the first electronic device, such that the first coupling element and the second coupling element are separated by a dielectric barrier.
According to another aspect, there is provided a method of transmitting an electric signal between a first electronic device and a second electronic device, comprising the steps of: providing a first coupling element electrically connected to the first electronic device; providing a second coupling element electrically connected to the second electronic device, the second coupling element being immediately juxtaposed to the first coupling element, the first coupling element and the second coupling element being separated by a dielectric barrier; providing the first electronic device with a coupling device electrically connected to the first coupling element; and operating the coupling device to drive the first coupling element with one of a modulated continuous wave and an ultra-wideband pulse to electromagnetically couple the first coupling element and the second coupling element.
According to another embodiment, there is provided an interconnect for transmitting an electric signal between electronic devices comprising a first coupling element electromagnetically coupled to, and immediately juxtaposed to, a second coupling element. The first coupling element is mounted on and electrically connected to a first electronic device having a first integrated circuit. The second coupling element is mounted on and electrically connected to a second electronic device having a second integrated circuit. A coupling device is electrically connected to the first coupling element. The coupling device comprises one of a digital to ultra-wideband pulse converter and a RF modulator, such that in operation, the coupling device drives the first coupling element with one of an ultra-wideband pulse and a modulated RF signal to electromagnetically couple the first coupling element and the second coupling element.
According to another aspect, there is provided a method of transmitting an electrical signal between a first electronic device and a second electronic device, each electronic device having an integrated circuit. The method comprises the steps of: providing a first coupling element and a second coupling element on the first electronic device, the first coupling element being electrically connected to the integrated circuit of the first electronic device, the first coupling element being immediately juxtaposed to the second coupling element, the first coupling element and the second coupling element being separated by a dielectric barrier; providing a third coupling element and a fourth coupling element on the second electronic device, the fourth coupling element being electrically connected to the integrated circuit of the second electronic device, the third coupling element being immediately juxtaposed to the second coupling element, the third coupling element and the fourth coupling element being separated by a dielectric barrier, the third coupling element being electrically connected to the second coupling element; providing the integrated circuit of the first electronic device with a coupling device electrically connected to the first coupling; and driving the first coupling element with the coupling device such that an ultra-wideband pulse is coupled from the first coupling element to the second coupling element, electrically transmitted from the second coupling element to the third coupling element, and coupled from the third coupling element to the fourth coupling element.
According to another embodiment, there is provided an interconnect for transmitting an electrical signal between a first electronic device and a second electronic device, each electronic device having an integrated circuit. The interconnect comprises a first coupling element and a second coupling element on the first electronic device. The first coupling element is electrically connected to the integrated circuit of the first electronic device. The first coupling element is immediately juxtaposed to the second coupling element. The first coupling element and the second coupling element are separated by a dielectric barrier. The interconnect further comprises a third coupling element and a fourth coupling element on the second electronic device. The fourth coupling element is electrically connected to the integrated circuit of the second electronic device. The third coupling element is immediately juxtaposed to the second coupling element. The third coupling element and the fourth coupling element are separated by a dielectric barrier. The third coupling element is electrically connected to the second coupling element. There is a coupling device comprising a digital to ultra-wideband pulse signal converter. The coupling device is electrically connected to the first coupling element, such that in operation, the coupling device drives the first coupling element with an ultra-wideband pulse to electromagnetically couple the first coupling element and the second coupling element.
Other embodiments and features will be apparent from the description and the claims.
These and other features will become more apparent from the following description in which reference is made to the appended drawings, the drawings are for the purpose of illustration only and are not intended to be in any way limiting, wherein:
There exists a body of prior art concerning the use of inductive or capacitive coupling techniques within and exterior to a chip or device for communication of signals either between multiple devices or across multiple technology domains. However, none of these possesses all the properties and capabilities of the device described herein. Typical prior art methods or apparatus involve disparate elements which in combination provide isolation or communication. A typical alternative would have perhaps four discrete elements, such as transformers or capacitors, and wired connections to an external transformer or capacitor and the reverse, another external element and finally and interface to a second IC. These techniques are not integratable into one element, and must be distributed between two ICs or two systems and typically require separate packaging or processing. The teachings herein can utilize one process to construct the MIMICE and the transmitting and receiving elements at the same time.
The present device is a high-speed input and/or output device comprising a miniature integrated monolithic interface element, hereinafter termed MIMICE and referenced in diagrams using reference numeral 32. It will be understood that the device can either be created monolithically or created separately and combined monolithically. The device generally has a lower capacitance, uses less power, and can transmit at a higher rate than devices in the prior art.
One way in which capacitance can be reduced is by omission of electrostatic discharge diodes 20 as shown in
Because of the presence of ESD devices and associated parasitic in modern ICs, the prior art devices discussed above have limitations. The device described herein substantially reduces the parasitics and thus can operate at higher speeds and consume less power. For example, a 90 nm process IC may transmit signals chip to chip using 3.3 volt signalling The rule of thumb is that the speed of such signalling is limited to approximately 200 MHz and consumes large amounts of power. When many I/O are used, the power consumed by the I/O cells can contribute 50% or more of the total power consumption of an integrated circuit. With the current technique, the coupling field is based on both the voltage and the current used. In other words, the present device can increase the current (electron flow) and resultant level of the transmit signal in a manner to compensate for the lower supply voltage. The device may also utilize the fact that the turn's ratio and coupling of its constituent conductors can be set such that the 1 volt supply is effectively scaled upward or downward on the output lines. Thus, the device is different from and superior to that of prior art capacitive ‘proximity’ communications.
With reference to
To exemplify the use of MIMICE 32 we will describe: use in an apparatus 30 for high speed signal output (
Architectures for communications between a plurality of devices using MIMICE 32 are illustrated in
Examples of the layered structure of devices having MIMICE 32 are illustrated in
Presently the following will describe how devices including MIMICE 32 are in communication with other devices on the same substrate with reference to
Use of an interstitial set of half cells (MIMICE 32) for enhanced isolation, separation and protection of electrical elements is illustrated in
High speed signal output cell apparatus 30 illustrated in
It will be noted that air or other dielectric materials can be used as a dielectric medium as well in place of silicon dioxide described earlier, especially if one of the well known micro-fabrication techniques is used to provide precision placement between the half cells. Micro-fabrication techniques such as anodic bonding can make atomic level bonding between the two half cells allowing MIMICE 32 half cells to be fabricated separately and later combined into one monolithic element with the advantages of dielectric isolation and high coupling coefficient for signal transfer. Alternatively, covalent chemical bonding can be used to bond materials at the molecular level and may be used in a similar manner.
In high-speed output apparatus 30 illustrated in each of
Referring to
Shown with MIMICE 32 are connections to grounds shown as two different symbols. With a MIMICE 32 structure having dielectric isolation, it is possible for the elements to be connected to different grounds and operate at different potentials. This enables both signalling level differences and enhanced signal return paths. With some embodiments the grounds are shared, in others they are separated, in yet others they are tied with impedances to reduce deleterious effects of ground currents. The MIMICE 32 structure gives an additional design freedom dimension not available for strictly wired or strictly dielectric isolated methods.
Referring to
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The structures and methods described herein are preferably used with a continuous carrier wave, or with ultra-wideband (UWB) pulses. The term UWB is generally used to describe a radio technology that can be used at very low energy levels for short-range high-bandwidth communications by using a large portion of the radio spectrum, and is defined by the FCC as a pulse with a bandwidth that exceeds the lesser of 500 MHz or 20% of the center frequency. UWB pulses are generally used in applications that target sensor data collection, precision locating and tracking applications. In the devices described herein, UWB pulses are used for ultra short range communications. In other words, the UWB pulses are used to transmit data locally, i.e., much less than the wavelength of the principal pulses for the coupled connection.
The continuous carrier wave is an RF signal. Preferably, a higher frequency is used to allow for a higher data rate as well as a more efficient coupling, such as a frequency of 500 MHz or greater, or more preferably, a frequency of 1 GHz or greater. The continuous carrier wave may be modulated using any of the known modulation techniques which are practical to implement in a chip as described herein, as will be recognized by those skilled in the art.
The RF signal or the UWB pulses are produced by a coupling device that generates a signal in the transmitting half-cell in a MIMICE 32 to cause the two half-cells to become electromagnetically coupled and therefore transmit information across the dielectric barrier separating them. The coupling device may be a signal converter, such as a digital to UWB pulse converter, a modulator, or other device that performs similar functions, depending on the type of signal transmitted or modulation technique used. The receiving half-cell where the signal is received will also have a demodulator, or a signal converter to reconstruct the signal. Preferably, the half-cells will have a coupling coefficient of about 0.1 or greater, or more preferably, about 0.3 or greater. If, however, the coupling coefficient is lower, for example around 0.01, techniques may be used in the art to increase the signal strength, such as by using a low noise amplifier.
Referring to
The MIMICE 32 structure and method provides a mechanism to which additional shielding and protection beneficially may be added without compromising the benefits of the fundamental concept and MIMICE 32 architecture. The following examples illustrate options for adding a shield component to the MIMICE 32 system. In
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One should note the preferred embodiment of MIMICE 32 has planar, quasi two dimensional structures which are compatible with IC fabrication and not separate and disparate component construction of coils, capacitors, windings, cores, interconnects of prior art communications interconnection techniques.
Illustrations of the layered architecture on chip 12 having one or more of I/O apparatus 30, 130, 230 are shown in
As first half-cell 76 and second half-cell 78a are parallel to and closely adjacent or juxtaposed to each other, there are strong communications between them. When electrical components are in stacked layers 74 of chip 12, the demand for surface area is reduced to devices where all components are in one or more layers. Among the other components is a conductive pad 112, usually metal. In the present application, metal pad 112 and first half-cell 76 are in electrical communication when they both are components of an input apparatus, output apparatus, or input/output apparatus, as illustrated in
Referring to
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Similar or different embodiments of apparatus 30, 130 or 230 may be mounted on separate chips 12 that are in communication. For example, a first chip 56 and a second chip 58 can be mounted on the same substrate as illustrated in
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The advantage of this architecture is that it provides enhanced protection by 100% over that of a single element (comprising two half cells 32a 32b) by using two dielectric interfaces 32z instead of only one illustrated in
The interstitial cell also allows for further impedance matching to optimally match internal signals to external signals. For example if an output buffer has a 5-ohm impedance and the external link requires 100 ohms for perfect impedance matching, a 5:100 or 1:20 transformation is needed. It is advantageous to use this form of MIMICE 32 to allow two impedance transformations, one between half cells 32a and 320a and a second between half cells 320b and 32b. An example would be 1:4 and 1:5 coupling ratios giving a total impedance transformation of 1:(4×5) or 1:20, providing ideal impedance matching. Optionally the center couple half cells 320a and 320b can be connected to ground or other protection surge protection circuit to provide additional protection of IC internal circuitry.
For example, in
Because of the enhanced communication possible with a MIMICE 32 device it is possible to envision applications in several areas. One example it to use a MIMICE 32 interface for the production and testing of ICs where the MIMICE 32 devices are used further after testing for interconnect of high speed signals. In this way the MIMICE 32 devices can be used for intentional access and later communications without the need for separate communications channels. This is illustrated in
In this illustration each IC 501 can communicate with each other IC via a direct MIMICE 32 enabled communications path. The benefits of low power and high speed manifest themselves in multiple ways for multichip systems, not the least of which is power requirements which would otherwise limit multiple chip designs. The power savings described earlier by not having to support ESD structures etc. allow a system like that illustrated to grow beyond the previous limits. With these teachings, one skilled in the art will envision other applications including multiple systems designs with high speed microprocessors memory etc. combined into one system.
Several advantages accrue from each embodiment of the MIMICE 32 apparatus as shown in the above by way of example apparatus 30, apparatus 130, and apparatus 230 when compared with the standard approaches exemplified by apparatus 10.
Prior art and standard practice apparatus 10:
-
- has a high capacitance,
- requires high power to amplify and transmit signal 14,
- has low speed of transmission of signal 14,
- causes delay in transmission of signal 14, and
- the sum of the components of apparatus 10 requires a large area.
In contrast, because each embodiment of apparatus 30, apparatus 130 and apparatus 230 has no electrostatic discharge diodes, and because signal converter 50 has low capacitance, each of apparatus 30, apparatus 130 and apparatus 230:
-
- has a much lower overall capacitance than that of prior art apparatus 10,
- has much higher speed than prior art apparatus 10,
- allows very high rates of data transfer to/from pad 112,
- has a higher coupling coefficient,
- requires far less power to transmit signal 14 to/from pad 112, and so
- produces far less heat than prior art apparatus 10,
- has a low requirement for area,
- enables transmission/reception of signals having a wide range of frequencies, and in particular has better capability to transmit/receive high frequency signals when compared to prior art apparatus 10,
- galvanic isolation between circuits
- ability to power chips with different power supplies or different voltages or different ground potentials or a combination of these; and
- improved signal integrity.
Another advantage is that, in contrast to some prior art which requires particular data transmission techniques, the devices described above can be used with well known standard methods such as clock and data encoding, phase locked loops or even simple received data thresholding to achieve very high data rates and speeds.
The signal coupling in the embodiments described above is shown to be enhanced qualitatively and quantitatively beyond the loose electromagnetic coupling described in the prior art to the point of enabling sufficient signals for robust data transfer. Furthermore, coupling is achieved by close proximity and in fact, is monolithic in one illustrated embodiment or near monolithic construction in another embodiment rather than depending on several disparate components and structures to achieve loose, or weak, electromagnetic coupling.
In one embodiment, the teachings purposely couple and create strong signals and strong coupling to enhance signalling capability and provide high speed preferenced communications for signal transfer, data transfer and any number of other specific applications.
Thus the above teachings can be used advantageously for more rapid communications between integrated circuits and related circuits than can be attained using prior art systems. Applications include communications for serial and parallel needs and standards such as Ethernet controllers and microprocessors, and between any of combinations of field programmable gate arrays (FPGA), microprocessors, memory devices, digital signal processors, DRAM, etc.
The device described above is not limited in its various applications to the details of construction and the arrangement of components set forth in the previous and following description or as illustrated in the drawings. It is capable of other embodiments and of being practiced or of being carried out in various ways. Also, the language and terminology used here is for the purpose of description and should not be regarded as limiting. The use of “including,” “comprising,” or “having,” “containing”, “involving”, and variations thereof herein, is meant to encompass the items listed before and after and equivalents thereof as well as additional items. A reference to an element by the indefinite article “a” does not exclude the possibility that more than one of the element is present, unless the context clearly requires that there be one and only one of the elements.
The following claims are understood to include what is specifically illustrated and described above, what is conceptually equivalent, and what can be obviously substituted. Those skilled in the art will appreciate that various adaptations and modifications of the described embodiments can be configured without departing from the scope of the claims. The illustrated embodiments have been set forth only as examples and should not be taken as limiting the invention. It is to be understood that, within the scope of the following claims, the invention may be practiced other than as specifically illustrated and described.
Claims
1-64. (canceled)
65. A method of transmitting an electric signal between a first electronic device and a second electronic device, comprising the steps of:
- providing a first coupling element electrically connected to and embedded within the first electronic device;
- providing a second coupling element electrically connected to and embedded within the second electronic device, the second coupling element being immediately juxtaposed to the first coupling element, the first coupling element and the second coupling element being separated by a dielectric barrier;
- providing the first electronic device with a coupling device electrically connected to the first coupling element; and
- operating the coupling device to drive the first coupling element with one of a modulated RF carrier wave and an ultra-wideband pulse to electromagnetically couple the first coupling element and the second coupling element.
66. The method of claim 65, wherein the modulated RF carrier wave is a modulated continuous wave.
67. The method of claim 66, wherein the modulated RF carrier wave has a frequency, or the ultra-wideband pulse has a frequency content, sufficient to electromagnetically couple the first coupling element and the second coupling element with a coupling coefficient of at least 0.01.
68. The method of claim 66, wherein the modulated RF carrier wave has a frequency, or the ultra-wideband pulse has a frequency content, sufficient to electromagnetically couple the first coupling element and the second coupling element with a coupling coefficient of at least 0.1.
69. The method of claim 66, wherein the modulated RF carrier wave has a frequency, or the ultra-wideband pulse has a frequency content, sufficient to electromagnetically couple the first coupling element and the second coupling element with a coupling coefficient of at least 0.3.
70. The method of claim 66, wherein the coupling device is a signal converter.
71. The method of claim 66, wherein the coupling device is a modulator.
72. The method of claim 66, wherein the second electronic device comprises a coupling device electrically connected to the second coupling element, and the first coupling element and the second coupling elements are connected to components in the corresponding integrated circuit that permit bi-directional communication.
73. The method of claim 66, wherein at least one of the first coupling element and the second coupling element is monolithically formed on the corresponding electronic device.
74. The method of claim 66, wherein the dielectric barrier comprises at least one of a solid dielectric material or air.
75. The method of claim 66, wherein the dielectric barrier comprises a shield component for shielding against external signals.
76. The method of claim 66, wherein at least one of the first coupling element and the second coupling element is embedded in the corresponding electronic device.
77. The method of claim 66, wherein at least one of the first coupling element and the second coupling element are connected to a differential input or a differential output in the corresponding integrated circuit.
78. The method of claim 66, further comprising a third coupling element electromagnetically coupled to, and immediately juxtaposed to, a fourth coupling element, the third coupling element being electrically connected to the second coupling element, such that the second and the third coupling elements are interstitial elements.
79. The method of claim 66, wherein the first coupling element and the second coupling element are connected by a resistance of more than 100,000 ohms to provide DC restoration.
80. The method of claim 66, wherein the first electronic device and the second electronic device are mounted on a common substrate.
81. The method of claim 66, wherein at least one of the first electronic device and the second electronic device are mounted to a movable substrate.
82. The method of claim 81, further comprising the steps of:
- moving the movable substrate such that at least one of the first coupling element and the second coupling element is immediately juxtaposed to an additional coupling element of an additional electronic device; and
- electromagnetically coupling the at least one of the first coupling element and the second coupling element to the additional coupling element.
83. An interconnect for transmitting an electric signal between electronic devices, comprising:
- a first coupling element electromagnetically coupled to, and immediately juxtaposed to, a second coupling element;
- the first coupling element being embedded within and electrically connected to a first electronic device having a first integrated circuit, and the second coupling element being embedded within and electrically connected to a second electronic device having a second integrated circuit; and
- a coupling device electrically connected to the first coupling element, the coupling device comprising one of a digital to ultra-wideband pulse converter and a RF modulator, such that in operation, the coupling device drives the first coupling element with one of an ultra-wideband pulse and a modulated RF signal to electromagnetically couple the first coupling element and the second coupling element.
84. The interconnect of claim 83, wherein the second electronic device comprises a coupling device electrically connected to the second coupling element, the coupling device comprising one of an ultra-wideband pulse to digital converter and a RF demodulator.
85. The interconnect of claim 84, wherein the coupling device of the first electronic device comprises a RF modulator and a RF demodulator, and the coupling device of the second electronic device comprises a RF modulator and a RF demodulator, such that the first coupling element and the second coupling elements permit bi-directional communication.
86. The interconnect of claim 84, wherein the coupling device of the first electronic device comprises a digital to ultra-wideband pulse converter and an ultra-wideband pulse to digital converter, and the coupling device of the second electronic device comprises a digital to ultra-wideband pulse converter and an ultra-wideband pulse to digital converter, such that the first coupling element and the second coupling elements permit bi-directional communication.
87. The interconnect of claim 83, wherein at least one of the first coupling element and the second coupling element is monolithically formed on the corresponding electronic device.
88. The interconnect of claim 83, wherein the dielectric barrier comprises at least one of a solid dielectric material or air.
89. The interconnect of claim 83, wherein the dielectric barrier comprises a shield component for shielding against external signals.
90. The interconnect of claim 83, wherein at least one of the first coupling element and the second coupling element is embedded in the corresponding electronic device.
91. The interconnect of claim 83, wherein at least one of the first coupling element and the second coupling element are connected to a differential input or a differential output in the corresponding integrated circuit.
92. The interconnect of claim 83, further comprising a third coupling element electromagnetically coupled to, and immediately juxtaposed to, a fourth coupling element, the third coupling element being electrically connected to the second coupling element, such that the second and the third coupling elements are interstitial elements.
93. The interconnect of claim 83, wherein the first coupling element and the second coupling element are connected by a resistance of more than 100,000 ohms to provide DC restoration.
94. The interconnect of claim 83, wherein the integrated circuit of at least one of the electronic devices is positioned at least partially between the second face and the corresponding coupling element.
95. The interconnect of claim 83, further comprising more than one additional electronic devices, each additional electronic device comprising a third coupling element and a fourth coupling element, the fourth coupling element being electrically connected to an integrated circuit of the second electronic device, the third coupling element being immediately juxtaposed to the fourth coupling element, the third coupling element and the fourth coupling element being separated by a dielectric barrier, the second coupling element of the first electronic device being electrically connected to more than one third coupling element.
96. A method of transmitting an electrical signal between a first electronic device and a second electronic device, each electronic device having an integrated circuit, the method comprising the steps of:
- providing a first coupling element and a second coupling element on the first electronic device, the first coupling element being electrically connected to the integrated circuit of the first electronic device, the first coupling element being immediately juxtaposed to the second coupling element, the first coupling element and the second coupling element being separated by a dielectric barrier;
- providing a third coupling element and a fourth coupling element on the second electronic device, the fourth coupling element being electrically connected to the integrated circuit of the second electronic device, the third coupling element being immediately juxtaposed to the fourth coupling element, the third coupling element and the fourth coupling element being separated by a dielectric barrier, the third coupling element being electrically connected to the second coupling element;
- providing the integrated circuit of the first electronic device with a coupling device electrically connected to the first coupling element; and
- driving the first coupling element with the coupling device such that an ultra-wideband pulse is electromagnetically coupled from the first coupling element to the second coupling element, electrically coupled from the second coupling element to the third coupling element, and electromagnetically coupled from the third coupling element to the fourth coupling element.
97. The method of claim 96, wherein the coupling device of the first electronic device comprises a digital to ultra-wideband pulse signal converter or an RF carrier wave modulator.
98. The method of claim 97, wherein the second electronic device comprises a coupling device comprising an ultra-wideband pulse signal to digital converter or an RF carrier wave demodulator.
99. The method of claim 98, wherein the coupling device of the first electronic device comprises a digital to ultra-wideband pulse converter and an ultra-wideband pulse to digital converter or a RF carrier wave modulator and a RF carrier wave demodulator, and the coupling element of the second electronic device comprises a digital to ultra-wideband pulse converter and an ultra-wideband pulse to digital converter ora RF carrier wave modulator and a RF carrier wave demodulator, such that the first coupling element and the second coupling elements permit bi-directional communication.
100. The method of claim 96, wherein the second electronic device comprises a coupling device electrically connected to the fourth coupling element, and each of the first coupling element and the fourth coupling element are connected to components in the corresponding integrated circuits that permit bi-directional communication.
101. The method of claim 96, wherein at least one of the coupling elements is monolithically formed on the corresponding electronic device.
102. The method of claim 96, wherein the dielectric barrier comprises a solid dielectric material or air.
103. The method of claim 96, wherein the dielectric barrier comprises a shield component for shielding against external signals.
104. The method of claim 96, wherein at least one of the first coupling element and the fourth coupling element are connected to a differential input or a differential output in the corresponding integrated circuit.
105. The method of claim 96, further comprising more than one second electronic device, the second coupling element of the first electronic device being electrically connected to more than one third coupling element.
106. An interconnect for transmitting an electrical signal between a first electronic device and a second electronic device, each electronic device having an integrated circuit, the interconnect comprising:
- a first coupling element and a second coupling element on the first electronic device, the first coupling element being electrically connected to the integrated circuit of the first electronic device, the first coupling element being immediately juxtaposed to the second coupling element, the first coupling element and the second coupling element being separated by a dielectric barrier;
- a third coupling element and a fourth coupling element on the second electronic device, the fourth coupling element being electrically connected to the integrated circuit of the second electronic device, the third coupling element being immediately juxtaposed to the fourth coupling element, the third coupling element and the fourth coupling element being separated by a dielectric barrier, the third coupling element being electrically connected to the second coupling element; and
- a coupling device comprising a digital to ultra-wideband pulse signal converter, the coupling device being electrically connected to the first coupling element, such that in operation, the coupling device drives the first coupling element with an ultra-wideband pulse or a modulated RF carrier wave to electromagnetically couple the first coupling element and the second coupling element.
107. The interconnect of claim 106, wherein the second electronic device comprises a coupling device, the coupling device comprising a digital to ultra-wideband pulse signal converter or a RF carrier wave modulator electrically connected to the fourth coupling element, and each of the first coupling element and the fourth coupling element are connected to components in the corresponding integrated circuits that permit bi-directional communication.
108. The interconnect of claim 106, wherein the second electronic device comprises a coupling device electrically connected to the fourth coupling element, the coupling device comprising an ultra-wideband pulse to digital converter or a RF carrier wave demodulator.
109. The interconnect of claim 108, wherein the coupling device of the first electronic device comprises a digital to ultra-wideband pulse converter and an ultra-wideband pulse to digital converter or a RF carrier wave modulator and a RF carrier wave demodulator, and the coupling device of the second electronic device comprises a digital to ultra-wideband pulse converter and an ultra-wideband pulse to digital converter ora RF carrier wave modulator and a RF carrier wave demodulator, such that the first coupling element and the second coupling elements permit bi-directional communication.
110. The interconnect of claim 106, wherein at least one of the coupling elements is monolithically formed on the corresponding electronic device.
111. The interconnect of claim 106, wherein the dielectric barrier comprises a solid dielectric material or air.
112. The interconnect of claim 106, wherein the dielectric barrier comprises a shield component for shielding against external signals.
113. The interconnect of claim 106, wherein at least one of the first coupling element and the fourth coupling element are connected to a differential input or a differential output in the corresponding integrated circuit.
114. The interconnect of claim 106, further comprising more than one second electronic device, the second coupling element of the first electronic device being electrically connected to more than one third coupling element.
Type: Application
Filed: Jan 28, 2013
Publication Date: May 30, 2013
Patent Grant number: 8669656
Applicant: SCANIMETRICS INC. (Edmonton, AB)
Inventor: Scanimetrics Inc. (Edmonton)
Application Number: 13/751,597
International Classification: H01L 23/58 (20060101);