ANTENNA IN PACKAGE WITH REDUCED ELECTROMAGNETIC INTERACTION WITH ON CHIP ELEMENTS
A IC package for a wireless device includes an antenna that is attached to the chip. The electrically conductive elements of the antenna are spaced away from the antenna and particularly the endpoint of the antenna to prevent interference with the antenna. An element on the IC package may he shielded antenna. The antenna may have the shape of a space-filling curve, including a Hilbert, box-counting or grid dimension curve.
Latest FRACTUS, S.A. Patents:
- Multiple-body-configuration multimedia and smartphone multifunction wireless devices
- Multiple-body-configuration multimedia and smartphone multifunction wireless devices
- Antenna structure for a wireless device
- Multiple-body-configuration multimedia and smartphone multifunction wireless devices
- Couple multiband antennas
The technology described in this document relates generally to novel integrated circuit packages. More particularly, this document describes a novel integrated circuit package that include a new family of miniature antennas.
BACKGROUNDThere is a trend in the semiconductor industry towards the so-called System on Chip (SoC) and System on Package (SoP) concepts. The full integration of systems or subsystems into a single integrated circuit package, such as Full Wire System in Package (FWSIP), provides many advantages in terms of cost, size, weight, consumption, performance, modularity, and product design complexity. Many electronic devices for consumer applications, such as handsets, wireless devices, (e.g., headsets, dongles, computer interfaces, mouses, keyboards, and remote controls), personal digital assistants (PDAs), or personal computers (PCs) are increasingly including SoP or SoC components. The introduction of wireless capabilities in many other devices such as digital cameras, MP3 players, portable DVD or CD players, smoke detectors, switches, sensors (such as motion, pressure, and temperature sensors), alarms, and medical sensors and meters will benefit from compact, integrated SoP or SoC devices.
In many cases, the ultimate component for achieving the true integration of a FWSiP/FWSoP component is the antenna. The concept of integrating a miniature antenna into a package or module is especially attractive due to the tremendous growth and success of cellular and wireless systems. In particular, there is a new generation of short/medium range wireless connectivity applications such as Bluetooth™, Hyperlan, IEEE802.11 (WiFi), ultra wide band (UWB), Wimax, and Zig Bee systems where the progressive system integration into a single, compact product is becoming a key factor for success.
This concept of integrating a miniature antenna into a package or module is especially attractive in several communication standards and services such as GSM, UMTS, PCS1900, KPCS, CDMA, WCDMA, DAB, and GPS.
Present chip and package designs are typically not designed to incorporate an antenna. Thus, the incorporation of an antenna into a typical integrated rcuit package (IC package) design would result in electromagnetic interaction and coupling between the antenna and different parts of the chip, die, module, or package. This would lead to a reduced performance of the antenna in efficiency and bandwidth, among other things, and could also lead to a detuning of the antenna and possible malfunction of the chip. Some typical elements of an IC package which may interfere with the antenna are pads, pins, tracks and ground planes. The present application contains a series of related IC package and printed circuit board (PCB) arrangements that prevent the loss of performance of the antenna in a chip.
IC package dimensions are continuously decreasing and therefore the use of miniature antennas is advantageous. Antennas that include a portion shaped as a space-filling, grid-dimension, or box-counting curve provide very good performance while allowing a high degree of miniaturization. These types of antennas are preferably incorporated in the IC packages.
It should be understood that the antenna 12 may be included on the same layer or different layers of the IC package as the pads, pins or other components.
In another example, some signal pads could be present in the antenna projection, preferably close to the feeding point 13.
The antenna feed point 13 could be accessible through at least a pad or pin of the IC package 11, and may also be present in the antenna projection without a significant loss in the antenna 12 performance.
Fixation pads could be present in the example IC package 11 in order to attach the IC package 11 to the PCB. When the only function accomplished by these pads is mechanical and no signal or power supply is transmitted by them and no ground is connected to the pins or pads, their effect on the antenna performance is negligible and therefore they may be present in the antenna projection. This arrangement is advantageous in some cases due to the overall reduction on the package or chip size.
One example of an advantageous arrangement of an antenna 22 with respect to the pads 14 on a IC package 11 is shown in
As in the previous example, fixation pads 14 could be present in the projection of the antenna. If it is necessary to include electrically conducting pads or other conducting components in the antenna projection, then these should be located as close to the antenna feedpoint 13 as possible. This will minimize the interference with the antenna.
The functionality or I/O assignment of the pads or pins 14 might be of importance when considering the interaction of the pads or pins 14 with either of the antennas discussed above 12, 22. Among the different pad or pin functionalities are powering and grounding, radio frequency functionalities, analog signals, digital buses, and other digital signals, such as signals used for the configuration of the IC. As mentioned above, in the case of pins or pads 14 located in the antenna projection, the influence of the pins or pads is smaller when close to the antenna feedpoint 13. The pins or pads 14 should thus be located as far away as possible from the end of the antennas 12, 22, because the antennas 12, 22 are most sensitive at the end.
If it is necessary to have ground pins in the projection of either of the antennas 12, 22, it is advantageous to have the ground pins or pads at a distance from the feeding point 13 that is not larger than one-fifth of the side of the IC package or one-sixtieth of the wavelength in the free space at the operating frequency of the antennas 12, 22. Similarly, should it be necessary to have the digital data pins in the projection of the antennas 12, 22, it is advantageous to have them at a distance from the feeding point 13 that is not greater than half of the side of the IC package 11 for a package having a side that is one-twelfth of the free-space wavelength of the antenna operating frequency. This would allow the detuning of the antennas 12, 22 to be kept within a ten percent range.
In other examples the ground pins or pads are located at a distance from the feeding point 13 that is not larger than one-half of the side of the IC package or one-twenty-fourth of the wavelength in the free space at the operating frequency of the antennas.
Signal pads and tracks have a loading effect on the antennas 12, 22 which leads to a change in the antenna input impedance and resonance frequency. This effect is more severe when pads and tracks are close to the end of the antennas 12, 22.
The placement of the tracks 14 and the routing of the signals may also affect antenna 12 performance. Digital lines filtering could be effective to minimize radio frequency noise. In some examples, this filtering is implemented by any conventional means, for example radio frequency chokes. Another option to prevent coupling is to include digital tracks that are mismatched at RF frequencies. Because tracks cannot propagate the radio frequency signals, less power is coupled (hence more isolation is obtained) and less power is delivered to the output ports on the board.
In general, the use of differential lines is very effective in suppressing noise and interference when the signal is carried by two lines that have the same potential but that have opposite polarity or phase, and the lines are not referred to a common ground from which interfering signals may be coupled.
In other examples, ground planes may be included inside the IC package 11. As a general rule, the greater the distance between the antenna 12 and ground plane, the smaller the interaction (in particular the reduction of the antenna input impedance referred to 50 ohms), and therefore the better the antenna performance.
In
In other examples the ground plane is spaced away from the antenna by at least the greater of one-quarter of a side length of the integrated circuit package and one-fiftieth of a free-space operating wavelength of the antenna.
Depending on the shape of the antenna 22, an example arrangement as shown in
In some examples, several different ground planes 51, 81 of different types are present on the IC package. These several ground planes 51, 81 are typically chosen from the following group: radio frequency, analog, or digital. Different ground planes are included for the purpose of reducing noise.
In the example of
To avoid having different potential references, the ground planes 51, 81 may be connected by means of an inductor to filter high frequency currents and balance potentials by means of DC currents. This arrangement may be used to connect planes which are outside the IC package 11 with planes that are inside the IC package 11.
In other examples, different types of ground planes may be included that are arranged at different levels.
In other examples, exterior ground planes may be present. For example, the IC package 11 may be mounted on a PCB, particularly a multilayer PCB. One of the layers of a multilevel PCB is normally a ground plane. If this ground plane is within the projection of the antenna its performance could be decreased. One possible solution is to use a PCB where a considerable part of the PCB does not include a ground plane. Hereinafter this part of the PCB that does not include a ground plane is also referred to as ‘clearance’.
Another possibility for preventing decreased performance of the antenna 22 is to use a shielding to isolate a certain part or subsystem of the IC package from the antenna 22. This isolated part of the IC package 11 could be, for example, a pad, track, a ground plane, a circuit, or a silicon part which could be a die.
Any of the conductive surfaces mentioned above could be replaced by a grid where the distance between the stripes which form the grid is not more than one-tenth of the free space operating wavelength of the antenna. These wires could define a shielding arrangement cage such as that shown in
In other examples, any of the shieldings mentioned above would cover only partially the part or subsystem 182 of the IC package to be isolated.
In another example, a space-filling curve may have one or more non-straight segments smaller than a fraction of the operating free-space wave length of the antenna, where the segments are arranged so that none of the adjacent and connected segments form another longer segment and none of the segments intersect with each other.
A grid dimension curve is a curve having a grid dimension greater than one according to the below equation.
An examination of
For a more accurate calculation of the grid dimension, the number of square cells may be increased up to a maximum amount. The maximum number of cells in a grid is dependant upon the resolution of the curve. As the number of cells approaches the maximum, the grid dimension calculation becomes more accurate. If a grid having more than the maximum number of cells is selected, however, then the accuracy of the grid dimension calculation begins to decrease. Typically, the maximum number of cells in a grid is one-thousand.
For example,
A similar concept to that of the grid dimension is the box counting dimension concept. A box counting antenna has a conducting pattern, at least a portion of which includes a curve, and the curve comprises at least five segments. Each of the at least five segments forms an angle with each adjacent segment in the curve, and at least three of the segments are shorter than one-tenth of the longest free-space operating wavelength of the antenna. Each angle between adjacent segments is less than 180°, at least two of the angles between adjacent sections are less than 115°, and at least two of the angles are not equal. The curve fits inside a rectangular area, the longest side of the rectangular area being shorter than one-fifth of the longest free-space operating wavelength of the antenna.
For a given geometry lying on a surface, the box-counting dimension is computed in the following way. First, a grid with cells of size L1 is placed over the geometry, so that the grid completely covers the geometry, and the number of boxes N1 that include at least a point of the geometry are counted. Second, a grid with boxes of size L2 (where L2 is smaller than L1) is also placed over the geometry, so that the grid completely covers the geometry, and the number of boxes N2 that include at least a point of the geometry are counted again. The box-counting dimension D is then computed as:
The box-counting dimension is computed by placing the first and second grids inside the minimum rectangular area enclosing the curve of the antenna and applying the above algorithm.
The first grid should be chosen such that the rectangular area is meshed in an array of at least five-by-five boxes or cells, and the second grid where L2=1/2 L1 is chosen so that the second grid includes at least ten-by-ten boxes. An example of this is shown in
In general, for a given resonant frequency of the antenna, the larger the box-counting dimension, the higher the degree of miniaturization that will be achieved by the antenna. One way of enhancing the miniaturization capabilities of the antenna is to arrange the several segments of the curve of the antenna pattern in such a way that the curve intersects at least one point of at least fourteen boxes of the first grid with five-by-five boxes or cells enclosing the curve. Also, in other embodiments where a high degree of miniaturization is required, the curve crosses at least one of the boxes twice within the five-by-five grid, that is, the curve includes two non-adjacent portions inside at least one of the cells or boxes of the grid.
An example of how the box-counting dimension is computed is shown in
In the example package of
Yet another example package is presented in
The example IC packages disclosed herein are advantageously used in wireless devices. The antenna arrangement and shielding allows the IC package with antenna to be very small, and particularly useful in mobile wireless devices, for example, laptops, PDA's, cellular phones, and other devices.
Claims
1. An integrated circuit package for an electronic device comprising:
- a substrate having a mounting area for an integrated circuit die;
- a set of electrical conductors provided on the substrate for connection between the die and external package connectors;
- a set of electrically inert fixation pads to provide mechanical connections between the package and a printed circuit board on which the package is mounted;
- an antenna comprising a feeding point, a proximal end, and a distal end, wherein the proximal end is closer than the distal end to the feeding point;
- wherein the electrical conductors are provided on the substrate outside a projection area of the antenna;
- a ground plane that is spaced away from the antenna so that no part of the ground plane falls in the projection of the antenna;
- wherein the antenna is arranged on the substrate so that the distal end is farther than the proximal end to an edge of the ground plane; and
- wherein at least one or more fixation pads are positioned in the projection area of the antenna.
2. The integrated circuit package of claim 1, further comprising:
- a second set of electrical conductors provided on the substrate, coupled to a ground potential;
- wherein at least some elements of the second set of electrical conductors are positioned on the substrate in the projection area of the antenna but only within a distance from a feedpoint of the antenna that is less than: 1) one-fifth of a side length of the integrated circuit package and 2) one-sixtieth of a free-space operating wavelength of the antenna.
3. The integrated circuit package according to claim 1, further comprising:
- a metallic shielding structure configured to be coupled to a ground potential;
- wherein the metallic shielding structure is positioned within the integrated circuit package to electrically isolate the integrated circuit die from the antenna.
4. An integrated circuit package, comprising:
- a substrate having an area for mounting an integrated circuit die;
- an antenna provided on the substrate, having a projection area;
- a set of electrical conductors for carrying data signals for the integrated circuit die;
- wherein the electrical conductors are provided on the substrate in an area formed by the union of: a) a sub-area outside the projection area of the antenna, and b) a sub-area inside the projection area of the antenna and also inside an area that is a distance from a feedpoint of the antenna less than: 1) one-half of a side length of the integrated circuit package and 2) one-twenty-fourth of a free-space operating wavelength of the antenna.
5. The integrated circuit package according to claim 4, wherein the electrical conductors of said set of electrical conductors are selected from the group consisting of pads, pins, tracks, and ground planes.
6. The integrated circuit package according to claim 1, wherein the antenna is located along one edge of a first side of the integrated circuit package, and the electrical conductors of the set of electrical conductors are closer than the antenna to an opposite edge of the integrated circuit package.
7. The integrated circuit package according to claim 1, wherein the antenna is located along two edges that form a corner on a first side of the integrated circuit package, and the electrical conductors of the set of electrical conductors are closer than the antenna to an opposite corner of the integrated circuit package.
8. The integrated circuit package according to claim 1, wherein the electrical conductors of the set of electrical conductors are spaced away from the antenna by at least about 1 mm.
9. The integrated circuit package according to claim 1, wherein at least a portion of the antenna forms a space-filling curve.
10. The integrated circuit package according to claim 9, wherein the portion of the antenna forms a curve selected from the group of: a Hilbert curve, a box-counting curve, and a grid-dimension curve.
11. The integrated circuit package of claim 1, wherein the ground plane is spaced away from the antenna by at least 2.5 mm.
12. An integrated circuit package for an electronic device comprising:
- a substrate having a mounting area for an integrated circuit die;
- a set of electrical conductors provided on the substrate for connection between the die and external package connectors;
- an antenna provided on the substrate, wherein the electrical conductors are provided on the substrate outside a projection area of the antenna; and
- a ground plane provided on the substrate, wherein the ground plane is spaced away from the antenna by at least the greater of one-quarter of a side length of the integrated circuit package and one-fiftieth of a free-space operating wavelength of the antenna, so that no part of the ground plane falls in the projection of the antenna.
13. The integrated circuit package of claim 1, wherein an edge of the ground plane nearest the distal end of the antenna is chamfered so that an edge of the ground plane nearest the distal end of the antenna is farther from the antenna than the edge of the ground plane nearest the proximal end of the antenna.
14. The integrated circuit package of claim 12, wherein the antenna is located along two edges that form a corner on a first side of the integrated circuit package, and the electrical conductors of the set of electrical conductors are closer than the antenna to an opposite corner of the integrated circuit package.
15. The integrated circuit package according to claim 12, wherein the ground plane is a first ground plane in an analog domain that is internal to the integrated circuit package; and wherein the integrated circuit package comprises a second ground plane in a digital domain that is internal to the integrated circuit package.
16. The integrated circuit package of claim 15, wherein the digital ground plane is located closer to an end point of the antenna in comparison to a proximity of the analog ground plane to the end point of the antenna.
17. The integrated circuit package of claim 16, wherein the first ground plane is an RF ground plane.
18. The integrated circuit package according to claim 1, wherein the integrated circuit package is mounted on a printed circuit board (“PCB”) including a PCB ground plane; and wherein the integrated circuit package is mounted at a corner of the PCB, with the distal end of the antenna near an edge of the corner.
19. The integrated circuit package of claim 18, wherein the PCB ground plane includes a first protrusion that is located in a projection area of the integrated circuit package.
20. The integrated circuit package of claim 19, wherein the PCB ground plane further comprises a second protrusion that is located adjacent to a projection area of the integrated circuit package.
Type: Application
Filed: Nov 9, 2012
Publication Date: Nov 28, 2013
Applicant: FRACTUS, S.A. (Sant Cugat del Valles)
Inventor: Fractus, S.A.
Application Number: 13/673,750
International Classification: H01L 23/552 (20060101); H01L 23/48 (20060101);