PATTERN MATCHING BASED PARASITIC EXTRACTION WITH PATTERN REUSE
The present disclosure relates to a method and apparatus for accurate RC extraction. A pattern database is configured to store layout patterns and their associated 3D extraction parameters. A pattern-matching tool is configured to partition a design into a plurality of patterns, and to search the pattern database for a respective pattern and associated 3D extraction parameters. If the respective pattern is already stored in the pattern database, then the associated 3D extraction parameters stored in the database are assigned to the respective pattern without the need to extract the respective pattern. If the respective pattern is not stored in the pattern database, then the extraction tool extracts the pattern and stores its associated 3D extraction parameters in the pattern database for future use. In this manner a respective pattern is extracted only once for a given design or plurality of designs. Moreover, the extraction result may be applied multiple times for a given design simultaneously, speeding up computation time. The extraction result may also be applied to a plurality of designs simultaneously.
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In advanced semiconductor technology-nodes such as Node-20 or Node-14, RC parasitics have become a dominating effect. In less advanced technology nodes the effect of RC parasitics could be addressed using approximate methods such as pre-characterization of devices and 2.5 D extraction without appreciable loss of accuracy. Accurate RC parasitic modeling is necessary for device modeling, extraction, and timing analysis. More accurate methods such as pure 3D extraction are available, but pose an intrinsic performance limitation for extraction tools for large-scale designs.
The description herein is made with reference to the drawings, wherein like reference numerals are generally utilized to refer to like elements throughout, and wherein the various structures are not necessarily drawn to scale. In the following description, for purposes of explanation, numerous specific details are set forth in order to facilitate understanding. It may be evident, however, to one of ordinary skill in the art, that one or more aspects described herein may be practiced with a lesser degree of these specific details. In other instances, known structures and devices are shown in block diagram form to facilitate understanding.
For integrated circuit (IC) designs parasitic extraction is used in conjunction with modeling and timing analysis to describe the performance of the IC. Parasitic extraction can be computationally-intensive as semiconductor technology node scaling approximately doubles the number of shapes (i.e., devices) on an IC with each successive node. To offset this, mitigation schemes such a pre-characterization of IC components prior to full chip assembly may be performed. In less advanced semiconductor technology nodes this approximation resulted in minimal accuracy loss. However, as the relative contribution of RC parasitic to IC performance has increased, this accuracy loss is no longer negligible. Pre-characterization of IC components also has the drawback that not all of the environment around a respective IC component is accurately represented. Pre-characterization also limits the range of IC component use. Another mitigation method to enhance extraction performance in semiconductor technology nodes wherein planar FETs are utilized is 2.5-dimensional (2D) extraction. In 2D extraction approximations are made along one or more axes of a device. For instance, the planar FET 102 demonstrates no co-vertical component between the source 106/drain 108 and a gate 110, such that capacitive-coupling between these shapes can be modeled with a simplified modeling methodology to obtain a reasonable capacitance accuracy, speeding up computation time for extraction. Next-generation devices such as the finFET 104 invalidate no co-vertical assumptions, while pure 3D extraction remains impractical for large designs (e.g., SRAM, PLL).
Accordingly, the present disclosure relates to a method and apparatus for accurate RC extraction. A pattern database is configured to store layout patterns and their associated 3D extraction parameters. A pattern-matching tool is configured to partition a design into a plurality of patterns, and to search the pattern database for a respective pattern and associated 3D extraction parameters. If the respective pattern is already stored in the pattern database, then the associated 3D extraction parameters stored in the database are assigned to the respective pattern without the need to extract the respective pattern. If the respective pattern is not stored in the pattern database, then the extraction tool extracts the pattern and stores its associated 3D extraction parameters in the pattern database for future use. In this manner a respective pattern is extracted only once for a given design or plurality of designs. Moreover, the extraction result may be applied multiple times for a given design simultaneously, speeding up computation time. The extraction result may also be applied to a plurality of designs simultaneously.
At 202 a schematic and associated layout of a design are produced.
At 204 a correspondence of the schematic and the layout is verified with a layout versus schematic (LVS) tool.
At 206 the layout is analyzed with a pattern-matching tool, which partitions the layout into a plurality of patterns, wherein a respective pattern comprises a one or more shapes comprising a partial device, a device, or multiple devices, as well as their surrounding environment. The partitioning of the layout results in three types of layout regions which together fully cover the layout: patterns that are stored in a pattern database, patterns that are not stored in a pattern database, a subset of the layout not comprising any patterns (e.g., the layout minus the recognized patterns). Subsequent to the layout partitioning each of the three types of layout regions are treated separately, which in some embodiments may comprises treating the three types of layout regions concurrently, successively, or a combination thereof.
At 208 the pattern-matching tool determines that a first respective pattern of the plurality of patterns does have a corresponding first reference pattern and associated first reference extraction parameters stored in a pattern database.
At 210 an extraction tool applies the first reference extraction parameters to the first respective pattern without performing extraction. In some embodiments the first reference extraction parameters comprise capacitance values for various shapes comprising the first respective pattern.
At 212 one or more first stitch-nodes of the first respective pattern are identified by the extraction tool, wherein a respective stitch-node comprises a location on a shape comprising the first respective pattern where one or more extraction parameters are assigned (e.g., a capacitance value).
At 214 the pattern-matching tool determines that a second respective pattern of the plurality of patterns does not have a corresponding second reference pattern stored in the pattern database.
At 216 the extraction tool performs extraction on the second respective pattern to obtain corresponding second extraction parameters. In some embodiments the extraction tool performs 3D extraction of the second respective pattern to obtain capacitance values for various shapes comprising the second respective pattern.
At 218 the second pattern and associated second extraction parameters are stored in the pattern database for reuse as a second reference pattern and second reference extraction parameters, respectively.
At 220 one or more second stitch-nodes of the second respective pattern are identified by the extraction tool.
At 222 a first stitch-pin is inserted to each respective first stitch-node, and a second stitch-pin is inserted to each respective second stitch-node, wherein a stitch-pin comprises a marker to inform the extraction tool to create a stitch-node to assign appropriate extraction parameters after the patterns are reassembled.
At 224 remaining extraction parameters within a subset of the layout not comprising the first respective pattern or second respective pattern are determined. In some embodiments determining the remaining extraction parameters comprises utilizing an extraction tool which performs 2.5D extraction to determine extraction parameters between a first bounding box of the first respective pattern and surrounding shapes comprising the subset of the layout, and 2.5D extraction to determine extraction parameters between a second bounding box of the second respective pattern and surrounding shapes comprising the subset of the layout. In some embodiments the extraction tool only determines a first subset of the overall extraction parameters needed to model the layout. For instance, 2.5D capacitance parameters may be determined between the aforementioned bounding boxes and surrounding shapes, and resistance parameters for the flat layout irrespective of the patterns.
At 224 stitching of parameters if performed to form a netlist of the layout. The first extraction parameters, second extraction parameters, and remaining extraction parameters comprise a first extracted netlist of the first respective pattern, a second extracted netlist of the second respective pattern, and a third extracted netlist of the subset of the layout, respectively. Stitching of parameters comprises combining the first extracted netlist, the second extracted netlist, and the third extracted netlist into a composite netlist of the layout and corresponding schematic by forming connections between all interacting combinations of first stitch-nodes, second stitch-nodes, and subset of the layout.
An extraction tool determines that a pattern 302C does not have a corresponding first reference pattern stored in a pattern database which is referenced by the pattern-matching tool, and thus performs extraction on pattern 302C to obtain associated first 3D capacitance values for pattern 302C. The extraction tool further determines that a pattern 304C does have a corresponding reference pattern stored in a pattern database, as well as associated second 3D capacitance values, and applies the second 3D capacitance values to pattern 304C. For the embodiments of
In some embodiments, context determination may further comprise certain assumptions and/or approximations to increase extraction efficiency without appreciable loss of accuracy. One example comprises, but is not limited to, coupling capacitance between polygons wherein the coupling is so weak that it can be ignored with minimal impact of modeling (i.e., ignoring the coupling capacitance degrades model accuracy within an acceptable range).
The first drain CO 614A is subject to capacitive coupling to other shapes within the pattern 600. Among these are a first coupling capacitance C1 616A between the first drain CO 614A and the second source CO 612B, a second coupling capacitance C2 616B between the first drain CO 614A and the second source 606B, and are a third coupling capacitance C3 616C between the first drain CO 614A and the second gate 608B. As is known to one of ordinary skill in the art, these coupling capacitances 616A-616C are incorporated into a netlist of the pattern through stitch-node identification, and stitch-pin insertion.
Each coupling capacitance 616A-616C is modeled in the netlist of pattern 600 by incorporating a stitch-pin on each shape that experiences a respective coupling capacitance. The first coupling capacitance C1 616A therefore results in identification of a first stitch-node 618A on the first drain CO 614A, and a second stitch-node 618B on the second source CO 612B. Likewise, the second coupling capacitance C2 616B results in identification of a third stitch-node 618C on the first drain CO 614A, and a forth stitch-node 616D on the second source 606B. And, the third coupling capacitance C3 616C results in identification of a fifth stitch-node 616E on the first drain CO 614A, and a sixth stitch-node 616F on the second gate 608B. Each stitch-node 618A-618F has a unique name (e.g., the third stitch-node 618C may be called FET1_drain_PO, etc) such that an extraction tool may define a respective stitch-pin for each respective stitch-node, wherein a stitch-pin comprises a marker added to the layout to inform the extraction tool to create a stitch-node to assign appropriate extraction parameters to the pattern.
The pattern and extraction storage system 700 further comprises a first application programming interface (API) 708 coupled to the pattern database 706, wherein the first API 708 retrieves node and capacitance parameters for a plurality of designs 710A and 710B with a given query. A second API 712 is also coupled to the pattern database 706, wherein the extraction tool 702 utilizes the second API 712 to query an extraction result comprising layout information, shape reference data, and tool type queries concurrently from a plurality of designs comprising a first design 714A and a second design 714B.
It will also be appreciated that equivalent alterations and/or modifications may occur to one of ordinary skill in the art based upon a reading and/or understanding of the specification and annexed drawings. The disclosure herein includes all such modifications and alterations and is generally not intended to be limited thereby. In addition, while a particular feature or aspect may have been disclosed with respect to only one of several implementations, such feature or aspect may be combined with one or more other features and/or aspects of other implementations as may be desired. Furthermore, to the extent that the terms “includes”, “having”, “has”, “with”, and/or variants thereof are used herein; such terms are intended to be inclusive in meaning—like “comprising.” Also, “exemplary” is merely meant to mean an example, rather than the best. It is also to be appreciated that features, layers and/or elements depicted herein are illustrated with particular dimensions and/or orientations relative to one another for purposes of simplicity and ease of understanding, and that the actual dimensions and/or orientations may differ substantially from that illustrated herein.
Therefore, the present disclosure relates to a method and apparatus for accurate RC extraction. A pattern database is configured to store layout patterns and their associated 3D extraction parameters. A pattern-matching tool is configured to partition a design into a plurality of patterns, and to search the pattern database for a respective pattern and associated 3D extraction parameters. If the respective pattern is already stored in the pattern database, then the associated 3D extraction parameters stored in the database are assigned to the respective pattern without the need to extract the respective pattern. If the respective pattern is not stored in the pattern database, then the extraction tool extracts the pattern and stores its associated 3D extraction parameters in the pattern database for future use. In this manner a respective pattern is extracted only once for a given design or plurality of designs. Moreover, the extraction result may be applied multiple times for a given design simultaneously, speeding up computation time. The extraction result may also be applied to a plurality of designs simultaneously.
In some embodiments the present disclosure relates to a method of RC extraction utilizing pattern-matching, comprising analyzing a layout with a pattern-matching tool to partition the layout into a plurality of patterns, determining that a first respective pattern does not have a corresponding first reference pattern stored in a pattern database, and therefore performing extraction on the first respective pattern to obtain associated first extraction parameters. The first respective pattern and associated first extraction parameters are then stored as the first reference pattern and first reference extraction parameters respectively in the pattern database for reuse. Subsequently, a second respective pattern of the plurality of patterns is found to have a corresponding second reference pattern and associated second reference extraction parameters that are stored the pattern database. Therefore, the second reference extraction parameters may be applied to the second respective pattern without the need to run extraction on the second respective pattern.
In some embodiments the present disclosure relates to a method of defining a pattern of a layout, comprising defining set of one or more main shapes in a layout, and defining a context for the set of one or more main shapes comprising a subset of designed levels defining a layout with which the main shapes interact. The main shapes and context only comprise 2D information about the layout. Therefore, a shape reference file comprising information about thickness of the main shapes is defined. The pattern is then placed in a locality about the main shapes within the context which defines a boundary of the pattern.
In some embodiments the present disclosure relates to a pattern and extraction storage system, comprising a parasitic extraction tool comprising a pattern-matching tool configured to partition the design into a plurality of patterns, and a pattern database which is referenced by the pattern-matching tool and configured to store a respective pattern as a reference pattern and associated extraction parameters.
Claims
1. A method of RC extraction utilizing pattern-matching, comprising:
- analyzing a layout with a pattern-matching tool configured to partition the layout into a plurality of patterns
- determining that a first respective pattern of the plurality of patterns does not have a corresponding first reference pattern stored in a pattern database with the pattern-matching tool
- determining that a second respective pattern of the plurality of patterns does have a corresponding second reference pattern and associated second extraction parameters stored in the pattern database with the pattern-matching tool;
- performing extraction on the first respective pattern to obtain associated first extraction parameters with an extraction tool;
- applying second extraction parameters to the second respective pattern from the pattern database;
- identifying one or more first stitch-nodes of the first respective pattern, wherein a first stitch-node comprises a location on a first shape of the first respective pattern where one or more first extraction parameters are assigned; and
- identifying one or more second stitch-nodes of the second respective pattern, wherein a second stitch-node comprises a location on a second shape of the second respective pattern where one or more second extraction parameters are assigned.
2. The method of claim 1, further comprising storing a first respective pattern and associated first extraction parameters as the first reference pattern and first extraction parameters respectively in the pattern database for reuse.
3. (canceled)
4. The method of claim 2, wherein no pattern in the plurality of patterns is pre-characterized such that all respective patterns are assigned extraction parameters.
5. The method of claim 1, wherein determining whether a respective pattern of the plurality of patterns has a corresponding reference pattern stored in a pattern database further comprises rotating and flipping the respective pattern.
6. The method of claim 5, wherein the first extraction parameters and second extraction parameters comprise a 3-dimensional capacitance within a bounding box of a respective pattern.
7. (canceled)
8. The method of claim 1, further comprising determining remaining extraction parameters within a subset of the layout not comprising the first respective pattern or second respective pattern, after stitch-pin insertion with the extraction tool.
9. The method of claim 8, wherein the remaining extraction parameters comprise:
- 2.5-dimensional capacitance parameters between a first bounding box of the first respective pattern and surrounding shapes comprising the subset of the layout;
- 2.5-dimensional capacitance parameters between a second bounding box of the second respective pattern and surrounding shapes comprising the subset of the layout; and
- resistance parameters for the layout.
10. The method of claim 8, further comprising defining a respective stitch-pin for each respective stitch-node from a set of stitch-nodes comprising the first stitch-nodes and second stitch-nodes.
11. The method of claim 8, wherein the first extraction parameters, second extraction parameters, and remaining extraction parameters further comprise a first extracted netlist of the first respective pattern, a second extracted netlist of the second respective pattern, and a third extracted netlist of the subset of the layout, respectively.
12. The method of claim 11, further comprising combining the first extracted netlist, the second extracted netlist, and the third extracted netlist into a composite netlist of the layout and an associated schematic by forming connections between all interacting combinations of first stitch-nodes, second stitch-nodes, and subset of the layout.
13-16. (canceled)
17. A pattern and extraction storage system, comprising:
- a parasitic extraction tool comprising a pattern-matching tool configured to partition a design into a plurality of patterns, determine that a first respective pattern of the plurality of patterns does not have a corresponding first reference pattern stored in the pattern database, and determine that a second respective pattern of the plurality of patterns does have a corresponding second reference pattern and associated second extraction parameters stored in the pattern database;
- wherein the pattern database is configured to apply the second extraction parameters to the second respective pattern; and
- wherein the parasitic extraction tool is configured to perform extraction on the first respective pattern to obtain associated first extraction parameters, identify one or more first stitch-nodes of the first respective pattern as a location where the one or more first extraction parameters are assigned, and identify one or more second stitch-nodes of the second respective pattern as a location where the one or more second extraction parameters are assigned.
18. The pattern and extraction storage system of claim 17, wherein the pattern database is configured to retrieve the reference pattern if an identical pattern is observed in a second design and apply the extraction parameters of the identical pattern without running any parasitic extraction on the identical pattern.
19. The pattern and extraction storage system of claim 18, further comprising a first application programming interface (API) coupled to the pattern database, wherein the first API retrieves node and capacitance parameters for a plurality of designs with a given query from the parasitic extraction tool.
20. The pattern and extraction storage system of claim 18, further comprising a second API coupled to the pattern database, wherein the extraction tool utilizes the second API to query an extraction result comprising layout information, shape reference data, or tool type queries concurrently from a plurality of designs.
21. The method of claim 1, further comprising:
- inserting a first stitch-pin to each of the one or more first stitch-nodes;
- inserting a second stitch-pin to each of the one or more second stitch-nodes; and
- forming a netlist of the layout by forming connections between interacting combinations of first stitch-pins and second stitch-pins.
22. The pattern and extraction storage system of claim 17, wherein the parasitic extraction tool is further configured to insert a first stitch-pin to the one or more first stitch-nodes, and insert a second stitch-pin to the one or more second stitch-nodes.
23. The pattern and extraction storage system of claim 22, wherein the parasitic extraction tool is further configured to form a netlist of the design by forming connections between interacting combinations of first stitch-pins and second stitch-pins.
Type: Application
Filed: Nov 15, 2012
Publication Date: May 15, 2014
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd. (Hsin-Chu)
Inventors: Ping-Hung Yuh (New Taipei City), Hsin-Yun Lin (Puli Township), Cheng-I Huang (Hsinchu City), Chung-Hsing Wang (Baoshan Township)
Application Number: 13/677,380