TURBO DECODING TECHNIQUES

Abstract

Techniques are disclosed for turbo decoding orthogonal frequency division multiplexing OFDM symbols. Techniques for combined turbo decoding and equalization are disclosed. The disclosed techniques can be implemented in receivers that receive wired or wireless OFDM signals and produce data and control bits by decoding the received signals.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

This patent application claims the benefit of U.S. Provisional Patent Application No. 61/802,038, filed on Mar. 15, 2013. The entire content of the before-mentioned provisional patent application is incorporated by reference herein.

TECHNICAL FIELD

This document relates to digital communication.

BACKGROUND

Many modern digital communication systems use orthogonal frequency division multiplexing (OFDM) modulation technology. Various types of error correction codes are used to increase robustness of transmitted signals. For example, OFDM and error coding is used in wireless technologies such as Long Terra Evolution (LTE) and wired communication technologies such as digital subscriber line (DSL).

SUMMARY

This document describes technologies, among other things, for turbo decoding of OFDM modulation signals. In some implementations, a combined turbo decoding and turbo equalization technique may be used.

In one aspect, methods, systems and apparatus for turbo decoding including serially concatenated TCM and Reed Solomon block codes, with convolutional interleaving, are disclosed.

In another aspect, methods, systems and apparatus for turbo decoding of serially concatenated TCM and Reed Solomon block codes, with convolutional interleaving, using constellations of variable sizes as part of the same code block are disclosed. Where the least significant bits of constellations are both block coded and trellis coded, and the most significant bits are block coded only.

In another aspect disclosed techniques provide for a buffer for constellations from more than one OFDM symbol, which provides for turbo decoding of convolutional interleaving over more than one OFDM symbol is disclosed. Alternatively, this buffer may be after the SISO constellation demapper, for demapped constellations.

In another aspect, a SISO synchronization buffer for the block coded only bits from the SISO constellation demapper is disclosed. The buffer also accepts the bits from the SISO trellis decoder, and output of the soft synchronization buffer, and assembles them into bytes.

In another aspect, a turbo decoder comprising a feedback path, and a SISO data frame buffer for one or more data frames is disclosed.

In another aspect, methods, systems and apparatus for combined turbo decoding and turbo equalization include buffering of one or more OFDM symbols which is greater than or equal to the interleaving between the component codes of a concatenated code. Where the error correcting code is a parallel or serial concatenated code (i.e., consists of two or more component codes, and one or more interleavers,) or LDPC code. The interleaving may extend over more than one OFDM symbol.

In some implementations buffering of OFDM symbols, and ISI subtraction in the frequency domain is performed.

In another aspect, methods, systems and apparatus Hard or soft re-encoded data to the decision feedback equalizer from two classes of data: 1.) A synchronization symbol. Or an inner or first component decoder. 2.) An outer or second component decoder. Or either component decoder on second or later decoding iterations. The second class of data may only available after the interleaver or deinterleaver delay, and so is not available for the first iteration of decision feedback equalization.

In another aspect, the disclosed data reception techniques use a constellation demapper and mapper that supports variable size constellations.

In another aspect, a transmitted symbol replica includes replication of PAR reduction.

In another aspect, IFFT and FFT fast convolution for replica of the channel and receiver prefiltering may be performed.

In another aspect, summing of the received signal replica and echo replica (for any echo cancellation) in the frequency domain may be performed.

These and other aspects, and their implementations and variations are set forth in the drawings, the description and the claims.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of turbo coding and modulation as used in a Long Term Evolution (LTE) system.

FIG. 2 is a block diagram of an LTE turbo encoder.

FIG. 3 illustrates cyclic extension with windowing.

FIG. 4 illustrates a digital subscriber loop (DSL) transmitter and receiver with non-iterative decoder.

FIG. 5 illustrates an encoder for parallel concatenated convolutional codes.

FIG. 6 illustrates an encoder for serially concatenated trellis coded modulation (TCM) and block codes.

FIG. 7 illustrates a trellis encoder having a convolutional encoder and bit convertor.

FIG. 8 illustrates a generalized triangular interleaver.

FIG. 9 depicts various constellations used in digital communications.

FIG. 10 illustrates a turbo decoder for parallel concatenated convolutional codes.

FIG. 11 illustrates a turbo decoder for serially concatenated TCM and block codes.

FIG. 12 is a block diagram representation of turbo decoder used in a DSL receiver.

FIG. 13 is a flow-chart representation of turbo decoding for DSL control.

FIG. 14 is a block diagram representation of a pipelined decoding module for DSL.

FIG. 15 illustrates a single carrier n-QAM decision feedback turbo equalizer.

FIG. 16 is a block diagram representation of a combined turbo equalizer and turbo decoder for orthogonal frequency division multiplexing (OFDM) signal.

FIG. 17 is a block diagram representation of a combined turbo equalizer and turbo decoder for OFDM with frequency domain OFDM symbol buffering and inter symbol interference (ISI) cancellation.

FIG. 18 illustrates a re-encoder for parallel concatenated convolutional codes.

FIG. 19 illustrates a re-encoder for serially concatenated TCM and block codes.

FIG. 20 is a flowchart implementation for a combined turbo equalization and turbo decoding for OFDM control.

FIG. 21 is a flowchart representation of a process of turbo decoding and turbo equalization.

Like reference symbols in the various drawings indicate like elements.

DETAILED DESCRIPTION

Techniques for turbo decoding and turbo equalization of received signals to produce data bits are disclosed. In the description, the following abbreviations are used.

3GPP LTE=Third Generation Partnership Project, Long Term Evolution

ADSL=Asymmetric Digital Subscriber Line

AFE=Analog Front End

ASIC=Application Specific Integrated Circuit

BPSK=Binary Phase Shift Keying

DFE=Decision Feedback Equalizer

DSL=Digital Subscriber Line

EPROM=Erasable Programmable Read Only Memory

EEPROM=Electrically Erasable Programmable Read Only Memory

FEQ=Frequency Domain Equalizer

FFT=Fast Fourier Transform

FPGA=Field Programmable Gate Array

IEEE=Institute of Electrical and Electronics Engineers

IFFT=Inverse Fast Fourier Transform

ISI=Inter Symbol interference

ITU=International Telecommunications Union

LAN=Local Area Network

LDPC=Low Density Parity Check

LLR=Log Likelihood Ratio

LSBs=Least Significant Bits

LTE=Long Term Evolution

MAP=Maximum a Posteriori

MSBs=Most Significant Bits

n-QAM=Quadrature Amplitude Modulation

n-QPSK=Quadrature Phase Shift Keying

OFDM=Orthogonal Frequency Division Multiplexing

PAR=Peak to Average Ratio

SISO=Soft Input Soft Output

SOVA=Soft Output Viterbi Algorithm

TCM=Trellis Coded Modulation

VDSL=Very High Speed Digital Subscriber Line

The International Telecommunications Union (ITU) standards for Asymmetric Digital Subscriber Line (ADSL) and Very High Speed Digital Subscriber Line (VDSL) transceivers specify an error correcting code consisting of concatenated trellis coded modulation (TCM) and Reed Solomon block codes, with convolutional interleaving. The standards also specify Orthogonal Frequency Division Multiplexing (OFDM) for modulation and demodulation. OFDM is a multicarrier technique, which uses an Inverse Fast Fourier Transform (IFFT) for modulation and a Fast Fourier Transform (FFT) for demodulation, The sizes of the signal constellations in the frequency bins of the IFFT and FFT (i.e. assigned to each of the carriers) are variable. And the least significant bits of the constellations are both block coded and trellis coded, while the most significant bits are block coded only.

Turbo decoding significantly improves the coding gain of error correcting codes. Turbo decoding is the iterative decoding of concatenated codes. It was originally designed tier parallel concatenated convolutional codes, and has been extended to serially concatenated convolutional codes, concatenated trellis coded modulation, and concatenated trellis coded modulation and block codes.

Present day receivers compatible with the ADSL and VDSL standards have done a single decoding; they have not been able to decode iteratively. In some embodiments, their coding gain would be improved by being able to turbo decode concatenated TCM and Reed Solomon block codes, with convolutional interleaving, using OFDM with variable size constellations.

FIG. 1 depicts a block diagram example of a DST transmitter and a DST received with a non-iterative decoder. Conventional decoding of the concatenated code in the ADSL and VDSL standards uses a single pass, non-iterative, decoder. A soft input constellation demapper precedes the decoder. The inputs to the constellation demapper are constellation points, which each represent from one to fifteen bits, and how many bits each constellation represents. The outputs are encoded bits. The outputs for the two least significant bits (which are both block coded and trellis coded) are soft. outputs (i.e. 0 and 1 with reliability information.) And the outputs tier the thirteen most significant bits (which are block coded only) are hard outputs (i.e. 0 and 1.) The soft outputs from the constellation demapper go to a soft input hard output Viterbi decoder. The hard outputs from the Viterbi decoder, and from the constellation demapper, go to a synchronization buffer. Which delays the outputs from the constellation demapper, to account for the latency of the Viterbi decoder, and assembles the bits into bytes. The bytes from the synchronization buffer go to convolutional deinterleaver. The deinterleaved bytes become the codewords input to a hard input hard output Reed Solomon decoder. Some hard output Reed Solomon decoders, while using hard information at the bit level, can use soft information at the byte level for errors and erasures decoding.

Conventional techniques for turbo decoding of concatenated trellis coded modulation and block codes has been for a fixed size constellation, with all of the bits of the constellation being both block coded and trellis coded. FIG. 2 illustrates an encoder for parallel concatenated convolutional codes. FIG. 3 illustrates an encoder for serially concatenated trellis coded modulation (TCM) and block codes. FIG. 4 illustrates a trellis encoder having a convolutional encoder and a bit convertor.

As an alternative to turbo decoding the code in the ADSL and VDSL standards, there have been proposals to add different types of codes to the standards, for which there is prior art for iterative decoding. There have been proposals to add parallel concatenated convolutional codes, parallel concatenated convolutional codes with trellis coded modulation, and low density parity check codes.

TURBO DECODING OF SERIALLY CONCATENATED TCM AND REED SOLOMON BLOCK CODES, WITH CONVOLUTIONAL INTERLEAVING

In some embodiments, turbo decoding of serially concatenated TCM and Reed Solomon block codes, with convolutional interleaving, using constellations of variable sizes as part of the same code block may be performed. The least significant bits of constellations are both block coded and trellis coded, and the most significant bits are block coded only.

A buffer may be provided for constellations from more than one OFDM symbol. The buffer provides for turbo decoding of convolutional interleaving over more than one OFDM symbol, Alternatively, this buffer may be after the SISO constellation demapper, for demapped constellations.

A SISO synchronization buffer may be configured for the block coded only bits from the SISO constellation demapper and may also accept the bits from the SISO trellis decoder, and output of the soft synchronization buffer, and assemble them into bytes.

In the turbo decoder feedback path, a SISO data frame buffer may be provided for buffering for one or more data frames.

In some embodiments, a turbo decoder supports, or decoders, the serially concatenated TCM and Reed Solomon block coding, with convolutional interleaving, in the ADSL and VDSL standards. It supports variable sized constellations (see, e.g., FIG. 6), where the least significant bits are both block coded and trellis coded, and the most significant bits are block coded only. And convolutional interleaving over multiple OFDM time domain symbols.

In some embodiments, a turbo decoder includes modules for turbo decoding the error correcting code in the standards, including: A buffer for constellations from more than one OFDM symbol. A SISO constellation demapper. A SISO trellis decoder. A SISO synchronization buffer. A SISO convolutional deinterleaver. A SISO Reed Solomon decoder. A SISO convolutional deinterleaver. A SISO data frame buffer.

ADSL and VDSL are multicarrier systems which use an Inverse Fast Fourier Transform (IFFT) for modulation, and a Fast Fourier Transform (FFT) for demodulation. Each of the frequency bins of the IFFT and FFT contains a point in a signal constellation. Where each constellation point is a point in the Euclidean plane, described by a complex number, Z=X+jY, which represents modulated data. And for hard data, X and Y are odd integers. The constellations may be of variable sizes, i.e. each constellation point may represent from 1 to 15 bits. I.e. the modulation for each frequency bin can range from BPSK to 32K QAM. Some frequency bins may be unused, and represent 0 bits. A table stores the number of data bits for each frequency bin (subcarrier) from f=0 to the highest transmitted frequency bin. n data bits are mapped to one of 2̂n constellation points.

The Reed Solomon coding used by ADSL and VDSL standards is a conventional byte based Reed Solomon code with its operations in Galois Field GF(2⁸). Where the number of message bytes is k, the number of parity bytes r, and the number of codeword bytes n=k+r.

The message polynomial is m(x)=m₀x_k−1+m₁x^k−2+ . . . +m_k−2x+m_k−1.

The parity polynomial is p(x)=p₀x^r−1+p₁x^r−2+ . . . +p_r−2x+p_r−1.

The generator polynomial is g(x)=(x+α)(x+α²)(x+α³) . . . (x+α¹).

The codeword is c(x)=m(x)x^r+p(x).

And p(x)=m(x)x^r mod g(x).

FIG. 5 illustrates a generalized triangular interleaver. The convolutional interleaver used by the ADSL and VDSL standards is a generalized triangular interleaver. The bytes of the Reed Solomon codewords are delayed by an amount that varies linearly with the byte index i. Byte B_i is delayed by (D−1)×i bytes, where D is the interleaver depth. And (D−1) M×K. Where K is the interleaver block length (or number of delay lines), and M is a nonnegative integer number of bytes.

Referring again to FIG. 4, the trellis coding used by the ADSL and VDSL standards is Wei's 4D 16 state code. Bits u₂ . . . u₁ are input to a recursive systematic convolutional encoder of rate ⅔, which outputs bits U₂ . . . u₀. Bits u₃ . . . u₀ are input to a bit converter with equations v₁=u₁u₃, v₀=u₃, w₁=u₀+u₁+u₂+u₃, w₀=u₂+u₃. Bits v₁ . . . v₀, and w₁ . . . w₀ become the two least significant bits input to the constellation mapper on alternate mappings.

With reference to FIG. 9, in some embodiments, the received time domain DSL signal is filtered, and may be equalized in the time domain. The cyclic extension is removed from the filtered and equalized signal, giving a time domain signal whose length matches that of the modulating IFFT. An FFIT transforms the time domain signal to points in signal constellations in the frequency domain. Giving one constellation point for each used frequency bin. The constellation points go to a Frequency Domain Equalizer (FEQ), which does one complex multiplication of each constellation point, to correct amplitude and phase.

The equalized constellation points go to a constellations buffer for the constellation points from more than one OFDM symbol. The constellations buffer is large enough for the extent of the convolutional interleaving, as extrinsic information is fed back from Reed Solomon codeword bytes that may have been interleaved over more than one OFDM symbol. In some embodiments, the structure of the constellations buffer is a sliding window or shift register type of structure. Then a parallel to serial converter outputs the constellation points to a SISO constellation demapper. Alternatively demapped constellations could be buffered.

The SISO constellation demapper has two inputs: Constellation points which represent from one to fifteen bits. And the number of bits that each constellation represents. A bits table stores the number of bits carried by each frequency him It outputs encoded data for soft decoding. For error correcting codes, soft inputs and outputs refer to data bits represented as a log likelihood ratio (LLR). Where for data bit d, LLR(d)=log (Pr(d=1)/Pr(d=0)), or an approximation. The SISO constellation demapper may also accept extrinsic information which has been re-encoded and re-mapped by a SISO constellation mapper.

Decoders may output LLRs calculated exactly by the MAP algorithm, or approximately using the concept of a concurrent path (for trellis decoders) or concurrent codeword (for block decoders). Call the received codeword R, the set of soft received bits r_n. And D the hard decoded codeword, with minimum Euclidean distance to R, and bits d_n. Call C_n, the concurrent codeword, with minimum Euclidean distance to R, and c_n=˜d_n. Then approximations used include: LLR_n≈d_n×((R−C_n)−(R−D)). And LLR_n≈d_n×((R−C_n)²−(R−D)²)/4.

All of the encoded bits are Reed Solomon block coded, and interleaved. The least significant bits are also trellis coded, and go to a SISO trellis decoder. For two to fifteen bit constellations, the two least significant bits are trellis coded, for one bit constellations, one bit is trellis coded.

The notation L(;;)_n is used to refer to the log likelihood ratios of bits of iteration n. Where the first parameter refers to the code: i for the inner code, and o for the outer code. The second parameter refers to the decoders: i for the input, o for the output, e for extrinsic information, and a for a priori information. And the third parameter is optional, and refers to the range of bits: m for most significant bits (MSBs), and 1 for least significant bits (LSBs).

FIG. 10 is a flowchart representation of turbo decoding for DSL control. FIG. 11 is a block diagram representation of a pipelined decoding module for DSL. The SISO trellis decoder has two inputs. The 2 LSBs from the SISO constellation demapper are the received encoded bits input to the SISO trellis decoder. And 3 bits of a priori information are input to the SISO trellis decoder. For the first iteration the a priori information=0. For subsequent iterations, the a priori information is 3 soft bits extracted from the SISO data frame buffer (which are 3 decoded bits), which correspond to 4 encoded LSBs from the SISO constellation demapper, i.e., 2 encoded LSBs from two successive constellations. The a priori information to the inner decoder L(i;a) is the buffered 3 least significant bits of the interleaved extrinsic information from the previous iteration of the outer decoder, ˜L(o;e). With L(i;o) the output of the inner decoder, and the inner extrinsic information, L(i;e)=L(i;a).

With reference to FIG. 7 and FIG. 8, in some embodiments, the algorithms for the SISO trellis decoding are the logarithmic version of the Maximum a Posteriori algorithm (log MAP), and the Soft Output Viterbi Algorithm (SUVA). Both perform exhaustive searches of the trellis, and are practical for a 16 state code. Both the log MAP, and SOYA algorithm have versions which use forward and backward passes, or are forward only with a sliding window. The trellis code used in the ADSL and VDSL standards is Wei's 4-dimensional, 16 state trellis code, which places specific requirements on the decoder. The log MAP algorithm uses additions in place of multiplications in the MAP algorithm, and the max log MAP algorithm has been shown to be equivalent to the Soft Output Viterbi Algorithm. At low E_b/N₀ ratios, the log MAP algorithm may outperform the SOYA by up to 0.7 dB.

Referring to FIG. 10 and FIG, 11, the extrinsic information from the inner decoder L(i;e), and the interleaved msbs to the outer decoder's input ˜L(o;i;m) are input to the SISO synchronization buffer. The SISO synchronization buffer is used to synchronize the MSBs from the SISO constellation demapper, which are block coded only, with the inner extrinsic information from the SISO trellis decoder, L(i;e), which has a decoding latency. Note that constellations of 3 or more bits have msbs. After synchronization, the soft bits are assembled into soft bytes. The soft bytes from the SISO synchronization buffer go to a convolutional deinterleaver. The deinterleaved soft bytes are the codewords, L(o;i), input to the outer SISO Reed Solomon decoder.

Next, SISO decoding of the outer Reed Solomon code is performed. With L(o;i) the systematic input to the decoder, and L(o;o) the output of the decoder, the outer extrinsic information is L(o;e)=L(o;o)−L(o;i).

The log MAP and SOYA algorithms are currently impractical for decoding Reed Solomon codes. Some other possible methods of SISO Reed Solomon decoding include: Reliability assisted hard decision decoding algorithms, including Chase type algorithms. Algebraic list decoding algorithms, including the Koetter and Vardy algorithm, Ordered statistics decoding, including the box and match algorithm, and iterative decoding algorithms.

The outer extrinsic information L(o;e), from the SISO Reed Solomon decoder, is fed back to a SISO convolutional interleaver, giving ˜L(o;e), and then to a SISO data frame buffer. With a convolutional interleaver the interleaved outer extrinsic information is calculated from bits that are in three stages of decoding: Bits that have completed decoding by the outer decoder. Bit that are being decoded by the outer decoder. Bits for which an outer codeword has not yet been deinterleaved, and have extrinsic information that equals zero.

The interleaved outer extrinsic information may extend over more than one OFDM symbol. Constellations from one or more OFDM symbols are read from the constellations buffer, and input to the SISO constellations demapper, in synchronization with their a priori information.

Decoding iterations continue through SISO trellis decoding, SISO synchronization, deinterleaving, and SISO Reed Solomon decoding.

Iterative decoding is considered to have converged when the SISO decoders agree on the output (outputs match). The number of iterations is typically greater than or equal to two, and less than or equal to sixty four, after which hard bits can be output as the decoded data. In some embodiments, a hard output algebraic Reed Solomon decoder may also be incorporated, and hard bits output when it indicates a successful decoding.

The turbo architecture for iterative decoding uses one of each of the decoding blocks, and feedback. A pipelined architecture (which is analogous to loop unrolling) is an alternative. With reference to FIG. 11, a pipelined architecture contains multiple decoding modules, typically one module for each decoding iteration. In the pipelined architecture for decoding DSL, a decoding module contains: A SISO trellis decoder, a SISO synchronization buffer, a convolutional deinterleaver, a SISO Reed Solomon decoder, a convolutional interleaver and a SISO data frame buffer.

In some embodiments, the decoding modules are connected serially. With the inputs to each module being the output of the SISO constellation demapper, and the a priori information from the previous module's SISO data frame buffer. The outputs being the a phori information from the SISO data frame buffer, and hard bits from the SISO Reed Solomon decoder. The a priori infOrmation to the first module is set to zero.

The pipelined architecture decoding modules may also each contain a SISO constellation demapper, and SISO constellation mapper. In which case they would accept constellations as inputs, rather than the output of the &ISO constellation demapper.

COMBINED TURBO DECODING AND TURBO EQUALIZATION

Orthogonal frequency division multiplexing (OFDM) is a multicarrier modulation and demodulation technique, that uses an inverse fast Fourier transform (IFFT) for modulation and a fast Fourier transform (FFT) for demodulation. The frequency bins of the transforms act as carriers, and may use signal constellations of one or more bits (i.e. from BPSK to n-QPSK). A cyclic extension may be added to the output of the IFFT for transmission, and removed on reception before the input to ITT. An OFDM symbol consists of the output of the transmit IFFT, with any cyclic extension, and after any peak to average ratio (PAR) reduction. The cyclic extension acts as a guard interval, so that intersymbol interference (ISI) that is within the guard interval doesn't affect the demodulated signal. ISI is typically constrained to fit within the guard interval by a linear equalizer, or extending the guard interval, or a combination of the two. Both discard some of the received energy before demodulation, and so reduce the possible data rate. And the ISI may still extend beyond the guard interval, reducing the signal to interference ratio of the demodulated signal, and the data rate.

For both single and muiticarrier modulation, linear equalization is the simplest type of equalization. Decision feedback equalization (i.e. ISI cancellation) provides better performance. Turbo decision feedback equalization, where the equalization is iterated, using hard or soft decisions from an error correcting code, gives even better performance. And combined turbo equalization and turbo decoding, where the equalization is iterated, in conjunction with the decoding of a concatenated error correcting code that is also iterated, gives even better performance.

Iteratively decoded error correcting codes provide the greatest coding gain, and can be combined with OFDM, Iteratively decoded error correcting codes include: parallel concatenated convolutional codes, serially concatenated convolutional codes, serially concatenated trellis coded modulation and block codes, and low density parity check (LDPC) codes.

The performance of OFDM receivers would be improved by combined turbo equalization and turbo decoding.

The International Telecommunications Union (ITU) Asymmetric Digital Subscriber Line (ADSL) and Very High Speed Digital Subscriber Line (VDSL) standards, 3GPP LTE standard, IEEE 802.11a/g/n/ac wireless LAN standards, and others, specify OFDM.

The ADSL and VDSL standards specify an error correcting code consisting of serially concatenated trellis coded modulation (TCM) and Reed Solomon block codes, with convolutional interleaving. The 3GPP LTE standard specifies a parallel concatenated convolutional code, with turbo decoding. The 802.11n/ac standards include LDPC codes as an optional feature.

LTE cell phones use OFDM, and Parallel Concatenated Convolutional Codes with turbo decoding for error correction. Equalization has been treated independently. The standard provides for two different lengths of cyclic prefix, so that linear equalization can be used.

ADSL and VDSL use OFDM, and serially concatenated trellis coded modulation and Reed Solomon block codes for error correction. Single iteration decoding has been used. And linear equalization has been used.

EXAMPLES OF FEATURES

Buffering of one or more OFDM symbols which is greater than or equal to the interleaving between the component codes of a concatenated code. Where the error correcting code is a parallel or serial concatenated code (i.e., consists of two or more component codes, and one or more interleavers,) or LDPC code. And the interleaving may extend over more than one OFDM symbol.

Buffering of OFDM symbols, and ISI subtraction in the frequency domain.

Hard or soft re-encoded data to the decision feedback equalizer from two classes of data: 1.) A synchronization symbol. Or an inner or first component decoder. 2.) An outer or second component decoder. Or either component decoder on second or later decoding iterations. The second class of data is only available after the interleaver or deinterleaver delay, and so is not available for the first iteration of decision feedback equalization.

A constellation demapper and mapper that supports variable size constellations.

Transmitted symbol replica includes replication of PAR reduction.

IFFT and FFT fast convolution for replica of the channel and receiver prefiltering.

Summing of the received signal replica and echo replica (for any echo cancellation) in the frequency domain.

EXAMPLES OF EMBODIMENTS

Received, time domain OFDM symbols from the analog front end (AFE) are first prefiltered/pre-equalized. The prefiltering/pre-equalization has two functions: The filtering rejects out of band noise. And high pass filtering/equalization has a channel shortening effect. I.e., it reduces the effective length of the channel impulse response. Call the newest prefiltered/pre-equalized time domain OFDM symbol, rx_n(v).

The time domain OFDM symbols next have their cyclic extensions removed, leaving time domain symbols that are the size of the following HT.

The time domain symbols are next buffered. The buffer contains symbols to be decision feedback equalized and decoded. And stores at least enough symbols to cover the interleaving of the concatenated code used. Given a block interleaver of size i bits, or a convolutional interleaver with delay i bits, and OFDM symbols that carry j bits, and not requiring that i/j=an integer, i.e. interleaving can end on an arbitrary bit in an OFDM symbol. And calling the minimum buffer size b. Then for block interleavers, b=the integer part of (i/j) +(1 if the fractional part of i/j is not equal to zero) i.e., b=ceiling (i/j)+1. For convolutional interleavers, b is analogous to the constraint length of a convolutional code, so it may advantageous to buffer c * b OFDM symbols, with c an integer from 2 to 10.

Received OFDM symbols to be turbo equalized and turbo decoded are stored in a time domain or frequency domain OFDM symbols buffer. Call the indices of the oldest OFDM symbol in the buffer m, and the newest n, then n=m+b−1. For convenience, assume that the ISI extends into one following symbol. And call d the index of the symbol whose data is used to decision feedback equalize the symbol with index d+1. Then d ranges from less than or equal to m-1 (symbols which have been decoded) to n-1. Data from symbolm−1 is used to decision feedback equalize symbolm, data from symbolm to DFE symbolm+1 . . . data from symbolm+1 to DFE symboln. Assume that the last OFDM symbol removed from the buffer was either a synchronization symbol or was decoded, so that its data is available to decision feedback equalize the oldest symbol in the buffer.

Decision feedback equalization is performed on the buffered symbols. Using iteratively decoded data, a replica of the intersymbol interference from each OFDM symbol is generated, and subtracted from the following symbol. Each replica of intersymbol interference, replica_isid+1(t), is the portion of a replica of a complete received OFDM symbol, replica_r×d(v), that extends past the cyclic extension into the portion of the following received OFDM symbol which is demodulated by the FFT, rx_zd+1(t).

The decision feedback equalized time domain signal, rx_z(t), is the input to a FFT, which outputs constellation points in the frequency domain, Rx_Z(f). The constellation points go to a Frequency Domain Equalizer (FEQ), which does one complex multiplication of each constellation point, to correct amplitude and phase.

The equalized constellation points are parallel to serial converted, and go to a SISO constellation demapper. After the parallel to serial conversion, OFDM may be viewed as single carrier modulation, with the exception of variable sized constellations.

The SISO constellation demapper accepts constellation points representing one or more bits, and the number of bits that each constellation represents. It outputs encoded bits, with reliability information for all of the bits, for turbo decoding.

For the decision feedback equalization, data from the turbo decoder is input to a re-encoder, and the re-encoded data is used to generate the replicas of the ISI.

The input to the first or inner component decoder of a concatenated code does not require any interleaving or deinterleaving to be decoded. And can be decoded as a single, non-concatenated code. The input to the second or outer component decoder of a concatenated code requires interleaving or deinterleaving. And the interleaving may extend over multiple OFDM symbols. Which are first buffered, but not yet decision feedback equalized. Due to the interleaving, some of the data needed to decode the second or outer component code, and use it for decision feedback equalization, may be contained within symbols that have not yet been decision feedback equalized and decoded themselves. So one class of data is used for the first iteration of decision feedback equalization, and another class for the subsequent iterations. Both classes may be either hard or soft data. If the interleaving fits within one OFDM symbol, then the data can be turbo decoded without any decoding of the following symbols. But if the interleaving extends over more than one OFDM symbol, then both classes of data are used.

DATA CLASSES

Data available before the interleaving or deinterleaving delay. Which includes: Synchronization symbols. And data decoded by a first (for a parallel concatenated code) or inner (for a serially concatenated code) component decoder.

Data which is only available after the interleaving or deinterleaving delay. Which includes the output of the second or outer component decoder, and the output of either decoder for the second or later iterations of the turbo decoder.

Synchronization symbols can be decoded as hard data, without any decoding of the following symbols. First or inner component codes can be decoded as for a code that isn't concatenated, without any interleaving delay. And can be re-encoded for the first iteration of decision feedback equalization.

As with any concatenated code, after data is decoded by the first or inner decoder, it is then deinterleaved or interleaved, and becomes available to the second or outer decoder. After enough data is available to the second or outer decoder, the turbo decoder can execute one or more decoding iterations (for each iteration of decision feedback equalization). After the interactions of the turbo decoder, new turbo decoded data is available for re-encoding. Then class 2 data can be provided to the re-encoder. And decision feedback equalization and turbo decoding iterated.

When the second or outer component code is a systematic code, the data does not need to be re-encoded, since when a code is systematic the decoder's output is a corrected version of its input. It may be convenient to use a decoder that outputs data only, rather than data and parity, and re-encode the parity.

For parallel concatenated codes, decoded data that's not interleaved is interleaved to re-encode parity 2. For serially concatenated codes, data that's been decoded by the outer component decoder is interleaved to re-encode the inner component code.

One or more iterations of the turbo decoder may be performed for each iteration of the turbo equalization. After the interactions of the turbo decoder, new turbo decoded data is available for re-encoding.

Each replica of ISI is generated by first generating a replica of the transmitted signal, and then filtering it by the received frequency response (RFR). Where the RFR equals the filtering from the transmitted constellations to the FFT demodulator. So the RFR=any transmitter gain scaling of constellations x the channel frequency response x the receiver prefiltering/pre-equalization frequency response. And the RFR and received impulse response (RIR) are a Fourier transform pair.

Replicas of the transmitted OFDM symbols can be generated by:

Constellation mapping the hard or soft re-encoded data. The constellations may be of variable sizes, i.e. each constellation point may represent one or more data bits. A table stores the number of data bits for each frequency bin (subcarrier) from f=0 to the highest transmitted frequency bin. n data bits are mapped to one of 2̂n constellation points. Where each constellation point is a point in the Euclidean plane, described by a complex number, Z=X +jY. Call the outputs of the constellation mapper, Replica_Z_f=X_f+jY_f. For unused frequencies Replica Z_f=0. Note that while transmitters may include gain scaling or transmit spectrum shaping, so that Z_f=g_f×(X_f+jY_f) it is not necessary to include gain scaling at this stage. As the following convolution with the channel impulse response will scale all frequencies according to the received frequency response.

performing a serial to parallel conversion of the constellation points, Replica_Z_f, giving the frequency domain inputs to an inverse fast Fourier transform.

performing an IFFT, Reptica_Z(f)->replica_z(t). The LEFT generates N_td real time domain samples, i.e. modulates the constellation points. An oversampled IFFT may be used. In which case Z (f) is zero padded.

inserting the cyclic extension. Call reptica_z(t) with its cyclic extension, and PAR reduction replica_tx(u). The cyclic extension acts as a guard interval, which is removed by the receiver before demodulation, so that intersymbol interference that is constrained within the cyclic extension is ignored. The cyclic extension may consist of only a cyclic prefix, or both a cyclic prefix and cyclic suffix. A cyclic prefix prepends the last n_cp samples of replica_z(t) to the beginning of replica_z(t). A cyclic suffix appends the first n_cs samples of replica_z(t) to the end of replica_z(t). A windowing, of length β, may be used to overlap the cyclic suffix of an OFDM symbol with the cyclic prefix of the following OFDM symbol. Then the number of samples of the cyclic extension, N_ce=N_cp+N_cs−β. Call the number of samples of an OFDM symbol N_symN_td+N_ce. Call the number of samples of the received impulse response N_rir. If n_Nir is less than or equal to n_ce, then the intersymbol interference has been constrained to fit within the cyclic extension, and will not be demodulated. Since the cyclic extension is a guard interval which is not demodulated, the cyclic extension reduces the data rate.

performing any PAR reduction, giving a time domain replica of the transmitted OFDM symbol. PAR reduction may be as simple as clipping.

filtering the replica of the transmitted signal by the received frequency response produces a replica of the received signal. So a time domain replica of the received signal equals, a time domain replica of the transmitted signal convolved with the received impulse response. And a frequency domain replica of the received signal equals, a frequency domain replica of the transmitted signal multiplied by the received frequency response.

The time domain filtering may be by direct convolution, i.e., a finite impulse response filter. Then the replica of the received replica_rx(t)=replica_tx(t) * response_rx(t)

Or the filtering may be performed by a fast circular convolution as follows:

Call the replica of the transmitted OFDM symbol in the time domain, replica_tx (u). Zero pad replica_tx (u) to a length greater than or equal to one OFDM symbol plus the ISI to be replicated. Preferably the prefilter/pre-equalizer will shorten the effective channel so that this will be 2×N_td.

Perform an FFT, replica_tx(u)->Replica_Tx(g), to transform the zero padded time domain representation to the frequency domain.

Zero pad the estimate of the received frequency response above the highest transmitted frequency, giving an RFR(g) that is equal in length to Replica_Tx(g).

Multiply in the frequency domain, Replica _(g)=RFR(g) * Replica_Tx(g), to give a replica of the received signal in the frequency domain..

When using echo cancellation, the replica of the echo in the frequency domain may be added to the replica of the received signal in the frequency domain. Replica_Rx(g)=Replica_Rx(g)+Replica_Echo(g).

Perform an IFFT, Replica_Rx(g)->replica_rx(v). Giving a replica of the received OFDM symbol, with echo if it was added, in the time domain.

Extract the portion of replica_rx(v) which extends into the following symbol. Which gives the replica of the intersymbol interference, replica_isi(t).

The buffering and ISI cancellation may be performed in the frequency domain, rather than the time domain. In which case, the received time domain OFDM symbols without cyclic extension, rx_z_n(t), are input to an FFT, transforming them to frequency domain symbols, Rx_Z_n(f). And next frequency domain equalized, by one complex multiplication for each frequency bin, giving Rx_Feq_n(f). And next buffered. In which case, the filtering of the replicas of the transmitted time domain OFDM symbols, replica is by the product of the RFR and the FEQ. Each time domain ISI replica, replica_isi_d+1(f) is input to an FFT, giving a frequency domain ISI replica, Replica_ISI_d+1(f). Each Replica_ISI_d+1(f) is subtracted from the buffered Rx_Feq_d+1(f), giving Rx_Eq_d+1(f).

Note that, time domain decision feedback equalization of an OFDM signal is equivalent to passband DFE of a single carrier signal. And frequency domain DFE of an OFDM signal is equivalent to baseband DEE of a single carrier signal.

Also the time domain OFDM signal can be split into two or more bands, where the higher frequency band(s) are prefiltered by a high pass filter/equalizer with a high enough cut off frequency that the remaining Intersymbol Interference is of short enough duration to fit within the cyclic extension, so that no further equalization is needed for that band. I.e. the prefilter high pass filter/equalize has enough of a channel shortening effect. Then the lower band(s) can be processed at a lower sampling rate than the full signal.

In some implementations, a turbo decoding method, as disclosed above, includes receiving a plurality of orthogonal frequency division multiplexing (OFDM) symbols, generating replicas of the received plurality of OFDM symbols to reduce a peak to average ratio, and summing the generated replicas with echo replicas in frequency domain to perform echo cancellation.

In some implementations, a disclosed combined turbo decoding and equalization method includes receiving a plurality of turbo coded, orthogonal frequency division modulation (OFDM) symbols, demodulating, turbo decision feedback equalizing, and turbo decoding the received plurality of OFDM symbols, generating replicas of the transmitted plurality of OFDM symbols, channel, and intersymbol interference, buffering of the received plurality of OFDM symbols, and ISI subtraction in the time domain or the frequency domain, and summing the generated replicas with echo replicas in time domain or the frequency domain to perform echo cancellation.

FIG. 12 is a flowchart representations of a process 2100 for turbo decoding for DSL. At 2102, in a synchronization buffer, encoded data from a constellation demapper and. trellis decoder is received. At 2104, an output of the synchronization buffer is convolutionally deinterleaved. At 2106, the deinterleaved output of the synchronization buffer is decoded. At 2108, soft or hard decoded bits are generated from the &interleaved output.

It will be appreciated that techniques are disclosed for turbo decoding OFDM symbols. It wilt further be appreciated that techniques for combined turbo decoding and equalization are disclosed. The disclosed techniques can be implemented in receivers that receive wired or wireless OFDM signals and produce data and control bits by decoding the received signals.

The disclosed and other embodiments and the functional operations and modules described in this document can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this document and their structural equivalents, or in combinations of one or more of them. The disclosed and other embodiments can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a. computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more them. The term “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. A propagated signal is an artificially generated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode information for transmission to suitable receiver apparatus.

A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system, A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.

The processes and logic flows described in this document can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).

Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random access memory or both. The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks. However, a computer need not have such devices, Computer readable media suitable for storing computer program instructions and data include all forms of non volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto optical disks; and CD ROM and DVD-ROM disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

While this document contains many specifics, these should not be construed as limitations on the scope of an invention that is claimed or of what may be claimed, but rather as descriptions of features specific to particular embodiments. Certain features that are described in this document in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable sub-combination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a sub-combination or a variation of a sub-combination. Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results.

Only a few examples and implementations are disclosed. Variations, modifications, and enhancements to the described examples and implementations and other implementations can be made based on what is disclosed.

Claims

1. A turbo decoding method, comprising:

receiving a plurality of orthogonal frequency division multiplexing (OFDM) symbols;

generating replicas of the received plurality of OFDM symbols to reduce a peak to average ratio; and

summing the generated replicas with echo replicas in frequency domain to perform echo cancellation.

2. The method of claim 1, further comprising:

operating a constellation mapper-demapper to process variable size constellations.

3. The method of claim 1, further comprising:

buffering a number of received OFDM symbols so that the number is greater than or equal to an interleaving within a concatenated code used to error code the received plurality of OFDM symbols.

4. The method of claim 1, further including:

operating a decision feedback equalizer to receive hard or soft re-encoded data from two different classes of data.

5. The method of claim 4, wherein the two different classes of data comprise a first class of data comprising a synchronization symbol and a second class of data comprising output of an outer decoder of turbo decoding.

6. An apparatus for performing turbo decoding of data comprising:

a processor;

a module that receives a plurality of orthogonal frequency multiplexing (OFDM) symbols;

a module that generates replicas of the received plurality of OFDM symbols to reduce a peak to average ratio; and

a module that sums the generated replicas with echo replicas in frequency domain to perform echo cancellation.

7. The apparatus of claim 6, further comprising:

a constellation mapper-demapper to process variable size constellations.

8. A method of decoding received symbols in an orthogonal frequency division multiplexing (OFDM) system, comprising:

receiving, in a synchronization buffer, encoded data from a constellation demapper and trellis decoder;

convolutionally deinterleaving an output of the synchronization buffer;

decoding the deinterleaved output of the synchronization buffer; and

generating soft or hard decoded bits from the deinterleaved output,

9. The method of claim 8, wherein the generating hard coded bits is an iterative process in which for all iterations except a last iteration, a buffer is used to extract a number of bits from an incoming frame.

10. An apparatus for decoding received symbols in an orthogonal frequency division multiplexing (OFDM) system, comprising:

a synchronization buffer;

a module that receives, in the synchronization buffer, encoded data from a constellation demapper and trellis decoder;

a module that convolutionally deinterleaves an output of the synchronization buffer;

a module that decodes the deinterleaved output of the synchronization buffer; and

a module that generates soft or hard decoded bits from the deinterleaved output.

11. The apparatus of claim 10, wherein the module that generates hard coded bits performs an iterative process in which for all iterations except a last iteration, a buffer is used to extract a number of bits from an incoming frame.

12. A combined turbo decoding and equalization method, comprising:

receiving a plurality of turbo coded, orthogonal frequency division modulation (OFDM) symbols;

demodulating, turbo decision feedback equalizing, and turbo decoding the received plurality of OFDM symbols;

generating replicas of the transmitted plurality of OFDM symbols, channel, and intersymbol interference;

buffering of the received plurality of OFDM symbols, and ISI subtraction in the time domain or the frequency domain; and

summing the generated replicas with echo replicas in time domain or the frequency domain to perform echo cancellation.

13. The method of claim 12, wherein the least significant bits of constellations are both block coded and trellis coded, and the most significant bits block coded only.

14. The method of claim 12, further including:

turbo decoding serially concatenated TCM and Reed Solomon block codes, with convolutional interleaving.

15. An apparatus for performing combined turbo decoding and equalization, comprising:

a module that receives a plurality of turbo coded, orthogonal frequency division modulation (OFDM) symbols;

a module that demodulates, turbo decision feedback equalizing, and turbo decoding the received plurality of OFDM symbols;

a module that generates replicas of the transmitted plurality of OFDM symbols, channel, and intersymbol interference;

a buffer that buffers of the received plurality of OFDM symbols, and ISI subtraction in the time domain or the frequency domain; and

a module that sums the generated replicas with echo replicas in time domain or the frequency domain to perform echo cancellation.

16. The apparatus of claim 15, wherein the least significant bits of constellations are both block coded and trellis coded, and the most significant bits block coded only.

17. The apparatus of claim 15, further including:

a module that turbo decodes serially concatenated TCM and Reed Solomon block codes, with convolutional interleaving.