SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a superlattice buffer layer formed on a substrate. An upper buffer layer is formed on the superlattice buffer layer. A first semiconductor layer is formed by a nitride semiconductor on the upper busier layer. A second semiconductor layer is formed by a nitride semiconductor on the first semiconductor layer. A gate electrode, a source electrode and a drain electrode are formed on the second semiconductor layer. The superlattice buffer layer is formed by cyclically laminating nitride semiconductor films having different composition. The upper buffer layer is formed by a nitride semiconductor material having a band gap wider than a band gap of the first semiconductor layer and doped with an impurity element that causes a depth of an acceptor level to be greater than or equal to 0.5 eV.
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This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2013-194413, filed on Sep. 19, 2013, the entire contents of which are incorporated herein by reference.
FIELDThe embodiments discussed herein are directed to a semiconductor device and a manufacturing method of a semiconductor device.
BACKGROUNDA nitride semiconductor has features such as a high saturation electron speed, a wide hand gap, etc. Thus, it is considered to apply the nitride semiconductor to semiconductor devices having a high withstand voltage and a high output. For example, the bad gap of GaN, which is a nitride semiconductor, is 3.4 eV, which is higher than the band gap of Si (1.1 eV) and the band gap of GaAs (1.4 eV). Thus, GaN has a high breakdown electric field strength. Accordingly, the nitride semiconductor such as GaN or the like is extremely hopeful as a material to fabricate a power supply semiconductor device providing a high-voltage operation and a high-output.
As a semiconductor device using a nitride semiconductor, there are many reports with respect to a filed effect transistor, particularly, a high electron mobility transistor (HEMT). For example, from among GaN-HEMTs, an HEMT made of AlGaN/GaN attracts attention wherein GaN is used as an electron transit layer and AlGaN is used as an electron supply layer. In the HEMT made of AlGaN/GaN, a strain is generated in AlGaN due to a difference in lattice constant between GaN and AlGaN. Thereby, a highly concentrated two-dimensional electron gas (2DEG) can be obtained due to a piezoelectric polarization caused by such a strain and an intrinsic polarization difference. Thus, the AlGaN/GaN-HEMT is hopeful as a high-efficiency switch device and a high withstand voltage power device for electric vehicle.
In order to reduce a manufacturing cost of such a semiconductor device using a nitride semiconductor, a study for crystal growth on an Si substrate has been conducted. However, it is difficult to increase a withstand voltage because the Si substrate has a low insulation property. Patent Document 1 discloses a method of reducing a leak current to improve a withstand, voltage by forming a thick superlattice buffer layer of a strained-layer superlattice (SLS) structure on an Si substrate.
The following patent documents discloses a background art.
Patent Document 1: Japanese Patent No. 5179635
Patent Document 2: Japanese Laid-Open Patent Application No. 2012-160608
The nuclear formation layer 911 is formed by AlN. The buffer layer 912 is formed by AlGaN. The superlattice buffer layer 813 is formed by alternately laminating an AlN film and a GaN film for a predetermined number of periods or cycles. The electron transit layer 931 is formed by i-GaN, and the electron supply layer 932 is formed, by n-AlGaN. Thereby, a two-dimensional electron gas (2DEG) 931a is created in the electron transit layer 931 near the interface between the electron transit layer 931 and the electron supply layer 932.
If 2DEG is created at the interface between the superlattice duffer layer 913 and the electron transit layer 931 in the semiconductor device illustrated in
Additionally, in order to improve a withstand voltage, there is a method of forming an AlGaN layer 920 into which Mg is doped between the superlattice buffer layer 913 and the electron transit layer 931 as illustrated in
Thus, it is desired to provide a semiconductor device having a superlattice buffer layer and a nitride semiconductor formed on a silicon substrate in which a leak current is reduced.
SUMMARYThere is provided according to an aspect of the embodiments, a semiconductor device including: a superlattice buffer layer formed on a substrate; an upper buffer layer formed on the superlattice buffer layer; a first semiconductor layer formed by a nitride semiconductor on the upper buffer layer; a second semiconductor layer formed by a nitride semiconductor on the first semiconductor layer; and a gate electrode, a source electrode and a drain electrode formed on the second semiconductor layer, wherein the superlattice buffer layer is formed by cyclically laminating nitride semiconductor films having different compositions, and the upper buffer layer is formed by a nitride semiconductor material having a band gap wider than a band gap of the first semiconductor layer and doped with an impurity element that causes a depth of an acceptor level to be greater than or equal to 0.5 eV.
There is provided according to another aspect of the embodiments a manufacturing method of a semiconductor device, including: forming a superlattice buffer laver on a substrate; forming an upper buffer layer on the superlattice buffer layer; forming a first semiconductor layer by a nitride semiconductor on the upper buffer layer. A second semiconductor layer is formed by a nitride semiconductor on said first semiconductor layer. A gate electrode, a source electrode and a drain electrode are formed on said second semiconductor layer. The superlattice buffer layer is formed by alternately and cyclically laminating nitride semiconductor films having different compositions, and the upper buffer layer is formed by a nitride semiconductor material having a band gap wider than a band gap of the first semiconductor layer and doped with an impurity element that causes a depth of an acceptor level to be greater than or equal to 0.5 eV.
The object and advantages of the embodiments will be realized said attained by means of the elements and combinations particularly pointed out in the appended claims.
It is to be understood that both the foregoing general description and the following detailed description are exemplary explanatory only and are not restrictive of the invention as claimed.
A description will now be given of embodiments with reference to the drawings. In the drawings, the same parts are given the same reference number, and descriptions thereof will be omitted.
First Embodiment(Semiconductor Device)
A description will be given of a semiconductor device according to a first embodiment. The semiconductor device according to the first, embodiment includes a silicon substrate 10 and a nuclear formation layer 11, an lower buffer layer 12, a superlattice buffer layer 13, an upper buffer layer 20, an electron transit layer 31 and an electron supply 1 layer 32 sequentially laminated on the silicon substrate in that order. A gate electrode, a source electrode 42 and a drain electrode 43 are formed on the electron supply layer 32.
The nuclear formation layer 11 is formed by AlN. The lower buffer layer 12 is formed by AlGaN. The superlattice buffer layer 13 is formed by alternately laminating an AlN film and a GaN film for a predetermined number of cycles. The electron transit layer 31 is formed by i-GaN. The electron supply layer 32 is formed by n-AlGaN. Thereby, in the electron transit layer 31, a 2DEG 31a is created near the interface between the electron transit layer 31 and the electron supply layer 32. In the semiconductor device according to the present embodiment, a substrate formed of SiC, sapphire, etc., may be used instead of the silicon substrate 10, which is formed of silicon. Additionally, in the present embodiment, the electron transit layer 31 may be referred to as a first semiconductor layer and the electron supply layer 32 may be referred to as a second semiconductor layer.
In the present embodiment, the upper buffer layer 20 is formed by AlGaN doped with Fe as an impurity element at a concentration of 5×1018 cm−3. By doping Fe into AlGaN, a deep acceptor level is formed as illustrated in
As mentioned above, the upper buffer layer formed by AlGaN doped with Fe has a deep acceptor level, an activation rate is low and electron holes are hardly generated. Accordingly, an increase in a leak current in a transverse direction parallel to the silicon substrate 10 can be suppressed. Further, if Fe doped in the upper buffer layer 20 diffuses during a neat treatment process or a film deposition process, an activation rate is low and electron holes are hardly generated. Thereby, an increase in a leak current flowing in a transverse direction is suppressed, and an increase in an on-resistance can also be suppressed in the electron transit layer 31.
The following table 1 indicates a relationship between an impurity element doped into the upper buffer layer 20 and an acceptor level. In order to suppress generation of holes in the vicinity of the interface between the super lattice buffer layer 13 and the upper buffer layer 20, as for an impurity element doped into the upper buffer layer 20 is preferably an element which caused a depth of an acceptor level to be greater than or equal to 0.5 eV. Thus, from this point of view and based, on the table 1, one of Be, C, Fe, Cd, Li, etc., is preferably used as an impurity element to be doped. It should be noted that Mg and Zn cause an acceptor level to be smaller than 0.5 eV, which is a shallow acceptor level. Thus, Mg and Zn are not preferably used as an impurity element because there may be a case where holes are generated in the vicinity of the superlattice buffer layer 13 and the upper buffer layer 20.
(Manufacturing Method of Semiconductor Device)
A description will be given, with reference to
First, as illustrated in
Specifically, the nuclear formation layer 11, the lower buffer layer 12, the superlattice buffer layer 13, the upper buffer layer 20, the electron transit layer 31, the spacer layer 33, the electron supply layer 32 and the cap layer 34 are sequentially formed on the silicon substrate 10 by MOVPE. When forming those layers, trimethyl aluminum (TMA) is used as an Al source gas, trimethyl gallium (TMG) is used as a Ga source gas, and ammonium (NH3) is uses as an N source gas. Additionally, when doping Fe as an impurity element into the upper buffer layer 20, ferrocene (Cp2Fe) is used, and when doping Si serving as an n-type impurity element monosilane (SiH4) is used. A growth pressure when forming a nitride semiconductor layer by MOVPE is 5 kPa to 100 kPa. A substrate temperature when growing the nitride semiconductor is 900° C. to 1200° C.
The nuclear formation layer 11 is formed by AlN by supplying TMA and NH3 as source gases. The lower buffer layer 12 is formed by Al0.2Ga0.8N having a film thickness of about 50 nm formed, by TMG, TMA and NH3 as source gases. The superlattice buffer layer 12 is formed by alternately laminating an AlN film having a film thickness of about 2 nm and a GaN film having a film thickness of about 20 nm for 100 cycles, when forming the superlattice layer 13, TMG and NH3 and TMA and NH3 are alternately supplied. It should be noted that when forming the superlattice buffer layer 13, Fe as an impurity element can be doped at a concentration of about 5×1018 cm−3.
The upper buffer layer 20 is formed by Al0.1Ga0.9N having a film thickness of about 100 nm by supplying TMG and NH3 as source gases. The upper buffer layer is doped with Fe as an impurity element at a concentration of about 5×1018 cm−3. Fe doped into the upper buffer layer 20 can be doped by supplying a predetermined amount of Cp2Fe when forming the upper buffer layer 20.
The electron transit layer 31 is formed by GaN having a film thickness of about 2 μm by supplying TMG and NH3 as source gases. The spacer layer 33 is formed by Al0.2Ga0.8N having a film thickness of about 5 nm by supplying TMG, TMA, NH3 and NH3 as source gases. The electron supply layer 32 is formed by n-AlGaN by supplying TMG, TMA, NH3 and SiH4 as source gases. That is, Al0.2Ga0.8N having a film thickness of about 30 nm is formed and doped with Si as an impurity element at a concentration of about 5×1019 cm−3. The cap layer 34 is formed by n-GaN by supplying TMG, NH3 and SiH4 as source gases. That is, GaN having a film thickness of about 10 nm is formed and doped with Si as an impurity element, at a concentration of about 5×1018 cm−3.
The superlattice buffer layer 13 may be a layer other than the layer formed by laminating AlN (2 nm)/GaN (20 nm) as mentioned above. For example, the superlattice buffer layer may be a layer formed by laminating Al0.9Ga0.1N (10 nm)/Al0.1Ga0.9N (20 nm) or AlN (2 nm)/Al0.8In0.2N (20 nm). In the present embodiment, if an outermost surface of the superlattice buffer layer 12 is AlxInyGa(1−x−y)N, x may be smaller than 0.5 (x>0.5) and a film thickness may be smaller than or equal to 20 nm. Additionally, a number of cycles in the superlattice buffer layer 13 is preferably 20 cycles or more, and more preferably, 50 cycles or more. The cycle may be nonuniform, and may be divided into cyclic structures having different cycles with an. intermediate layer interposed therebetween.
In the present embodiment, as illustrated in
Thereafter, a photoresist is applied onto the cap layer 34, and a resist pattern (not illustrated in the figure) having an opening at a portion where an element separation area is formed is formed by performing exposure and development by an exposure apparatus. Thereafter, the element separation area (not illustrated in the figure) is formed by performing dry-etching using a chlorine gas or performing ion implantation of ion such as Ar in the opening of the resist pattern. Thereafter, the resist pattern is removed by an organic solvent or the like.
Then, as illustrated in
Then, as illustrated in
Then, as illustrated in
According to the above-mentioned processes, the semiconductor device according to the present embodiment is manufactured. It should be noted that the structure of each of the above-mentioned gate electrode 41, source electrode 42 and drain electrode 43 is more an example, and other multiple metal lamination films may be formed or a single layer metal film may be formed. Additionally, the gate electrode 41, source electrode 42 and drain electrode 43 may be formed by a method other than lift off. If an ohmic contact can be obtained in the source electrode 42 and the drain electrode 43 after film deposition, there is no need to perform heat treatment. Additionally, after forming the gate electrode 41, heat treatment may be performed if necessary.
Although the above-mentioned semiconductor device has a Schottky-type gate structure, the semiconductor device according to the present embodiment may be a semiconductor device having a MIS-type gated electrode structure having a gate insulation film. Additionally, the semiconductor device according to the present embodiment may be a semiconductor device having a structure in which a gate recess is formed by removing a nitride semiconductor layer directly under a gate electrode and the gate electrode is formed in the gate recess.
If the impurity element doped into the upper buffer layer 20 is C, the upper buffer layer 20 may be formed by adjusting a film deposition condition of MOVPE without supplying a gas to dope the impurity element. For example, the upper buffer layer 20 may be formed at a low substrate temperature. Specifically, the upper buffer layer 20 may be grown by MOVPE under a film deposition condition in which a substrate temperature is lower than or equal to 1050° C. and a pressure in the chamber is lower than or equal to 20 kPa. By causing a growth under such a condition, C component contained in a source gas is taken into the film, which results in automatic doping of C
Second EmbodimentA description will be given below of a semiconductor device according to a second embodiment. As illustrated in
The nuclear formation layer 11 is formed by AlN. The lower buffer layer 12 is formed by AlGaN. The superlattice buffer layer 13 is formed, by alternately laminating an AlN film and a GaN film for a predetermined number of cycles. The electron transit layer 31 is formed by i-GaN. The electron supply layer 32 is formed by n-AlGaN. Thereby, in the electron transit layer 31, a 2DEG 31a is created near the interface between the electron transit layer 31 and the electron supply layer 32.
In the present embodiment, the upper buffer layer 120 is formed by AlGaN doped with Fe as an impurity element. Thereby, generation of holes is suppressed in the vicinity of the interface between the superlattice buffer layer 13 and the upper buffer layer 120.
In the present embodiment, as illustrated in
In the present embodiment, if the upper buffer layer 120 is represented by AlzGa1−zN, the upper buffer layer 120 is formed in a composition gradient manner so that the Al composition ratio gradually decreases from the side of the silicon substrate 10 toward the side of the electron transit layer 31 within a range of 0<z<1.0, more preferably, a range of 0<z≦0.5. Additionally, in the present embodiment, Fe as an impurity element is uniformly doped so that a concentration of Fe is about 5×1018 cm−3.
In a manufacturing process of the semiconductor device according to the present embodiment, when forming the upper buffer layer 120, a supply amount of TMA is gradually reduced as the growth of the upper buffer layer 120 progresses,
The semiconductor device according to the present embodiment may have a structure, as illustrated in
Configuration and arrangement of the semiconductor device according to the present embodiment other than the above-mentioned configuration and arrangement are the same as the configuration and arrangement of the semiconductor device according to the first embodiment.
Third EmbodimentA description will be given below of a semiconductor device according to a third embodiment. As illustrated in
The nuclear formation layer 11 is formed by AlN. The lower buffer layer 12 is formed by AlGaN. The superlattice buffer layer 13 is formed by alternately lamina ting an AlN film and a GaN film for a predetermined number of cycles. The electron transit layer 31 is formed by i-GaN. The electron supply layer 32 is formed by n-AlGaN. Thereby, in the electron transit layer 31, a 2DEG 31a is created, near the interface between the electron transit layer 31 and the electron supply layer 32.
In the present embodiment, the upper buffer layer 220 is formed by Al0.2Ga0.8N doped with Fe as an impurity element. Thereby, generation of holes is suppressed in the vicinity of the interface between the superlattice buffer layer 13 and the upper buffer layer 220.
In the present embodiment, as illustrated in
In the present embodiment, the upper buffer layer 220 is formed so that a concentration of an impurity element such as Fe or the like decreases from the side of the silicon substrate 10 toward the side of the electron transit layer 31 within a range of greater than or equal to 1×1017 cm−3 and smaller than or equal to 1×1020 cm−3. In the present embodiment, the upper buffer layer 220 is formed in a composition gradient manner so that an Al composition ratio gradually decreases from a vicinity of the interface between the upper buffer layer 220 and the superlattice buffer layer 13 toward a vicinity of the interface between the upper buffer layer 220 and the electron transit layer 31.
In a manufacturing process of the semiconductor device according to the present embodiment, when forming the upper buffer layer 220, a supply amount of Cp2Fe is gradually reduced as the growth of the upper buffer layer 220 progresses.
The semiconductor device according to the present embodiment may have a structure, as illustrated in
Configuration and arrangement of the semiconductor device according to the present embodiment other than the above-mentioned configuration and arrangement are the same as the configuration and arrangement of the semiconductor device according to the first embodiment.
Fourth EmbodimentA description will be given below of a semiconductor device according to a fourth embodiment. As illustrated in
The nuclear formation layer 11 is formed by AlN. The lower buffer layer 12 is formed by AlGaN. The superlattice buffer layer 13 is formed by alternately laminating an AlN film and a GaN film for a predetermined cycles. The electron transit layer 31 is formed by i-GaN. The electron supply layer 32 is formed by n-AlGaN. Thereby, in the electron transit layer 31, a 2DEG 31a is created near the interface between the electron transit layer 31 and the electron supply layer 32.
In the present embodiment, as illustrated in
In the present embodiment, if each of the first and second upper buffer layers 321 and 322 is represented by AlzGa1−zN, each of the first and second upper buffer layers 321 and 322 is formed so that a value of z falls within a range of 0<z<1.0, more preferably within a range of 0z≦0.5. Additionally, the Al composition ratio of the first upper buffer layer 321 is higher than the Al composition ratio of the second upper buffer layer 322. Thereby, the band gap in the second upper buffer layer 322 is narrower than the band grip in the first upper buffer layer 321. Additionally, in the present embodiment, each of the first and second upper buffer layers 321 and 322 is formed so that a concentration of Fe as an impurity element fails within a range of greater than or equal to 1×1017 cm−3 and smaller than or equal to 1×1020 cm−3.
In a manufacturing process of the semiconductor device according to the present embodiment, a supply amount of TMA when forming the second upper buffer layer 322 is reduced to be smaller than a supply amount of TMA when forming the first upper buffer layer 321.
The semiconductor device according to the present embodiment may have a structure, as illustrated in
Configuration and arrangement of the semiconductor device according to the present embodiment other than the above-mentioned configuration and arrangement are the same as the configuration and arrangement of she semiconductor device according to the first embodiment.
Fifth EmbodimentA description will be given below of a semiconductor device according to a fifth embodiment. As illustrated in
The nuclear formation layer 11 is formed by AlN. The lower buffer layer 12 is formed by AlGaN. The superlattice buffer layer 13 is formed by alternately laminating an AlN film and a GaN film for a predetermined number of cycles. The electron transit layer 31 is formed by i-GaN. The electron supply layer 32 is formed by n-AlGaN. Thereby, in the electron transit layer 31, a 2DEG 31a is created near the interface between the electron transit layer 31 and the electron supply layer 32.
In the present embodiment, as illustrated in
In the present embodiment, if each of the first and second upper buffer layers 331 and 332 is represented by AzGa1−zN, each of the first, and second upper buffer layers 331 and 332 is formed so that a value of z falls within a range of 0<z<1.0, more preferably within a range of O<z≦0.5. Additionally, the Al composition ratio of the first upper buffer layer 331 is higher than tire Al composition ratio of the second upper buffer layer 332. Additionally, in the present embodiment, each of the first and second upper buffer layers 331 and 332 is formed so that a concentration of Fe as an impurity element fails within a range of greater than or equal to 1×1017 cm−3 and smaller than or equal to 1×1020 cm−3. A concentration or an impurity element such as Fe or the like in the first upper buffer layer 331 is higher than a concentration of an impurity element such as Fe or the like in the second upper buffer layer 332.
In a manufacturing process of the semiconductor device according to the present embodiment, a supply amount of TMA and a supply amount of Cp2Fe when forming the second upper buffer layer 332 is reduced to be smaller than a supply amount of TMA and a supply amount of Cp2Fe when forming the first upper buffer layer 321.
The semiconductor device according to the present embodiment may have a structure, as illustrated in
Although the description has been given of the case where the upper buffer layer includes two AlGaN layers having different composition ratios and different concentrations of an impurity element such as Fe or the like, the upper buffer layer may be formed by three or more AlGaN films having different composition ratios and different concentrations of an impurity element such as Fe or the like.
Configuration and arrangement of the semiconductor device according to the present embodiment other than the above-mentioned configuration and arrangement are the same as the configuration and arrangement of the semiconductor device according to the first embodiment.
Sixth EmbodimentA description will be given below of a semiconductor device according to a sixth embodiment. In the above-mentioned semiconductor device, the leak current flowing in a vertical direction to the silicon substrate can be suppressed by thickening the superlattice buffer layer. However, if the superlattice buffer layer is thick, a warp of the silicon substrate becomes large. A description is given below of a result of consideration of a case where the superlattice buffer layer 13 is formed by alternately laminating the AlN layer 13a (first superlattice formation layer) and the AlGaN layer 13b (second superlattice formation layer) as illustrated in
A description will be given below, with reference to
As mentioned above, when the film thickness of the AlN layer 13a is varied, a warp of the silicon substrate 10 and a withstand voltage are in a trade-off relation. Based on the relationship between a warp of the silicon substrate 10 and the withstand voltage, it is preferable that the film thickness of the AlN layer 13a (first superlattice formation layer) in the superlattice buffer layer 13 is greater than or equal to 0.8 nm and smaller than or equal to 2.0 nm.
A description will be given, with reference to
As illustrated in
As mentioned above, based on the relationship between a warp of the silicon substrate 10 and a withstand voltage, it is preferable that the concentration of C, which is an impurity element doped into the AlN layer 13a (first superlattice formation layer) in the superlattice buffer layer 13, is greater than or equal to 1×1017 cm−3 and smaller than or equal to 1×1020 cm−3.
A description will be given below, with reference to
As illustrated in
Thus, in the present embodiment, in the case where the film thickness of the AlN layer 13a in the superlattice buffer layer 13 is greater than or equal to 0.8 nm and smaller than or equal to 2.0 nm, if the impurity element doped into the AlN layer 13a is C, the concentration of C is greater than or equal to 1×10∫cm−3 and smaller than or equal to 1×1020 cm−3. Moreover, in the case where the film thickness of the AlN layer 13a in the superlattice buffer layer 13 is greater than or equal to 0.8 nm and smaller than or equal to 2.0 nm, if the impurity element doped into the AlN layer 13a is Fe, the concentration of Fe is smaller than or equal to 1×1019 cm−3. The semiconductor device according to the present embodiment includes the superlattice buffer layer 13 having the above-mentioned AlN layer 13a.
In the present embodiment, the first superlattice formation layer serving as the AlN layer 13a may be formed by AlxGa1−xN, and the value of x may be greater than or equal to 0.5 and smaller than or equal to 1. The second superlattice formation layer serving as the AlGaN layer 13b may be formed by AlyGa1−yN, and the value of y may be greater than 0 and smaller than 0.5. Accordingly, a relationship x>y is satisfied in true superlattice buffer layer 13. More preferably, the first superlattice formation layer is formed by AlN. As the impurity element serving as an acceptor doped into the superlattice buffer layer 13b, Mg, Zn, Be, Cd, Li, etc., other than C and Fe may be used.
(Manufacturing Method of Semiconductor Device)
A description will now be given, with reference to
First, as illustrated in
The nuclear formation layer 11 is formed by causing growth in a condition in which a substrate temperature is about 1000° C., a V/III ratio is 1000 to 2000, and a pressure in a chamber of an MOCVD apparatus is about 5 kPa. The lower buffer layer 12 is formed by causing growth in a condition in which a substrate temperature is about 1000° C., a V/III ratio is 100 to 300, and a pressure in a chamber of an MOCVD apparatus is about 3 kPa. In the present embodiment, it is preferable to cause a growth of the nuclear formation layer 11 under a condition with which an amount of C taken into the film is small. As for the lower buffer layer 12, in order to achieve flatness, it is preferable to cause a growth in a condition in which the V/III ratio is decreased.
Then, as illustrated in
According to the present embodiment, C is used as an impurity element serving as an acceptor doped into the AlN layer 13a. A miring amount of C is adjusted by changing a V/III ratio. Specifically, in order to set the concentration of G in the AlN layer 13a, the AlN layer 13a is caused to grow in a condition in which the V/III ratio is about 600. It should be noted that the impurity concentration in the AlN layer 13a is preferably greater than or equal to 1×10∫cm−3 and smaller than or equal to 1×1020 cm−3.
Then, as illustrated in
Then, as illustrated in
Thereafter, a photoresist is applied on the electron supply layer 32 again, and an exposure and development is performed by an exposure apparatus so as to form a resist pattern (not illustrated in the figure) having an opening in an area where the gate electrode 41 is to be formed. Thereafter, a metal lamination film made of a Ni/Au film is formed by a vacuum deposition. Then, the metal lamination film formed on the resist pattern is removed together with the resist pattern by immersing the resist pattern, into an organic solvent or the like. Thereby, the gate 41 is formed by a remaining portion of the metal lamination film. It should be noted that in the metal lamination film made of Ni/Au film, the film thickness of the Ni film is about 50 nm and the film, thickness of the An film is about 300 nm.
The semiconductor device according to the present embodiment can be manufactured by the above-mentioned processes.
It should be noted that, in the present embodiment, when forming the AlN layer 13a in the superlattice buffer layer 13, Fe may be doped as an impurity element serving as an acceptor. In such a case, the concentration of Fe doped is preferably smaller than or equal to 1×1019 cm−3. For Example, the concentration of Fe is preferably 1×1018 cm−3. As a source gas when doping Fe, for example, ferrocene (Cp2Fe) is used. Manufacturing processes other than the above-mentioned processes are the same as the manufacturing processes of the semiconductor device according to the first embodiment.
Seventh EmbodimentA description writ be given below of a semiconductor device, power supply device and high-frequency amplifier according to a seventh embodiment.
The semiconductor device according to the seventh embodiment includes one of the semiconductor devices according to the first through sixth embodiments that is incorporated into a discrete package. The discrete-packaged semiconductor device is described with reference to
First, an HEMT semiconductor chip 410 of GaN semiconductor material is formed by one of the semiconductor devices according to the first through sixth embodiments. Then, the semiconductor chip 410 is fixed on a lead frame 420 by a die-attachment agent 430 such as solder or the like. The semiconductor chip 410 corresponds to one of the semiconductor device according to the first through sixth embodiments.
Then, a gate electrode 411 is connected to a gate lead 421 by a bonding wire 431, a source electrode 412 is connected to a source lead 422 by a bonding wire 432 and a drain electrode 413 is connected to a drain lead 423 by a bonding wire 433. The bonding wires 431, 432 and 433 are made of a metal material such as Al or the like. In the present embodiment, the gate electrode 411 is a gate electrode pad, which is connected to the gun electrode 41 of one of the semiconductor devices according to the first through fourth embodiments. The source electrode 412 is a source electrode pad, which is connected to the source electrode 42 of one of the semiconductor devices according to the first through sixth embodiments. The drain electrode 413 is a drain electrode pad, which is connected to the drain electrode 43 of one of the semiconductor devices according to the first through sixth embodiments.
Then, the semiconductor chip 410 and the lead frame 420 are encapsulated by a mold resin 440 using a transfer mold method. As mentioned, above, the discrete-packaged semiconductor device, which is an HEMT using GaN semiconductor material, is fabricated.
A description is given of a power supply device and a high-frequency amplifier according to the seventh embodiment. The power supply device and the high-frequency amplifier according to the seventh embodiment incorporate therein one of the semiconductor devices according to the first through sixth embodiments.
First, a description is given, with reference to
A description is given below, with reference to
All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the principles of the invention and the concepts contributed by the inventor to furthering the art, and are to be construed a being without limitation to such specifically recited examples and conditions, nor does the organization of such examples in the specification relates to a showing of the superiority and inferiority of the invention. Although the embodiment(s) of the present invention(s) has(have) been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.
Claims
1. A semiconductor device comprising:
- a superlattice buffer layer formed on a substrate;
- an upper buffer layer formed on said superlattice buffer layer;
- a first semiconductor layer formed by a nitride semiconductor on said upper buffer layer;
- a second semiconductor layer formed by a nitride semiconductor on said first semiconductor layer; and
- a gate electrode, a source electrode and a drain electrode formed on said second semiconductor layer,
- wherein said superlattice buffer layer is formed by cyclically laminating nitride semiconductor films having different compositions, and
- said upper buffer layer is formed by a nitride semiconductor material having a band gap wider than a band gap of said first semiconductor layer and doped with an impurity element that causes a depth of an acceptor level to be greater than or equal to 0.5 eV.
2. The semiconductor device as claimed in claim 1, wherein a concentration of said impurity element of said upper buffer layer decreases from a side of said substrate toward a side of said first semiconductor layer.
3. The semiconductor device as claimed in claim 1, wherein a band gap of said upper buffer layer narrows from a side of said substrate toward a side of said first semiconductor layer.
4. The semiconductor device as claimed in claim 1, wherein said upper buffer layer includes a first upper buffer layer and a second upper buffer layer, said first upper buffer layer being formed on a side of said substrate and second ripper layer being formed on said first semiconductor side, a band gap of said second upper buffer layer is narrower than a bad gap of said first buffer layer.
5. The semiconductor device as claimed in claim 1, wherein said upper buffer layer includes a first upper buffer layer and a second upper buffer layer, said first upper buffer layer being formed on a side of said substrate and second upper layer being formed on said first semiconductor side, a concentration of said impurity element of said second upper buffer layer is lower than a concentration of said impurity element of said first buffer layer.
6. The semiconductor device as claimed in claim 1, wherein said upper buffer layer is formed by one of GaN, AlN and InN or a mixed crystal containing two or more of GaN, AlN and InN.
7. The semiconductor device as claimed in claim 1, wherein said upper buffer layer is formed by a material co retaining AlGaN.
8. The semiconductor device as a claimed in claim 3, wherein said upper buffer layer is formed by a material containing AlGaN, and an Al composition ratio of said upper buffer layer decreases from said side of said substrate toward said side of said first semiconductor layer.
9. The semiconductor device as claimed in claim 4, wherein each of said upper buffer layer and said second upper buffer layer is formed by a material containing AlGaN, and an Al composition ratio of said second upper buffer layer is lower than an Al composition ratio of said first upper buffer layer.
10. The semiconductor device as claimed in claim 1, wherein a concentration of said impurity element in said upper buffer layer is higher than or equal to 1×1017 cm−3 and lower than or equal to 1×1020 cm−3.
11. The semiconductor device as claimed in claim 1, wherein said superlattice buffer layer is formed by alternately laminating a film containing AlN and a film containing GaN for a predetermined number of cycles.
12. The semiconductor device as claimed in claim 1, wherein said superlattice buffer layer is formed by alternately laminating a film containing AlN and a film containing AlGaN for a predetermined number of cycles.
13. The semiconductor device as claimed in claim 1, wherein said first semiconductor layer is formed by a material containing GaN.
14. The semiconductor device as claimed in claim 1, wherein said second semiconductor layer if formed by a material containing AlGaN.
15. The semiconductor device as claimed in claim 1, further comprising a third semiconductor layer between said first semiconductor layer and said second semiconductor layer, the third semiconductor layer being formed by a nitride semiconductor.
16. The semiconductor device as claimed in claim 15 wherein said third semiconductor layer is formed by a material containing AlGaN.
17. The semiconductor device as claimed in claim 1, further comprising a fourth semiconductor layer on said second semiconductor layer, said fourth semiconductor layer being formed by an n-type nitride semiconductor.
18. The semiconductor device as claimed in claim 17, wherein said fourth semiconductor layer is formed by GaN doped with an n-type impurity element.
19. The semiconductor device as claimed in claim 1, further comprising a lower buffer layer between said substrate and said superlattice buffer layer.
20. A manufacturing method of a semiconductor device, comprising:
- forming a superlattice buffer layer on a substrate;
- forming an upper buffer layer on said superlattice buffer layer;
- forming a first semiconductor layer by a nitride semiconductor on said upper buffer layer;
- forming a second semiconductor layer by a nitride semiconductor on said first semiconductor layer; and
- forming a gate electrode, a source electrode and a drain electrode on said second semiconductor layer,
- wherein said superlattice buffer layer is formed by alternately and cyclically laminating nitride semiconductor films having different compositions, and said upper buffer layer is formed by a nitride semiconductor material having a band gap wider than a band gap of said first semiconductor layer and doped with an impurity element that causes a depth of an acceptor level to be greater than or equal to 0.5 eV.
Type: Application
Filed: Aug 4, 2014
Publication Date: Mar 19, 2015
Applicant: FUJITSU LIMITED (Kawasaki)
Inventor: Atsushi Yamada (Isehara)
Application Number: 14/450,550
International Classification: H01L 29/778 (20060101); H01L 29/66 (20060101); H01L 29/205 (20060101); H01L 29/15 (20060101); H01L 29/20 (20060101);