FREQUENCY JITTERING CONTROL CIRCUIT AND METHOD FOR A PFM POWER SUPPLY
A frequency jittering control circuit for a PFM power supply includes a pulse frequency modulator to generate a frequency jittering control signal to switch a power switch to generate an output voltage. The frequency jittering control circuit jitters an input signal or an on-time or off-time of the pulse frequency modulator to jitter the switching frequency of the power switch to thereby improve EMI issue.
The present application is a Continuation of U.S. patent application Ser. No. 13/567,272, filed 6 Aug. 2012, which claims priority to Taiwan Patent Application No. 100130691, filed 26 Aug. 2011, and all the benefits accruing therefrom under 35 U.S.C. §119, the contents of which in its entirety are herein incorporated by reference.
FIELD OF THE INVENTIONThe present invention is related generally to a switching mode power supply (SMPS) and, more particularly, to pulse frequency modulation (PFM) power supply.
BACKGROUND OF THE INVENTIONElectro-magnetic interference (EMI) is known as a critical issue in designing a switching power supply, and is typically improved by spread-spectrum approaches that improve EMI by jittering the switching frequency of the power supply. Existing pulse width modulation (PWM) power supply devices, as those disclosed in U.S. Pat. Nos. 5,929,620, 6,249,876 and 7,289,582, mainly accomplish spectrum-spreading by jittering the frequency of the oscillator and in turn jittering the switching frequency of the power supply. A PFM power supply is a variable-frequency system whose switching frequency varies with its load, so is less subject to EMI. Such a PFM power supply, however, when having a consistent load, has its switching frequency held consistent, and thus still suffers from EMI. Nevertheless, it is infeasible in the PFM power supply to jitter the switching frequency by jittering the frequency of an oscillator that is absent.
SUMMARY OF THE INVENTIONAn objective of the present invention is to provide a frequency jittering control circuit and method for a PFM power supply.
According to the present invention, a frequency jittering control circuit for a PFM power supply comprises a pulse frequency modulator for generating a frequency jittering control signal to switch a power switch and generate an output voltage. In a peak-current mode PFM power supply, the pulse frequency modulator turns on the power switch by triggering the control signal responsive to a first signal, and turns off the power switch by terminating the control signal responsive to a second signal. The frequency jittering control circuit jitters the first or second signal to generate the frequency jittering control signal. In a quasi resonant mode PFM power supply, the pulse frequency modulator jitters the on or off time in order to generate the frequency jittering control signal. In a constant-on-time mode or constant-off-time mode PFM power supply, the pulse frequency modulator jitters the constant on-time or constant off-time in order to generate the frequency jittering control signal.
These and other objectives, features and advantages of the present invention will become apparent to those skilled in the art upon consideration of the following description of the preferred embodiments according to the present invention taken in conjunction with the accompanying drawings, in which:
A first embodiment according to the present invention shown in
The embodiment shown in
The jitter approach of
While the embodiment of
The approach to jittering the second signal S2 as shown in
The method for jittering the rising slope of the current sense signal Vcs_m as shown in
The embodiments of
The embodiment shown in
While the present invention has been described in conjunction with preferred embodiments thereof, it is evident that many alternatives, modifications and variations will be apparent to those skilled in the art. Accordingly, it is intended to embrace all such alternatives, modifications and variations that fall within the spirit and scope thereof as set forth in the appended claims.
Claims
1. A frequency jittering control circuit configured to operably generate a frequency jittering control signal to switch a power switch of a pulse frequency modulation power supply to generate an output voltage, the frequency jittering control circuit comprising:
- a pulse frequency modulator connected to the power switch, configured to operably trigger the control signal responsive to a first signal to turn on the power switch, and configured to operably terminate the control signal responsive to a second signal to turn off the power switch;
- a signal generator configured to operably provide a jittering signal according to a count value or a random number;
- a current detector configured to operably detect a current of the power switch to generate a current sense signal; and
- a comparator connected to the pulse frequency modulator, the signal generator and the current detector, and configured to operably compare the current sense signal with the jittering signal to generate the second signal.
2. The frequency jittering control circuit of claim 1, wherein the signal generator configures to operably adjust a reference signal by a ramp signal to generate the jittering signal, wherein the ramp signal is adjustable according to the count value or the random number.
3. The frequency jittering control circuit of claim 1, wherein the signal generator comprises:
- a first voltage-to-current converter configured to operably convert a reference voltage into a first current;
- a first current mirror connected to the first voltage-to-current converter, and configured to operably mirror the first current to generate a second current;
- a ramp generator configured to operably generate a ramp signal;
- a counter or a random number generator connected to the ramp generator, and configured to operably generate the count value or the random number to adjust the ramp signal;
- a second voltage-to-current converter connected to the ramp generator, and configured to operably convert the ramp signal into a third current;
- a second current mirror connected to the second voltage-to-current converter, and configured to operably mirror the third current to generate a fourth current; and
- a resistor connected to the first and second current mirrors, and configured to operably generate the jittering signal according to a sum of the second and fourth currents.
4. The frequency jittering control circuit of claim 1, wherein the signal generator comprises a variable resistor having a resistance adjustable according to the count value or the random number, and the jittering signal is adjusted according to a voltage across the variable resistor.
5. The frequency jittering control circuit of claim 1, wherein the signal generator comprises:
- a voltage-to-current converter configured to operably convert a reference voltage into a first current;
- a current mirror connected to the voltage-to-current converter, and configured to operably mirror the first current to generate a second current;
- a variable resistor connected to the current mirror, and configured to operably generate the jittering signal according to the second current; and
- a resistance controller connected to the variable resistor, and configured to operably adjust a resistance of the variable resistor according to the count value or the random number to adjust the jittering signal.
6. The frequency jittering control circuit of claim 5, wherein the resistance controller comprises a counter or a random number generator configured to operably generate the count value or the random number.
7. The frequency jittering control circuit of claim 1, further comprising:
- an output voltage feedback circuit configured to operably detect the output voltage to generate a feedback signal; and
- a comparator connected to the pulse frequency modulator and the output voltage feedback circuit, and configured to operably compare a reference voltage with the feedback signal to generate the first signal.
8. A frequency jittering control circuit configured to operably generate a frequency jittering control signal to switch a power switch of a pulse frequency modulation power supply to generate an output voltage, the frequency jittering control circuit comprising:
- an output voltage feedback circuit configured to operably detect the output voltage to generate a feedback signal;
- a comparator connected to the output voltage feedback circuit, and configured to operably compare the feedback signal with a reference voltage to generate a first signal;
- a one-shot circuit connected to the comparator, and configured to operably be triggered by the first signal to generate a pulse signal;
- a driver connected to the one-shot circuit, and configured to operably generate the control signal responsive to the pulse signal; and
- a constant time generator connected to the one-shot circuit, and configured to operably provide a jittering constant time according to a count value or a random number to determine a constant on time or a non-constant on time of the control signal.
9. The frequency jittering control circuit of claim 8, wherein the constant time generator comprises:
- a capacitor;
- a current source connected to the capacitor, and configured to operably provide a charging current to charge the capacitor to generate a charging voltage; and
- a second comparator connected to the capacitor, and configured to operably compare the charging voltage with a threshold voltage to determine the constant time;
- wherein at least one of the capacitor, the charging current and the threshold voltage is adjusted according to the count value or the random number to generate the jittering constant time.
10. A frequency jittering control method for generating a frequency jittering control signal to switch a power switch of a pulse frequency modulation power supply to generate an output voltage, the frequency jittering control method comprising steps of:
- A.) triggering the control signal responsive to a first signal to turn on the power switch;
- B.) terminating the control signal responsive to a second signal to turn off the power switch; and
- C.) jittering the first or second signal to jitter a switching frequency of the power switch;
- wherein the step C comprises steps of:
- detecting a current of the power switch to generate a current sense signal;
- comparing the current sense signal with a third signal to generate the second signal; and
- jittering the third signal according to a count value or a random number.
11. A frequency jittering control method for generating a frequency jittering control signal to switch a power switch of a pulse frequency modulation power supply to generate an output voltage, the frequency jittering control method comprising steps of:
- detecting the output voltage to generate a feedback signal;
- comparing the feedback signal with a reference voltage to generate a first signal;
- triggering a pulse signal responsive to the first signal; and
- jittering a pulse width of the pulse signal according to a count value or a random number to jitter a switching frequency of the power switch.
Type: Application
Filed: Sep 16, 2016
Publication Date: Jan 5, 2017
Inventors: Jiun-Hung PAN (Taipei City), Chien-Fu TANG (Hsinchu City), Isaac Y. CHEN (Jubei City)
Application Number: 15/267,454