NANOWIRE ARRAYS FOR NEUROTECHNOLOGY AND OTHER APPLICATIONS
The present invention generally relates to nanowires. In one aspect, the present invention is generally directed to systems and methods of individually addressing nanowires on a surface, e.g., that are substantially upstanding or vertically-oriented with respect to the surface. In some cases, one or more nanowires may be individually addressed using various integrated circuit (“IC”) technologies, such as CMOS. For example, the nanowires may form an array on top of an active CMOs integrated circuit.
Latest President and Fellows of Harvard College Patents:
- Systems and methods for parallel polarization analysis
- Nanopore-matched protein shuttle for molecular characterization
- Compositions of toehold primer duplexes and methods of use
- Compositions and methods for reducing tactile dysfunction, anxiety, and social impairment
- REHABILITATION SYSTEMS AND METHODS
This application claims the benefit of U.S. Provisional Patent Application Ser. No. 62/101,931, filed Jan. 9, 2015, entitled “Nanowire Arrays for Neurotechnology and Other Applications,” by Park, et al.; and U.S. Provisional Patent Application Ser. No. 62/126,402, filed Feb. 27, 2015, entitled “Nanowire Arrays for Neurotechnology and Other Applications,” by Park, et al., each of which is incorporated herein by reference in its entirety.
GOVERNMENT FUNDINGThis invention was made with government support under Grant No. 8DP1DA03508 awarded by the National Institutes of Health. The government has certain rights in the invention.
FIELDThe present invention generally relates to nanowires.
BACKGROUNDTo date, many neurological disorders remain poorly understood and lack therapeutic treatments despite research programs focusing on elucidating the cellular basis of the disorders and screening for potential new drugs. In part, this has been attributed to a shortage of drug screening assays that facilitate large-scale experiments with primary mammalian neurons.
Over the course of the last two decades, drugs targeting both voltage- and ligand-gated ion channels have been successfully developed to treat a broad range of neurological diseases. Despite their validated potential as druggable targets, ion-channel-targeted drug discovery has experienced slow progress in large part due to the experimental difficulty in evaluating their interaction with novel compounds. Genome-wide association studies continue to identify ion channel mutations that result in ion channel irregularities, which contribute to many debilitating diseases including Parkinson's, Alzheimer's, hyperactivity disorders, epilepsy, and autism. The constantly increasing rate of discovery of new candidate targets necessitates high-throughput techniques to evaluate their efficacy as therapeutic targets.
The need for high-throughput ion channel screening has spurred the development of several methods based on indirect measurement of ion channel activity, such as ion-flux assays and cell-based assays with membrane potential—or Ca2+-sensitive dyes. Although these methods have become an integral part of ion channel drug discovery efforts, electrophysiological measurements that directly monitor the electric activity of ion channels remain the benchmark assay for confirmation of compound activity and efficacy. However, electrophysiological measurements have been of limited utility in drug screening efforts in large part due to their labor-intensive and low-throughput nature. To address this drawback, automated planar-patch electrophysiology platforms have been developed, allowing for higher throughput drug screening experiments. Although planar-patch platforms have proven useful in several drug discovery programs including identification and optimization efforts, their application is limited to large cells and stable cell lines designed to express the channel of interest. However, the process of stably expressing cell lines is costly, time-consuming, and often associated with low viability. In addition, characterization of the compound's activity in dissociated cells does not warrant the same effect in a complex neuronal network. Automated planar-patch platforms are limited not only by their poor performance with primary mammalian neurons and neuronal cultures, but also by their unsuitability of recording from connected pairs of neurons.
Nanowires (NWs) provide a powerful new system for determining electrical conditions within cells, or applying electrical forces to cells. However, due to their size, typically on the order of nanometers, it is difficult to expose arrays of nanowires and cells to different conditions. Accordingly, improvements are needed.
SUMMARYThe present invention generally relates to nanowires. The subject matter of the present invention involves, in some cases, interrelated products, alternative solutions to a particular problem, and/or a plurality of different uses of one or more systems and/or articles.
In one aspect, the present invention is generally directed to an article. In one set of embodiments, the article includes a plurality of upstanding nanowires on a substrate, in electrical communication with an integrated circuit.
The invention, in another aspect, is generally directed to a method. In one set of embodiments, the method includes inserting one or more nanowires into a cell. In some cases, the one or more nanowires may be upstanding nanowires on a substrate and/or are in electrical communication with an integrated circuit.
The method, in another set of embodiments, includes applying electroporation and/or voltage to a cell using one or more nanowires inserted into a cell. In some cases, the one or more nanowires may be upstanding nanowires on a substrate and/or are in electrical communication with an integrated circuit.
The method, in another set of embodiments, includes exposing a plurality of cells to one or more compounds. In some cases, at least some of the cells are penetrated with one or more nanowires. In some cases, the one or more nanowires may be upstanding nanowires on a substrate and/or are in electrical communication with an integrated circuit.
In another aspect, the present invention encompasses methods of making one or more of the embodiments described herein. In one set of embodiments, the method includes depositing a nanowire-material-comprising layer on an integrated circuit. In some cases, the method further includes generating an etch mask. In some cases, the method further includes etching the nanowire-material-comprising layer to form one or more nanowires. In some embodiments, the method further includes depositing a conformal coating comprising an electrically conductive material on the one or more nanowires.
In still another aspect, the present invention encompasses methods of using one or more of the embodiments described herein.
Other advantages and novel features of the present invention will become apparent from the following detailed description of various non-limiting embodiments of the invention when considered in conjunction with the accompanying figures. In cases where the present specification and a document incorporated by reference include conflicting and/or inconsistent disclosure, the present specification shall control. If two or more documents incorporated by reference include conflicting and/or inconsistent disclosure with respect to each other, then the document having the later effective date shall control.
Non-limiting embodiments of the present invention will be described by way of example with reference to the accompanying figures, which are schematic and are not intended to be drawn to scale. In the figures, each identical or nearly identical component illustrated is typically represented by a single numeral. For purposes of clarity, not every component is labeled in every figure, nor is every component of each embodiment of the invention shown where illustration is not necessary to allow those of ordinary skill in the art to understand the invention. In the figures:
The present invention generally relates to nanowires. In one aspect, the present invention is generally directed to systems and methods of individually addressing nanowires on a surface, e.g., that are substantially upstanding or vertically-oriented with respect to the surface. In some cases, one or more nanowires may be individually addressed using various integrated circuit (“IC”) technologies, such as CMOS. For example, the nanowires may form an array on top of an active CMOS integrated circuit.
One aspect of the invention relates to nanowires positioned in contact with a cell, e.g., as is shown in
Thus, certain aspects of the invention are generally directed to one or more nanowires on a substrate. The nanowires may be upstanding or substantially oriented vertically, with respect to the surface. For example. on average, the upstanding nanowires may form an angle with respect to a substrate of between about 80° and about 100°, between about 85° and about 95°, or between about 88° and about 92°. In some cases, the average angle is about 90°. As used herein, the term “nanowire” (or “NW”) refers to a material in the shape of a wire or rod having a diameter in the range of 1 nm to 1 micrometer (μm). The NWs may be formed from materials with low cytotoxicity; suitable materials include, but are not limited to, silicon, silicon oxide (e.g., silicon dioxide), silicon nitride, silicon carbide, iron oxide, aluminum oxide, iridium oxide, tungsten, stainless steel, silver, platinum, and gold. Other suitable materials include aluminum, copper, molybdenum, tantalum, titanium, nickel, tungsten, chromium, or palladium. In some embodiments, the nanowire comprises or consists essentially of a semiconductor. Typically, a semiconductor is an element having semiconductive or semi-metallic properties (i.e., between metallic and non-metallic properties). An example of a semiconductor is silicon. Other non-limiting examples include elemental semiconductors, such as gallium, germanium, diamond (carbon), tin, selenium, tellurium, boron, or phosphorous. In other embodiments, more than one element may be present in the nanowires as the semiconductor, for example, gallium arsenide, gallium nitride, indium phosphide, cadmium selenide, etc.
The size and density of the NWs in the NW arrays may be varied; the lengths, diameters, and density of the NWs can be configured to permit adhesion and penetration of cells. In some embodiments, the length of the NWs can be 0.1-10 micrometers (μm). In some cases, the diameter of the NWs can be 50-300 nm. In certain embodiments, the aspect ratio (e.g., length to diameter) of the NWs can be about 3:1 to about 500:1. In certain embodiments, the density of the NWs can be 0.05-5 NWs per micrometer2 (μm2). Other examples are discussed below.
The nanowires may have any suitable length, as measured moving away from the substrate. The nanowires may have substantially the same lengths, or different lengths in some cases. For example, the nanowires may have an average length of at least about 0.1 micrometers, at least about 0.2 micrometers, at least about 0.3 micrometers, at least about 0.5 micrometers, at least about 0.7 micrometers, at least about 1 micrometer, at least about 2 micrometers, at least about 3 micrometers, at least about 5 micrometers, at least about 7 micrometers, or at least about 10 micrometers. In some cases, the nanowires may have an average length of no more than about 10 micrometers, no more than about 7 micrometers, no more than about 5 micrometers, no more than about 3 micrometers, no more than about 2 micrometers, no more than about 1 micrometer, no more than about 0.7 micrometers, no more than about 0.5 micrometers, no more than about 0.3 micrometers, no more than about 0.2 micrometers, or no more than about 0.1 micrometers. Combinations of any of these are also possible in some embodiments.
The nanowires may also have any suitable diameter, or narrowest dimension if the nanowires are not circular. The nanowires may have substantially the same diameters, or in some cases, the nanowires may have different diameters. In some cases, the nanowires may have an average diameter of at least about 10 nm, at least about 30 nm, at least about 50 nm, at least about 70 nm, at least about 100 nm, at least about 200 nm, at least about 300 nm, etc., and/or the nanowires may have an average diameter of no more than about 300 nm, no more than about 200 nm, no more than about 100 nm, no more than about 70 nm, no more than about 50 nm, no more than about 30 nm, no more than about 20 nm, or no more than about 10 nm, or any combination of these.
In addition, in some cases, the density of nanowires on the substrate, or on a region of the substrate defined by nanowires, may be at least about 0.01 nanowires per square micrometer, at least about 0.02 nanowires per square micrometer, at least about 0.03 nanowires per square micrometer, at least about 0.05 nanowires per square micrometer, at least about 0.07 nanowires per square micrometer, at least about 0.1 nanowires per square micrometer, at least about 0.2 nanowires per square micrometer, at least about 0.3 nanowires per square micrometer, at least about 0.5 nanowires per square micrometer, at least about 0.7 nanowires per square micrometer, at least about 1 nanowire per square micrometer, at least about 2 nanowires per square micrometer, at least about 3 nanowires per square micrometer, at least about 4 nanowires per square micrometer, at least about 5 nanowires per square micrometer, etc. In addition, in some embodiments, the density of nanowires on the substrate may be no more than about 10 nanowires per square micrometer, no more than about 5 nanowires per square micrometer, no more than about 4 nanowires per square micrometer, no more than about 3 nanowires per square micrometer, no more than about 2 nanowires per square micrometer, no more than about 1 nanowire per square micrometer, no more than about 0.7 nanowires per square micrometer, no more than about 0.5 nanowires per square micrometer, no more than about 0.3 nanowires per square micrometer, no more than about 0.2 nanowires per square micrometer, no more than about 0.1 nanowires per square micrometer, no more than about 0.07 nanowires per square micrometer. no more than about 0.05 nanowires per square micrometer, no more than about 0.03 nanowires per square micrometer, no more than about 0.02 nanowires per square micrometer, or no more than about 0.01 nanowires per square micrometer.
The nanowires may be regularly or irregularly spaced on the substrate. For example, the nanowires may be positioned within a rectangular grid with periodic spacing, e.g., having a periodic spacing of at least about 0.01 micrometers, at least about 0.03 micrometers, at least about 0.05 micrometers, at least about 0.1 micrometers, at least about 0.3 micrometers, at least about 0.5 micrometers, at least about 1 micrometer, at least about 2 micrometers, at least about 3 micrometers, at least about 5 micrometers, at least about 10 micrometers, etc. In some cases, the periodic spacing may be no more than about 10 micrometers, no more than about 5 micrometers, no more than about 3 micrometers, no more than about 1 micrometer, no more than about 0.5 micrometers, no more than about 0.3 micrometers, no more than about 0.1 micrometers, no more than about 0.05 micrometers, no more than about 0.03 micrometers, no more than about 0.01 micrometers, etc. Combinations of these are also possible, e.g., the array may have a periodic spacing of nanowires of between about 0.01 micrometers and about 0.03 micrometers.
In some cases, the nanowires (whether regularly or irregularly spaced) may be positioned on the substrate such that the average distance between a nanowire and its nearest neighboring nanowire is at least about 0.01 micrometers, at least about 0.03 micrometers, at least about 0.05 micrometers, at least about 0.1 micrometers, at least about 0.3 micrometers, at least about 0.5 micrometers, at least about 1 micrometer, at least about 2 micrometers, at least about 3 micrometers, at least about 5 micrometers, at least about 10 micrometers, etc. In some cases, the distance may be no more than about 10 micrometers, no more than about 5 micrometers, no more than about 3 micrometers, no more than about 1 micrometer, no more than about 0.5 micrometers, no more than about 0.3 micrometers, no more than about 0.1 micrometers, no more than about 0.05 micrometers. no more than about 0.03 micrometers, no more than about 0.01 micrometers, etc. In some cases, the average distance may fall within any of these values, e.g., between about 0.5 micrometers and about 2 micrometers.
In certain aspects, the substrate may comprise more than one region of nanowires, e.g., patterned as discussed herein. For example, a pre-determined pattern of photons or electrons may be used to produce a substrate comprising a first region of nanowires and a second region of nanowires. In addition, in some cases, more than two such regions of nanowires may be produced on a substrate. For example, there may be at least 3, at least 6, at least 10, at least 15, at least 20, at least 50, or at least 100 separate regions of nanowires on a substrate. In some cases, the regions are separate from each other. Any number of nanowires may be present in a region, e.g., at least about 10, at least about 20, at least about 50, at least about 100, at least about 300, at least about 1000, etc. The nanowires may be present in any suitable configuration or array, e.g., in a rectangular or a square array.
The nanowires in a first region and a second region may be the same, or there may be one or more different characteristics between the nanowires. For example, the nanowires in the first region and the second region may have different average diameters, lengths, densities, biological effectors, or the like. If more than two regions of nanowires are present on the substrate, each of the regions may independently be the same or different.
The substrate may be formed of the same or different materials as the nanowires. For example, the substrate may comprise silicon, silicon oxide, silicon nitride, silicon carbide, iron oxide, aluminum oxide, iridium oxide, tungsten, stainless steel, silver, platinum, gold, gallium, germanium, or any other materials described herein that a nanowire may be formed from. In one embodiment, the substrate is formed from a semiconductor. In some cases, the substrate may include CMOS or other technologies, e.g., as discussed herein.
In some embodiments, arrays of NWs on a substrate may be obtained by growing NWs from a precursor material. As a non-limiting example, chemical vapor deposition (CVD) may be used to grow NWs by placing or patterning catalyst or seed particles (typically with a diameter of 1 nm to a few hundred nm) atop a substrate and adding a precursor to the catalyst or seed particles. When the particles become saturated with the precursor, NWs can begin to grow in a shape that minimizes the system's energy. By varying the precursor, substrate, catalyst/seed particles (e.g., size, density, and deposition method on the substrate), and growth conditions, NWs can be made in a variety of materials, sizes, and shapes, at sites of choice.
In certain embodiments, arrays of NWs on a substrate may be obtained by growing NWs using a top-down process that involves removing predefined structures from a supporting substrate. As a non-limiting example, the sites where NWs are to be formed may be patterned into a soft mask and subsequently etched to develop the patterned sites into three-dimensional nanowires. Methods for patterning the soft mask include, but are not limited to, photolithography and electron beam lithography. The etching step may be either wet or dry.
As mentioned, in some aspects, one or more nanowires may be individually or uniquely addressable, e.g., using an integrated circuit. Those of ordinary skill in the art will be aware of techniques for fabricating and using a variety of integrated circuits. Integrated circuit (“IC”) may use a variety of semiconductor materials (e.g., silicon (Si). silicon germanium (SiGe), gallium arsenide (GaAs), indium phosphide (InP), etc.) to implement electronic components and circuits. For example, one example of IC technology is “CMOS” (Complimentary-Metal-Oxide-Semiconductor) technology, with which silicon integrated circuits are fabricated. For instance, one example implementation of such an IC chip may be fabricated using standard CMOS protocols. It should be appreciated, however, that the present disclosure is not intended to be limiting in this respect, as other semiconductor-based technologies may be utilized to implement various embodiments of the microelectronics portion of the systems discussed herein. Other electronic components may be added as well, in various embodiments of the invention.
In some embodiments, the integrated circuit comprises one or more connection sites. The connection site may be a site comprising an electrically conductive surface (e.g., to facilitate electrical connection to one or more other structures, such as one or more nanowires) in electrical communication with one or more electronic components (e.g., an amplifier unit, a stimulator unit). In some embodiments, the integrated circuit comprises at least about 1, at least about 4, at least about 5, at least about 9, at least about 10, at least about 25. at least about 100, at least about 225, at least about 400, at least about 625, at least about 1000, at least about 1024, at least about 2000, at least about 5000, at least about 10,000, at least about 16,384, at least about 20,000, at least about 50,000, at least about 100,000, at least about 150,000, at least about 200,000, at least about 250,000, at least about 300,000, at least about 400,000, or at least about 500,000 connection sites. In some cases, at least one connection site is in electrical communication with at least about 1, at least about 4, at least about 5, at least about 9, at least about 10, at least about 25, at least about 100, at least about 225, at least about 400, at least about 625, at least about 1000, at least about 1024, at least about 2000, at least about 5000, or at least about 10,000 nanowires. The integrated circuit may, in certain cases, be in electrical communication with at least about 1, at least about 4, at least about 5, at least about 9, at least about 10, at least about 25, at least about 100, at least about 225, at least about 400, at least about 625, at least about 1000, at least about 1024, at least about 2000, at least about 5000, at least about 10,000, at least about 16,384, at least about 20,000, at least about 50,000, at least about 100,000, at least about 150,000, at least about 200,000, at least about 250,000, at least about 300,000, at least about 400,000, at least about 500,000, or at least about 1,000.000 nanowires.
In some embodiments, a connection site comprises an electrically conductive surface. The electrically conductive surface may comprise a metal (e.g., a metal pad). Non-limiting examples of suitable metals include aluminum, titanium, platinum, copper, gold, and/or chromium.
According to some embodiments, a connection site is in electrical communication with one or more amplifier units. An amplifier unit generally refers to an electronic component that receives an electrical signal (e.g., an electrical signal from a biological cell) and amplifies the signal (e.g., increases the voltage and/or current of the signal). In some cases, the amplifier unit has relatively high gain (e.g., voltage gain). In certain embodiments, the voltage gain of an electrical signal (e.g., output voltage divided by input voltage) is at least about 0.1 V/V, at least about 0.5 V/V, at least about 1 V/V, at least about 5 V/V, at least about 10 V/V, at least about 20 V/V, at least about 50 V/V, at least about 80 V/V, at least about 100 V/V, at least about 120 V/V, at least about 150 V/V, at least about 200 V/V, at least about 300 V/V, at least about 400 V/V, at least about 500 V/V, at least about 600 V/V, at least about 700 V/V, at least about 800 V/V, at least about 900 V/V. or at least about 1000 V/V, etc. In some cases, the presence of one or more amplifier units at a connection site in an integrated circuit may advantageously mitigate the effects of relatively high nanowire impedance and/or relatively low signal amplitude and/or frequency.
In some embodiments, at least a portion of the connection sites in an integrated circuit are individually in electrical communication with an amplifier unit. In certain cases, each connection site is individually in electrical communication with an amplifier unit, although in other cases, a connection site may be in electrical communication with more than one amplifier unit, or an amplifier may be in electrical communication with more than one connection site. In some cases, an integrated circuit comprises at least about 1, at least about 4, at least about 5, at least about 9. at least about 10, at least about 25, at least about 100, at least about 225, at least about 400, at least about 625, at least about 1000, at least about 1024, at least about 2000. at least about 5000, at least about 10,000, at least about 16,384, at least about 20,000, at least about 50,000, at least about 100,000, at least about 150,000, at least about 200,000, at least about 250,000, at least about 300,000, at least about 400,000, or at least about 500,000 amplifier units. In some embodiments, one or more nanowires are in electrical communication with an amplifier unit of a connection site.
In some cases, the amplifier unit is AC coupled (e.g., capacitively coupled) to one or more nanowires. In certain cases, AC coupling may advantageously filter out DC components and reduce noise. Accordingly, in some embodiments, the amplifier unit comprises one or more capacitors in series with one or more nanowires. In certain cases. the amplifier unit comprises an input variable capacitance array, which may match the capacitance of one or more nanowires in electrical communication with the amplifier unit.
The amplifier unit may comprise any amplifier known in the art. In certain embodiments, an amplifier unit comprises a low noise amplifier (LNA) (e.g., a single-ended low noise amplifier) and/or a variable gain amplifier (VGA). For example, an amplifier unit may comprise an LNA electrically coupled to a VGA. In some cases, an amplifier unit comprises one or more transistors (e.g., bipolar junction transistors and/or metal oxide semiconductor field-effect transistors (MOSFETs)). The amplifier unit may, in some embodiments, comprise 200 or fewer transistors, 150 or fewer transistors, 100 or fewer transistors, 75 or fewer transistors, 50 or fewer transistors, 40 or fewer transistors, 30 or fewer transistors, 20 or fewer transistors, 15 or fewer transistors, 10 or fewer transistors, 5 or fewer transistors, 2 or fewer transistors, or 1 transistor. In some cases, it may be advantageous for an amplifier circuit to comprise relatively few transistors in order to reduce power consumption, which may be desirable to prevent damage to biological cells.
In certain embodiments, an amplifier circuit is in electrical communication with one or more filters (e.g., frequency filters). In some embodiments, the filter is a high-pass filter (e.g., a filter that passes signals having a frequency above a certain cut-off value), a low-pass filter (e.g., a filter that passes signals having a frequency below a certain cut-off value), or a bandpass filter (e.g., a filter that passes signals having a frequency above a first cut-off value and below a second cut-off value). The filter may, for example, be positioned in a negative feedback path of the amplifier unit. In certain cases, the filter may advantageously filter out 1/f noise. In some embodiments, the filter has a high frequency pole of at least about 1 kHz, at least about 5 kHz, at least about 10 kHz, or at least about 20 kHz. The filter may, in some embodiments, have a low frequency pole of about 1 Hz or less, about 0.5 Hz or less, about 0.2 Hz or less, about 0.1 Hz or less, about 0.05 Hz or less, about 0.02 Hz or less, or about 0.01 Hz or less. In some embodiments, the filter comprises a pseudo resistor comprising one or more diodes. A non-limiting example of a suitable type of diode is a PN junction diode (e.g., a PN junction silicon diode). In some cases, the pseudo resistor comprises 10 or fewer diodes, 7 or fewer diodes, 5 or fewer diodes, or 3 or fewer diodes. In certain embodiments, the pseudo resistor has a resistance of least about 1 teraohm, at least about 2 teraohms, at least about 5 teraohms, at least about 10 teraohms, at least about 50 teraohms, or at least about 100 teraohms. The pseudo resistor may, in some cases, be in parallel with one or more capacitors (e.g., one or more poly-insulator-poly capacitors). In some cases, the one or more capacitors have a capacitance of at least about 1 femtofarad, at least about 2 femtofarads, at least about 5 femtofarads, at least about 10 femtofarads, at least about 50 femtofarads, or at least about 100 femtofarads.
According to some embodiments, a connection site is in electrical communication with one or more stimulator units. A stimulator unit may be an electronic component that can apply an electrical stimulus (e.g., a voltage pulse) to another electronic component or other structure. In some embodiments, a stimulator unit comprises a plurality of voltage stimulus sources. For example, a stimulator unit may comprise at least about 1, at least about 2, at least about 3, at least about 4, at least about 5, or at least about 10 voltage stimulus sources. Any type of voltage stimulus source known in the art may be used. In some cases, the voltage stimulus source may be capable of providing a signal having a voltage of at least about 1 V, at least about 2 V, at least about 3 V, at least about 4 V, at least about 5 V, at least about 10 V, at least about 15 V, at least about 20 V, at least about 25 V, or at least about 30 V, etc. In some cases, the stimulator unit may further comprise a multiplexer in electrical communication with the plurality of voltage stimulus sources. The multiplexer may be a device that selects and forwards an electrical signal (e.g., stimulation signal) from one of the plurality of voltage stimulus sources. The presence of one or more stimulator units at a connection site in an integrated circuit may advantageously allow stimulation of one or more biological cells (e.g., via one or more nanowires).
In some embodiments, at least a portion of the connection sites in an integrated circuit are individually in electrical communication with a stimulator unit. In certain cases, each connection site is individually in electrical communication with a stimulator unit. In some cases, an integrated circuit comprises at least about 1, at least about 4, at least about 5, at least about 9, at least about 10, at least about 25, at least about 100, at least about 225, at least about 400, at least about 625, at least about 1000, at least about 1024, at least about 2000, at least about 5000, at least about 10,000, at least about 16,384, at least about 20,000, at least about 50,000, at least about 100,000, at least about 150,000, at least about 200,000, at least about 250,000, at least about 300,000, at least about 400,000, or at least about 500,000 stimulator units. In some embodiments, one or more nanowires are in electrical communication with a stimulator unit of a connection site.
In some embodiments, a connection site is in electronic communication with a local digital memory (e.g., an electronic data storage device). In some embodiments, the local digital memory has a capacity of at least about 2 bits, at least about 4 bits, at least about 8 bits, at least about 16 bits, at least about 32 bits, at least about 64 bits, at least about 128 bits. at least about 256 bits, or at least about 512 bits or more. According to some embodiments, the digital memory is electronically connected to a stimulator unit of the connection site. In certain cases, the digital memory may control the amplitude and/or frequency of an applied electrical stimulus. For example, the digital memory may select the voltage stimulus source of the stimulator unit to apply the electrical stimulus. In some embodiments, the digital memory is electronically connected to an amplifier unit of the connection site. In certain cases, the digital memory may control the variable gain of the amplifier unit. In some embodiments, the digital memory may turn at least a portion of the amplifier unit and/or at least a portion of the stimulator unit on or off. In some cases, the ability of the digital memory to turn the amplifier unit and/or stimulator unit on or off may advantageously result in low power consumption, which may be desirable to prevent damage to biological cells.
In some embodiments, the integrated circuit comprises an output multiplexer (e.g., an analog multiplexer). The output multiplexer may advantageously allow for simultaneous recording from a plurality of connection sites. In some embodiments, the output multiplexer may sample the integrated circuit at a sufficiently high frequency to resolve electrical signals from biological cells. For example, the output multiplexer may sample the integrated circuit chip at a sample of frequency of at least about 1 kHz, at least about 5 kHz, at least about 10 kHz, at least about 20 kHz, at least about 50 kHz, or at least about 100 kHz.
In some embodiments, one or more nanowires may be in electrical communication with a connection site of the integrated circuit. The one or more nanowires may be, in some embodiments, in physical contact (e.g., direct physical contact) with a connection site. For example, at least a portion of a nanowire may be in direct physical contact with the electrically conductive surface (e.g., metal pad) of a connection site. In some embodiments, one or more intervening layers may be positioned between a nanowire and a connection site. The one or more intervening layers may, in some cases, he substantially electrically conductive. In some cases, it may be advantageous for the one or more nanowires to be in physical contact with the connection site to reduce noise and/or reduce attenuation of signals transmitted between the nanowires and one or more electronic components connected to the connection site. For example, positioning the nanowires in physical contact with the connection site may avoid a relatively long signal path to off-chip electronics, which may have large stray capacitance and lead to deleterious signal attenuation.
In some embodiments, the integrated circuit is capable of measuring signals having a relatively low amplitude. In some cases, the integrated circuit measures signals having an amplitude of about 500 mV or less, about 200 mV or less, about 100 mV or less, about 50 mV or less, about 20 mV or less, about 10 mV or less, about 5 mV or less, about 4 mV or less, about 3 mV or less, about 2 mV or less, about 1 mV or less, about 500 μV or less, about 200 μV or less, about 100 μV or less, about 50 μV or less, about 20 μV or less, or about 10 μV or less.
In some embodiments, the integrated circuit is capable of measuring signals having a relatively low frequency. In some embodiments, the integrated circuit measures signals having a frequency of about 500 kHz or less, about 200 kHz or less, about 100 kHz or less, about 50 kHz or less, about 20 kHz or less, about 10 kHz or less, about 5 kHz or less, about 2 kHz or less, about 1 kHz or less, about 500 Hz or less, about 200 Hz or less, about 100 Hz or less, about 50 Hz or less, about 20 Hz or less, about 10 Hz or less, about 5 Hz or less, about 2 Hz or less, about 1 Hz or less, about 0.5 Hz or less, about 0.2 Hz or less, or about 0.1 Hz or less.
According to some embodiments, the integrated circuit may consume a relatively low amount of power. In some cases, it may be advantageous for the integrated circuit to consume relatively little power to minimize heat dissipation and prevent damage to biological cells. In some embodiments, the integrated circuit consumes about 1 W or less, about 0.5 W or less, about 0.2 W or less, about 0.1 W or less, about 0.05 W or less, about 0.02 W or less, about 0.01 W or less, about 0.005 W or less, about 0.002 W or less, or about 0.001 W or less.
A schematic diagram of an exemplary system 200 comprising a nanowire 202 and a connection site 204 of an integrated circuit, according to some embodiments, is shown in
In operation, connection site 204 may be configured to apply an electrical stimulus (e.g., a voltage pulse) to biological cell 232. Accordingly, digital memory 230 may send signals to enable multiplexer 214 and stimulator 216 of stimulator unit 208 and disable LNA 220 and VGA 222 of amplifier unit 210. Digital memory 230 may also send a signal to multiplexer 214 selecting which of voltage stimulus sources 212A, 212B, and 212C to use to apply a stimulation signal. The stimulation signal may be transmitted from the selected voltage stimulus source of stimulator unit 208 to metal pad 206 and nanowire 202. The stimulation signal may then be transmitted from nanowire 202 to biological cell 232. In some cases, the stimulation signal may induce an effect in biological cell 232.
In some cases, connection site 204 may be configured to record an electrical signal from biological cell 232. Accordingly, digital memory 230 may send signals to disable multiplexer 214 and stimulator 216 of stimulator unit 208 and enable LNA 220 and VGA 222 of amplifier unit 210. Digital memory 230 may also control the gain of VGA 222. An electrical signal (e.g., a post-synaptic potential, an action potential) from biological cell 232 may be transmitted to nanowire 202 and, subsequently, to metal pad 206 and amplifier unit 210. In amplifier unit 210, the biological signal may be transmitted through input capacitor 218 to LNA 220, which may increase the voltage of the biological signal. High-pass filter 224 may remove noise having a frequency below a certain cut-off value. The amplified signal may then be transmitted to VGA 222 to be further amplified, with the gain controlled by digital memory 230. The further amplified signal may then be transmitted to an output multiplexer (not shown).
In one aspect, the nanowires may be contained within a plurality of wells, e.g., containing cells. In some cases, the cells may be studied in parallel fashion, e.g., to test a variety of drugs or potential drug candidates, to study the effect of one or more compositions or agents on one or more cells or cell types, or the like. For example, in some cases, the wells may be arranged as in multiwell plates, which may be of any size.
However, in certain embodiments, the wells are arranged as in the dimensions of a microwell plate, e.g., having standard dimensions (about 5 inches×about 3.33 inches, or about 128 mm×86 mm) and/or standard numbers of wells therein. For example, there may be 6, 24, 48, 96, 384, 1536 or 3456 wells present. In some cases, the device may include multiwell plates, which may be fabricated from any suitable material, e.g., polystyrene. polypropylene, polycarbonate, cyclo-olefins, or the like. Microwell plates can be made by injection molding, casting, machining, laser cutting, or vacuum sheet forming one or more resins, and can be made from transparent or opaque materials. Many such microwell plates are commercially available.
In one set of embodiments, the multiwell plate is prepared by immobilizing a bottomless multiwell plate with a substrate comprising a plurality of upstanding nanowires. For example, the bottomless multiwell plate may be a commercially available bottomless microwell plate, e.g., a bottomless 384-well microwell plate. The substrate and the nanowires may comprise semiconductor materials such as silicon, or other materials as described herein.
In some embodiments, the multiwell plate and the substrate may be immobilized with respect to each other by the use of a suitable adhesive. Non-limiting examples of adhesives include acrylic adhesives, pressure-sensitive adhesives, silicone adhesives (e.g., UV curable silicones or RTV silicones), biocompatible adhesives, epoxies, or the like. Non-limiting examples of biocompatible glues include, but are not limited to, Master Bond EP42HT-2ND-2MED BLACK and Master Bond EP42HT-2 CLEAR (Master Bond). The adhesive, in some cases, may be a permanent adhesive. Many such adhesives can be obtained commercially from companies such as 3M, Loctite, or Adhesives Research.
The multiwell plate and the substrate may be directly immobilized to each other, and/or there may be other materials positioned between the multiwell plate and the substrate, for example, one or more gaskets (e.g., comprising silicone, rubber, neoprene, nitrile rubber, fiberglass, polytetrafluoroethylene, etc.). In some cases, these materials may be dimensioned and arranged to be in the same pattern as the wells (or a subset thereof) of the multiwell plate to which they are being attached.
In one aspect, at least some of the NWs may be used to deliver a molecule of interest into a cell, e.g.. through insertion of a NW into the cell. In certain embodiments of the invention, at least some of the NWs may undergo surface modification so that molecules of interest can be attached to them. It should be appreciated that the NWs can be complexed with various molecules according to any method known in the art. It should also be appreciated that the molecules connected to different NWs may be distinct. In some embodiments, a NW may be attached to a molecule of interest through a linker. The interaction between the linker and the NW may be covalent, electrostatic, photosensitive, or hydrolysable. As a specific non-limiting example, a silane compound may be applied to a NW with a surface layer of silicon oxide, resulting in a covalent Si—O bond. As another specific non-limiting example, a thiol compound may be applied to a NW with a surface layer of gold, resulting in a covalent Au—S bond. Examples of compounds for surface modification include, but are not limited to, aminosilanes such as (3-aminopropyl)-trimethoxysilane, (3-aminopropyl)-triethoxysilane, 3-(2-aminoethylamino)propyl-dimethoxymethylsilane, (3-aminopropyl)-diethoxymethylsilane, [3-(2-aminoethylamino)propyl]trimethoxysilane, bis[3-(trimethoxysilyl)propyl]amine, and (11-aminoundecyl)-triethoxysilane; glycidoxysilanes such as 3-glycidoxypropyldimethylethoxysilane and 3-glycidyloxypropyl)trimethoxysilane; mercaptosilanes such as (3-mercaptopropyl)-trimethoxysilane and (11-mercaptoundecyl)-trimethoxysilane; and other silanes such as trimethoxy(octyl)silane, trichloro(propyl)silane, trimethoxyphenylsilane, trimethoxy(2-phenylethyl)silane, allyltriethoxysilane, allyltrimethoxysilane, 3-[bis(2-hydroxyethyl)amino]propyl-triethoxysilane, 3-(trichlorosilyl)propyl methacrylate, and (3-bromopropyl)trimethoxysilane. Other non-limiting examples of compounds that may be used to form the linker include poly-lysine, collagen, fibronectin, and laminin.
In addition, in various embodiments, a nanowire may be prepared for binding or coating of a suitable biological effector by activating the surface of the nanowire, silanizing at least a portion of the nanowire, and reacting a crosslinker to the silanized portions of the nanowire. Methods for activating the surface include, but are not limited to, surface oxidation, such as by plasma oxidation or acid oxidation. Non-limiting examples of suitable types of crosslinkers that are commercially available and known in the art include maleimides, histidines, haloacetyls, and pyridyldithiols.
Similarly, the interaction between the linker and the molecule to be delivered can be covalent, electrostatic, photosensitive, or hydrolysable. In some embodiments, a molecule of interest attached to or coated on a NW may be a biological effector. As used herein, a “biological effector” refers to a substance that is able to modulate the expression or activity of a cellular target. It includes, but is not limited to, a small molecule, a protein (e.g., a natural protein or a fusion protein), an enzyme, an antibody (e.g., a monoclonal antibody), a nucleic acid (e.g., DNA, including linear and plasmid DNAs; RNA, including mRNA, siRNA, and microRNA), and a carbohydrate. The term “small molecule” refers to any molecule with a molecular weight below 1000 Da. Non-limiting examples of molecules that may be considered to be small molecules include synthetic compounds, drug molecules, oligosaccharides, oligonucleotides, and peptides. The term “cellular target” refers to any component of a cell. Non-limiting examples of cellular targets include DNA, RNA, a protein, an organelle, a lipid, or the cytoskeleton of a cell. Other examples include the lysosome, mitochondria, ribosome, nucleus, or the cell membrane.
In some cases, the nanowires can be used to deliver biological effectors or other suitable biomolecular cargo into a population of cells at surprisingly high efficiencies.
Furthermore, such efficiencies may be achieved regardless of cell type, as the primary mode of interaction between the nanowires and the cells is physical insertion, rather than biochemical interactions (e.g., as would appear in traditional pathways such as phagocytosis, receptor-mediated endocytosis, etc.). For instance, in a population of cells on the surface of the substrate, at least about 50%, at least about 60%, at least about 70%, at least about 80%, or at least about 90% of the cells may have at least one nanowire inserted therein. In some cases, as discussed herein, the nanowires may have at least partially coated thereon one or more biological effectors. Thus, in some embodiments, biological effectors may be delivered to at least about 50%, at least about 60%, at least about 70%, at least about 80%, or at least about 90% of the cells on the substrate, e.g., via the nanowires.
In one set of embodiments, the surface of the substrate may he treated in any fashion that allows binding of cells to occur thereto. For example, the surface may be ionized and/or coated with any of a wide variety of hydrophilic and/or cytophilic materials, for example, materials having exposed carboxylic acid, alcohol, and/or amino groups. In another set of embodiments, the surface of the substrate may be reacted in such a manner as to produce carboxylic acid, alcohol, and/or amino groups on the surface. In some cases, the surface of the substrate may be coated with a biological material that promotes adhesion or binding of cells, for example, materials such as fibronectin, laminin, vitronectin, albumin, collagen, or peptides or proteins containing RGD sequences.
It should be understood that for a cell to adhere to the nanowire, a separate chemical or “glue” is not necessarily required. In some cases, sufficient nanowires may be inserted into a cell such that the cell cannot easily be removed from the nanowires (e.g., through random or ambient vibrations), and thus, the nanowires are able to remain inserted into the cells. In some cases, the cells cannot be readily removed via application of an external fluid after the nanowires have been inserted into the cells.
In some cases, merely placing or plating the cells on the nanowires is sufficient to cause at least some of the nanowires to be inserted into the cells. For example, a population of cells suspended in media may be added to the surface of the substrate containing the nanowires, and as the cells settle from being suspended in the media to the surface of the substrate, at least some of the cells may encounter nanowires, which may (at least in some cases) become inserted into the cells.
Any suitable type of cell may be studied. For example, the cell may be a prokaryotic cell or a eukaryotic cell. The cell may be from a single-celled organism or a multi-celled organism. In some cases, the cell is genetically engineered, e.g., the cell may be a chimeric cell. The cell may be bacteria, fungi, a plant cell, an animal cell, etc. The cell may be from a human or a non-human animal or mammal (e.g., mouse, rat, pig, etc.). For instance, if the cell is from an animal, the cell may be a cardiac cell, a fibroblast, a keratinocyte, a hepatocyte, a chondrocyte, a neural cell (e.g., a cortical neuron, an olfactory receptor neuron, an olfactory sensory neuron), an osteocyte, an osteoblast. a muscle cell (e.g., a cardiomyocyte), a blood cell, an endothelial cell, an immune cell (e.g., a T-cell, a B-cell, a macrophage, a neutrophil, a basophil, a mast cell, an eosinophil), etc. In some cases, the cell is a cancer cell. In some cases, the cell is a stern cell (e.g., an embryonic stem cell, an induced pluripotent stem cell, a mesenchymal stern cell, or the like) or is derived from a stem cell. The cell may be a primary cell or an immortalized cell. In some cases, the cell is a primary mammalian neuron (e.g., human cortical neuron, rat cortical neuron, etc.).
Thus, for instance, a variety of different cell types may be exposed to a common biological effector in certain embodiments, e.g., to determine the effect of the common biological effector on such cells. For example, the biological effector may be a small molecule, RNA, DNA, a peptide, a protein, or the like. As non-limiting examples, the cell types may be bacteria or other prokaryotes, and the common biological effector may be a suspected drug or antimicrobial agent. In some cases, at least 10, at least 20, at least 30, at least 40, at least 50, at least 60, at least 70, at least 80, at least 90, at least 100 cells, at least 500 cells, at least 1000 cells, at least 5000 cells, at least 10,000 cells, at least 50,000 cells, at least 100,000 cells, at least 150,000 cells, at least 200,000 cells, at least 250,000 cells, at least 300,000 cells, or at least 500,000 cells, etc. may be studied. For example, the different cell types may each be placed into distinct wells of a multiwell plate, and nanowires inserted into the cells placed in each of the wells to insert a common biological effector.
In another set of embodiments, different common biological effectors may be studied, e.g., as applied to a single or clonal population of cells, or to a variety of different cell types such as those discussed above. For instance, the wells of a multiwell plate may contain nanowires, and at least some of the nanowires may be at least partially coated with a variety of biological effectors. For example, at least 10, at least 20, at least 30, at least 40, at least 50, at least 60, at least 70, at least 80, at least 90, at least 100, at least 500, at least 1000, at least 5000, at least 10,000, at least 50,000, at least 100,000, at least 150,000. at least 200,000, at least 250,000, at least 300,000, or at least 500,000, etc. different biological effectors may be studied. In some cases, the biological effectors may be added to the wells and the nanowires using robotic systems such as those discussed herein. Accordingly, cells placed in the wells of the multiwell plate may encounter different biological effectors, as inserted by the nanowires. As a non-limiting example, the different biological effectors may represent a plurality of suspected candidate drugs, and the effects of the various candidate drugs on a given population of cells may be studied to identify or screen drugs of interest.
In addition, it should be noted that in some embodiments, the cells may be cultured on the substrate using any suitable cell culturing technique, e.g., before or after insertion of nanowires. For example, mammalian cells may be cultured at 37° C. under appropriate relative humidities in the presence of appropriate cell media. Thus, for instance, the effect of a candidate drug (or a plurality of candidate drugs) on the effect of a suitable population of cells may be studied.
In another aspect, cells may be electroporated using nanowires as discussed herein, e.g., to introduce molecule of interest into a cell, and/or to withdraw molecules from cells. In some cases, the nanowires may be used to create an electric field sufficient to cause electroporation to occur in at least some of the cells. Those of ordinary skill in the art will be familiar with cell electroporation techniques. For example, in some cases, an electric field may be applied such that the transmembrane potential exceeds a threshold level around 0.25 to 1 V, wherein the lipid bilayer of cell membranes may rearrange to form hydrophilic pores (typically between 20-120 nm in diameter). Any molecule smaller than the pore size can flow into the cell, e.g., by electrophoresis or diffusion. In some cases, the applied voltages may be at least about 1 V, at least about 2 V, at least about 3 V, at least about 4 V. at least about 5 V, at least about 10 V, at least about 15 V, at least about 20 V, at least about 25 V, or at least about 30 V. etc. In certain cases, for electroporating cells suspended in a solution, pulses of around 1000 V (varying with cell size) lasting a few microseconds to a millisecond may be used. In some cases, the applied voltages may be at least about 100 V, at least about 200 V, at least about 300 V, at least about 500 V, at least about 800 V, at least about 1000 V. at least about 1200 V, etc. The electrical field can be applied, e.g., as an electrical current or voltage signal. The waveform may be, e.g., a square, triangular, sawtooth, or sinusoidal shape, and may have any suitable duration, e.g., at least about 1 μs, at least about 5 μs, at least about 10 μs, at least about 50 μs, at least about 100 μs, at least about 500 μs, at least about 1 ms, at least about 3 ms, at least about 5 ms, at least about 10 ms, at least about 30 ms, at least about 50 ms, at least about 100 ms, at least about 500 ms, at least about 1 s, and/or no more than about 1 s, no more than about 500 ms, no more than about 100 ms, no more than about 50 ms, no more than about 30 ms, no more than about 10 ms, no more than about 5 ms, no more than about 3 ms, no more than about 1 ms, no more than about 500 μs, no more than about 100 μs, no more than about 50 μs, no more than about 10 μs, no more than about 5 μs, no more than about 1 μs, etc. Combinations of any of these are also possible, e.g., the duration may be between about 1 ms and about 3 ms or between about 1 μs and about 1 s.
In yet another aspect, cells, such as neurons, are positioned in electrical communication with one or more nanowires, e.g., as discussed herein. The nanowires may be used to stimulate the cells, and/or determine an electrical condition of the cells. More than one nanowire may be positioned in electrical communication with the cell, for example, in distinct regions of the cell. In some cases, the nanowires may be positioned such that they are relatively close together, for example, spaced apart by no more than about 200 nm. The nanoscale wires may be disposed on a substrate, and the cells may be adhered or plated onto the substrate, for example, using cell adhesion factors such as polylysine.
In one aspect of the invention, cells such as neurons are positioned in electrical communication with one or more nanowires, as described herein. Practically any cell can be used which exhibits electrical behavior, such as membrane potential. For instance, the cell may be a cell in which it is desired to measure the membrane potential (e.g., instantaneously, as a function of time, in response to an external stimulus, such as a drug or an applied external electrical potential, etc.), the cell may be a cell which can be used to detect electric fields (for example, cells from the ampullae of Lorenzini, which is present in certain types of organisms such as sharks), or the cell may be a cell that can produce an electrical signal, for example, a neuron (which is able to produce an action potential), a cardiomyocyte, or an electrocyte (which is used in organisms such as electric eels or electric ray to produce an electrical discharge). In some cases, a neuron comprises one or more ion channels (e.g., a voltage-gated ion channel, a ligand-gated ion channel). In certain cases, the ligand-gated ion channel of a neuron is a cholinergic receptor (e.g., a protein that responds to the binding of acetylcholine). The cholinergic receptor may, in some cases, belong to the family of neuronal nicotinic acetylcholine receptors (nAchRs). Neuronal nicotinic acetylcholine receptors, which are typically pentameric complexes comprising different combinations of alpha (e.g., α2-α10) and beta (e.g., (β3, β4, β5) subunits, may be a potential drug target for neurological disorders such as Parkinson's disease, Alzheimer's, and/or hyperactivity disorders.
The nanowire may be in electrical communication with a portion of the cell, i.e., the nanowire may be positioned, relative to the cell, such that the nanowire is able to determine or affect the electrical behavior of the cell, and/or of a region of the cell. The nanowires are typically of dimensions such that the nanowire can be used to measure or determine a distinct region of a cell. As a non-limiting example, if the cell is a neuron, the nanowire may be positioned such that the nanowire is able to determine or affect the electrical behavior of a portion of the axon, dendrite, and/or soma of the neuron. The nanowire may be in physical contact with the cell, or not in physical contact but positioned such that changes in the electrical state of the cell are able to affect the electrical state of the nanowire, and/or vice versa. In some embodiments, at least a portion of the nanowire is inserted in the cell. One or more than one nanowire may be in electrical communication with the cell.
In one set of embodiments, a cell in electrical communication with a nanowire can be electrically stimulated by passing a current or applying a potential to the nanowire, which may be used to affect the electrical state of the cell. For example, the membrane potential of a cell may be altered upon electrical stimulation, or a neuron can be stimulated to cause the neuron to polarize (e.g., hyperpolarize) or depolarize upon the application of sufficient current or potential. In some cases, a current or potential may be applied to the nanowire by a stimulator unit. Additionally, in some cases, the electrical state of the cell can be determined using a sensing electrode, such as another nanowire, as discussed below.
In another set of embodiments, a change in an electrical state of a cell, such as cell polarization or depolarization, an action potential, a change in plasma membrane potential (e.g., a postsynaptic potential), or the like may cause a change in the electrical state of a nanowire in electrical communication with the cell, such as a change in conductance, which change can be determined and/or recorded in some fashion, e.g., using techniques known to those of ordinary skill in the art. In some cases, the change in electrical state (e.g., an electrical signal) may be stored (e.g., in digital memory), output to a display, and/or modified/converted in some manner. Accordingly, one embodiment of the invention provides for the determination of an electrical state of a cell using a nanowire. According to some embodiments, at least a portion of the nanowire is inserted in the cell (e.g., in the intracellular space). In some cases, an electrical signal may be transmitted from the cell to the nanowire, and the signal may subsequently be transmitted to an amplifier unit in electrical communication with the nanowire. In some cases, the cell may also be one which was electrically stimulated, e.g., electrically stimulated by applying current or a potential to an electrode, such as another nanowire, that is in electrical communication with the cell. As a specific example, the electrical state of a neuron, or a portion thereof (e.g., an axon, a dendrite, a soma, etc.) may be determined using a nanoscale wire in electrical communication with the neuron; for instance, the neuron may depolarize (e.g., due to exposure to a chemical species, or to a nanoscale wire or other electrode able to cause the neuron to depolarize), causing the formation and propagation of an action potential through the neuron, which action potential may be determined using a nanowire. In this way, one or more than one neuron may be studied. In some embodiments, electrical signals from one or more neurons forming an interconnected network may be recorded using one or more nanowires. Accordingly, the characteristics of an interconnected network (e.g., a neuronal network) may be investigated.
In some embodiments, the electrical state of the cell may be altered by exposing the cell to a chemical species suspected of being able to alter the electrical state of the cell. For example, a chemical species able to facilitate the depolarization of a cell, or a chemical species that inhibit the depolarization of a cell, can be used to alter the electrical state of the cell, and in some cases, to cause a cell such as a neuron to polarize (e.g., hyperpolarize) or depolarize. In one set of embodiments, the chemical species comprises drugs or drug candidates, neurotoxins, neurotransmitters, or the like, which may he suspected of being able to treat or alter the behavior of the cells. In some cases, the drugs or drug candidates may target one or more types of ion channels. As a non-limiting example, the drugs or drug candidates may target neuronal nicotinic acetylcholine receptors (nAchRs).
Due to their small size, more than one nanowire may be positioned in electrical communication with the cell, or portion thereof, according to another set of embodiments. For example, at least 3, at least 4, at least 5, at least 10, at least 15, at least 20, at least 25, at least 30, at least 35, at least 40, at least 45, or at least 50 or more nanowires may be positioned in electrical communication with the cell, or with a portion thereof, e.g., axons and/or dendrites if the cell is neuron. In some embodiments, more than one nanowire may be inserted in the cell, or portion thereof. For example, at least 3, at least 4, at least 5, at least 10, at least 15, at least 20, at least 25, at least 30, at least 35, at least 40, at least 45, or at least 50 or more nanowires may be inserted in the cell, or with a portion thereof. Thus, a plurality of nanowires may each be used in some embodiments to independently measure a distinct region of the cell. If more than one nanoscale wire is present, the nanowires may each independently be the same or different.
In some cases, the nanowires may be positioned relatively close to each other. For instance, the nanowires may he positioned such that they are separated by a distance of no more than about 200 nm, about 150 nm, or about 100 nm. In some cases, the nanowires may be positioned such that they are substantially parallel to each other. In some cases, cells may be positioned such that it is in contact with at least some of the nanoscale wires.
In one set of embodiments, the nanoscale wires and/or the cells are positioned on the surface of a substrate. Suitable substrates and substrate materials are discussed in more detail herein. In some cases, the surface of the substrate may be treated in any fashion that allows binding of cells to occur thereto. For example, the surface may be ionized and/or coated with any of a wide variety of hydrophilic and/or cytophilic materials, for example, materials having exposed carboxylic acid, alcohol, and/or amino groups. In another set of embodiments, the surface of the substrate may be reacted in such a manner as to produce carboxylic acid, alcohol, and/or amino groups on the surface. In some cases, a cell adhesion factor may be used to facilitate adherence of the cells to the substrate, i.e., a biological material that promotes adhesion or binding of cells, for example, materials such as polylysine or other polyamino acids, fibronectin, laminin, vitronectin, albumin, collagen, or peptides or proteins containing RGD sequences. The cell adhesion factor may be deposited on all, or at least a portion of, the substrate.
Such devices may be used, for example, to determine the responses of neurons or other cells (e.g., healthy or diseased cells) to drug candidates or other substances, e.g., in a parallel fashion. In some cases, high-throughput screening of drug candidates may be performed using various embodiments as discussed herein., e.g., to screen for treatments for neurological disorders or other conditions. Examples of neurological disorders include, but are not limited to, Parkinson's, Alzheimer's, hyperactivity disorders, epilepsy, and autism. In some cases, certain embodiments may be used to screen drug candidates that may potentially target ion channels (e.g., voltage-gated ion channels, ligand-gated ion channels). In certain embodiments, the drug candidates may potentially target neuronal nicotinic acetylcholine receptors (nAchRs). According to some embodiments, the effects of drug candidates may be evaluated by studying the peak and steady-state components of measured currents as a function of drug concentration and/or treatment protocol.
In some cases, the device may interface with a neuronal network, e.g., to alter synaptic connection strengths or create artificial inter-neuron connections, or for repairing or engineering network dynamics (e.g., intracellular coupling enables single-cell resolution control, while parallelism enables global network control). In some cases, the device may form at least part of a neuroprosthesis. For example, by selectively stimulating a neuronal network, the device may augment sensory, motor, and/or cognitive abilities of a human and/or non-human animal. In some cases, certain devices may be used to combat neurological disorders, for example by suppressing seizures and/or providing brain circuit rebalancing.
Some aspects are directed to methods of fabricating devices comprising one or more nanowires and an integrated circuit. In some embodiments, the method is performed at relatively low temperatures. It may be advantageous, in certain cases, for the method to be performed at relatively low temperatures in order maintain the functionality of the integrated circuit. For example, in certain cases, an integrated circuit (e.g., a CMOS circuit) may lose functionality at relatively high temperatures (e.g., above 450° C.). Accordingly, in some embodiments, the methods are performed at temperatures of about 450° C. or less, about 400° C. or less, about 350° C. or less, about 300° C. or less, about 200° C. or less, or about 100° C. or less.
In certain embodiments, the method comprises depositing a protective layer on an integrated circuit (e.g., a CMOS chip). In some cases, the presence of a protective layer may advantageously inhibit chemical attacks on exposed portions of the CMOS chip during further processing steps, such as etching. The protective layer may also provide a high-quality underlying material for generation of nanowires. Suitable methods of deposition include, but are not limited to, physical vapor deposition (e.g., sputter deposition), chemical vapor deposition, atomic layer deposition, thermal evaporation, and/or electron beam evaporation. In some cases, the protective layer comprises an electrically conductive material. In certain embodiments, the electrically conductive material comprises a metal. Non-limiting examples of suitable metals include titanium (Ti), platinum (Pt), gold (Au), and aluminum (Al). The protective layer may have sufficient thickness to prevent diffusion of CMOS materials from the integrated circuit to the top of the protective layer during subsequent processing steps. The thickness of the protective layer may, in some cases, be at least about 100 nm, at least about 200 nm, at least about 500 nm, at least about 1 μm, at least about 1.5 μm, or at least about 2 μm. In some cases, the thickness of the protective layer is about 2 μm or less, about 1.5 μm or less, about 1 μm or less, about 500 nm or less, about 200 nm or less, or about 100 nm or less, etc. Combinations of the above-noted ranges are also possible (e.g., about 200 nm to about 2 μm). In some cases, the protective layer has a substantially uniform thickness. In some embodiments, the protective layer is substantially smooth.
In some embodiments, the method comprises depositing a nanowire-material-comprising layer on the integrated circuit or the protective layer. Non-limiting examples of suitable deposition methods include plasma-enhanced chemical vapor deposition (PECVD), sputtering, and/or atomic layer deposition (ALD). In certain embodiments, the nanowire-material-comprising layer comprises silicon dioxide (SiO2). However, the nanowire-material-comprising layer may comprise any material suitable for the formation of nanowires. For example, the nanowire-material-comprising layer may comprise silicon, silicon nitride, silicon carbide, iron oxide, aluminum oxide, iridium oxide, tungsten, stainless steel, silver, platinum, and/or gold. The nanowire-material-comprising layer may, in some cases, have relatively strong adhesion to an underlying layer (e.g., protective layer). In certain embodiments, the nanowire-material-comprising layer has a substantially uniform thickness. The nanowire-material-comprising layer may, in some embodiments, have a thickness in the range of about 1 micrometer to about 5 micrometers or about 1 micrometer to about 10 micrometers.
In some embodiments, the method further comprises forming an etch mask on the nanowire-material-comprising layer. In some cases, the etch mask comprises a positive resist. The positive resist may refer to a material that becomes soluble to a resist developer after being exposed to a beam of photons or electrons. When a beam of photons is used, the technique is generally termed photolithography, and when a beam of electrons is used, the technique is generally referred to as electron beam lithography. Examples of positive resists used in photolithography include, but are not limited to, poly(methyl methacrylate) (PMMA) and SPR220, S1800 series, and ma-P1200 series photoresists. Other examples of photoresists include, but are not limited to, SU-8, S1805, LOR 3A, poly(methyl glutarimide), phenol formaldehyde resin (diazonaphthoquinone/novolac), diazonaphthoquinone (DNQ), Hoechst AZ 4620, Hoechst AZ 4562, Shipley 1400-17, Shipley 1400-27, Shipley 1400-37, or the like. Examples of positive resists used in electron beam lithography include, but are not limited to, PMMA, ZEP 520, APEX-E, EBR-9, and UV5.
In some embodiments, at least a portion of the positive resist may be exposed to light (visible, UV. etc.), electrons, ions, X-rays, etc. For example, at least a portion of the positive resist may be exposed to light within a stepper. In some cases, the exposed portions of the positive may be dissolved. An etch mask comprising a plurality of substantially circular discs of positive resist may then be formed, according to some embodiments.
In some embodiments, a negative resist is used instead of (or in addition to) a positive resist. The negative resist may be a material that becomes less soluble to a resist developer after being exposed to a beam of photons or electrons. Several non-limiting examples of negative resists used in photolithography include SU-8 series photoresists, KMPR 1000, and UVN30. Additional non-limiting examples of negative resists used in electron beam lithography include hydrogen silsesquioxane (HSQ) and NEB-31. It should be appreciated that any positive resist, negative resist, or resist developer known in the art may be used. Resist developers for photolithography include aqueous solutions with either an organic compound such as tetramethylammonium hydroxide or an inorganic salt such as potassium hydroxide, and they may also contain surfactants. Resist developers for electron beam lithography may include methyl isobutyl ketone and isopropyl alcohol.
In some cases, the portions of the nanowire-material-comprising layer no longer protected by the photoresist may subsequently be etched (e.g., to form nanopillars). Any etching technique known in the art may be used. In some embodiments, a dry etching technique (e.g., reactive ion etching) may be used. In some cases, the nanowire-material-comprising layer may be further etched to form nanowires. In some cases, a wet etching technique (e.g., using an acid, such as buffered hydrofluoric acid) may be used for further etching.
According to some embodiments, the method further comprises conformally coating one or more nanowires with an electrically conductive material. In some embodiments, the electrically conductive material is a metal. Non-limiting examples of suitable metals include gold (Au), platinum (Pt), titanium (Ti), aluminum (Al), copper (Cu), chromium (Cr), and/or silver (Ag). In some cases, the electrically conductive material is a non-metal. A non-limiting example of a suitable non-metal is iridium oxide. Suitable coating techniques include, but are not limited to, contact lithography, sputtered metallization, thermal evaporation, electron beam evaporation, and/or atomic layer deposition. In some cases, a contact lithography step may be followed by a sputtered metallization step.
In certain embodiments, the conformally-coated nanowires may be selectively passivated by coating the integrated circuit and/or nanowire sidewalls with a substantially electrically insulating material. For example, in some embodiments, one or more conformally-coated nanowires may be coated with silicon dioxide (SiO2), alumina (Al2O3), and/or hafnium oxide (HfO2). Non-limiting examples of suitable coating techniques include atomic layer deposition (ALD), PECVD, sputtering, thermal evaporation, and/or electron beam evaporation. In some cases, the passivation layer may be relatively thin. For example, in a particular example, the passivation layer may comprise 200 nm alumina and 20 nm silicon dioxide. In some cases, the passivation layer may be etched to expose the electrically conductive coating (e.g., at the tips of the nanowires). Any etching technique known in the art may be used. In some embodiments, a wet etching technique may be used.
An exemplary schematic illustration of a fabrication process is shown in
The following documents are incorporated herein by reference in their entireties: U.S. patent application Ser. No. 13/264,587, filed Oct. 14, 2011, entitled “Molecular Delivery with Nanowires,” by Park, et al., published as U.S. Patent Application Publication No. 2012/0094382 on Apr. 19, 2012; International Patent Application No. PCT/US11/53640, filed Sep. 28, 2011, entitled “Nanowires for Electrophysiological Applications,” by Park, et al., published as WO 2012/050876 on Apr. 19, 2012; International Patent Application No. PCT/US2011/53646, filed Sep. 28, 2011, entitled “Molecular Delivery with Nanowires,” by Park, et al., published as WO 2012/050881 on Apr. 19, 2012; U.S. Provisional Patent Application Ser. No. 61/684,918, filed Aug. 20, 2012, entitled “Use of Nanowires for Delivering Biological Effectors into Immune Cells,” by Park, et al.; and U.S. Provisional Patent Application Ser. No. 61/692,017, filed Aug. 22, 2012, entitled “Fabrication of Nanowire Arrays,” by Park, et al. In addition, the following PCT applications, each filed on Mar. 15, 2013, are incorporated herein by reference in their entireties: International Patent Application No. PCT/US2013/032457, entitled “Use of Nanowires for Delivering Biological Effectors into Immune Cells”; International Patent Application No. PCT/US2013/032486, entitled “Fabrication of Nanowire Arrays”; and International Patent Application No. PCT/US2013/032486, entitled “Microwell Plates Containing Nanowires.”
In addition, U.S. Provisional Patent Application Ser. No. 62/101,931, filed Jan. 9, 2015, entitled “Nanowire Arrays for Neurotechnology and Other Applications,” by Park, et al.; and U.S. Provisional Patent Application Ser. No. 62/126,402, filed Feb. 27, 2015, entitled “Nanowire Arrays for Neurotechnology and Other Applications,” by Park, et al., are each incorporated herein by reference in their entireties.
The following examples are intended to illustrate certain embodiments of the present invention, but do not exemplify the full scope of the invention.
EXAMPLE 1One challenge of experimental neuroscience is to create tools that can perform intracellular and parallel recording/stimulation of electrophysiological activities in a mammalian neuronal network. Intracellular access is greatly desired due to its high sensitivity and clear cell-to-electrode registry (single-cell resolution). Parallel, simultaneous interrogation of a large number of neurons is necessary for studying the dynamics of a complex neuronal network as a whole. A tool enabling both of these tasks will have a translational impact in neuroscience and neurotechnology, yet no such tool is available. For example, the Nobel-prize winning patch clamp technique is a powerful method for intracellular recording and stimulation, but this glass pipette technique cannot be scaled for large-scale parallel measurements. The high-density microelectrode array, such as the Utah array, is suited for parallel recording, but the microelectrodes are too large to penetrate mammalian neurons, and thus they can perform only extracellular recording.
This example uses advances in CMOS technology to develop a practical forefront tool that can perform intracellular and parallel neuronal coupling at a large scale. For example, the number of nanowire recording sites may be about 10,000, and this nanowire array may be made “active” by fabricating it on top of a CMOS integrated circuit (IC) (
The ability of this new device to perform intracellular and massively parallel neuronal interrogation facilitates drawing functional wiring diagrams of neuronal networks, offering a step toward understanding the machinery behind the brain. It also opens up new exciting vistas in neurotechnology. For example, the device can intracellularly examine the response of disease-affected neurons to drug candidates in a highly parallel fashion, enabling high-throughput pharmaceutical screening for neurological disorders. As another example, the device interfaced with a neuronal network can alter synaptic connection strengths or create artificial inter-neuron connections, repairing or engineering network dynamics (intracellular coupling enables single-cell resolution control, while parallelism enables global network control); therefore, the device may offer improved neuroprosthesis strategies to augment sensory, motor, and cognitive capabilities or to combat neurological disorders (e.g., suppression of seizures; brain circuit rebalancing in Parkinson's disease).
In one set of experiments, a CMOS IC was designed and fabricated with 32×32=1024 recording/stimulation sites (
The packaged chip (
Large-scale intracellular neuronal recording and stimulation, the operation of the massively parallel array (say 128×128=16,384 sites) are also possible. For example, global digital control circuit in the IC may be implemented and used to sequentially yet rapidly scan the array from one sub-group to another. For example, in the recording mode, the 16,384 site amplifiers' outputs can be read by moving from one row (128 sites) to another row with a 2 MHz clock. Once all 128 rows are scanned after a time duration of 1/(2 MHz)×128˜0.06 ms, the scan will repeat. The sampling rate for each site in this example is about 15 kHz, which is sufficient to resolve action potentials.
EXAMPLE 2This example illustrates one embodiment of the invention using CMOS. In this example, vertical nanowires are top-down defined on the CMOS chip, with the dimensions (150 nm diameter; 3 micrometers height), which are useful for coupling with biological cells.
The biological signals of interest to be measured through the nanowire-amplifier chain include both post synaptic potentials (PSPs) and action potentials (APs). These signals have low amplitude (Vm is about 3 mV for PSPs and about 100 mV for APs) and low frequency (about 1 Hz to about 100 Hz for PSPs and about 0.1 kHz to about 20 kHz for APs), which can readily lend themselves to contamination by 1/f noise. This is compounded by the large nanowire impedance due to Ca, which, in conjunction with Cp and amplifier input impedance, divides down the signal voltages significantly.
The first stage amplifier, a single-ended low noise amplifier (LNA), is used for signal processing as it determines the signal-to-noise ratio (SNR) of the recorded signals. A simple two stage opamp topology,
A high-pass filter (a diode pseudo resistor in parallel with a poly-insulator-poly capacitor) is placed in the negative feedback path with a 5-Hz 1-pole cutoff. This filters in most information of PSPs, yet filters out dc drift and below-cutoff 1/f noise, both of which could otherwise saturate subsequent amplifiers. The use of diode pseudo resistor,
A variable gain amplifier (VGA) is used after the LNA in order to account for a wider signal range (PSP signals are about 1 mV and APs are about 100 mV) while maintaining good signal-to-noise ratio for routing off chip. The variable gain is controlled by a local digital memory (
An output multiplexer is used to allow for simultaneous recording of all pixels (
This example demonstrates intracellular recording of an electrical signal from a neuron using a nanowire in electrical communication with an integrated circuit, according to an embodiment of the invention. Embryonic rat hippocampus and cortical neurons were used.
In this example, a patch clamp in current clamp mode was used to apply current pulses to a neuron. The applied current pulses caused the neuron to fire an action potential, which was read through the nanowire (which was inserted in the neuron) by an amplifier of the integrated circuit. The signal had an amplitude around 40 mV, and the membrane-to-nanowire attenuation was calculated to be about 100 V/V. Due to the close correlation between the output of the nanowire-connected amplifier (
This example demonstrates intracellular stimulation of a neuron using a nanowire in electrical communication with an integrated circuit, according to an embodiment of the invention. Embryonic rat hippocampus and cortical neurons were used.
In this example, biphasic voltage pulses were applied to the nanowire, which was inserted in the neuron. The response of the neuron was recorded by a patch clamp in current clamp mode.
Five biphasic voltage pulses were applied to the neuron (
This example demonstrates intracellular recording of electrical signals from a cardiomyocyte using a nanowire in electrical communication with an integrated circuit, according to an embodiment of the invention. A neonatal rat ventricular cardiomyocyte was used.
In this example, a nanowire was inserted into a cardiomyocyte, and electrical signals from the cardiomyocyte were recorded through the nanowire by an amplifier of the integrated circuit. Cardiomyocytes typically fire action potentials spontaneously, resulting in beating that can be observed with an optical microscope. Accordingly, a patch clamp is not needed for verification.
This example thus demonstrated the ability of nanowire in electrical communication with an integrated circuit to record electrical signals from cardiomyocytes.
EXAMPLE 6This example demonstrates intracellular stimulation of a cardiomyocyte using a nanowire in electrical communication with an integrated circuit, according to an embodiment of the invention. A neonatal rat ventricular cardiomyocyte was used.
This example describes the use of an embodiment of the invention for therapeutic purposes.
In this example, vertical silicon nanowire (NW) electrodes are combined with backside complementary metal-oxide-semiconductor (CMOS) circuitry to form a high-throughput, scalable platform that can monitor and control the activity of neurons in complex networks of dissociated cultures and tissue preparations. This CMOS nanowire electrode array (CNEA), which comprises about 250,000 recording/stimulation sites, is well-suited for high-throughput electrophysiological screening, the most direct method of measuring neuronal activity.
The CNEA platform enables intracellular recording and stimulation of neuronal activity in primary mammalian neurons in a similar fashion to patch clamp pipettes. Moreover, it facilitates high-throughput, massively parallel measurements of individual neurons as well as of interconnected neurons in a network, measurements that are currently only possible at the scale of a few cells. These capabilities make the CNEA platform an optimal assay for screening novel ion channel drug candidates in addition to helping elucidate the electrophysiological characteristics cellular mechanism of the corresponding neurological disorders.
Neuronal activity is largely mediated by ion channels, which are membrane-spanning proteins that gate the flow of specific small ions in and out of cells in response to chemical or electrical stimuli. Defects in ion channels are the basis of a wide variety of neurological disorders. Neuronal nicotinic acetylcholine receptors (nAchRs) are cholinergic receptors that represent a superfamily of ligand-gated ion channels. NAchRs are generally pentameric complexes comprising different combinations of alpha (α2-α10) and beta (β3, β4, β5) subunits. Some subtypes are widely distributed throughout the central nervous system while others are found only in rather restricted areas. These receptors are emerging as potential drug targets for a variety of neurological diseases including Parkinson's disease (PD), Morbus Alzheimer, and hyperactivity disorders. These neuronal pathologies are classified as multifactorial disorders caused by a combination of genetic susceptibility and environmental factors. PD—a movement disorder characterized by tremor, rigidity, and bradykinesia—is one of the most common progressive neurodegenerative disorders in the United States. Variants in nAchR genes have been identified as highly probable candidates associated with PD genetic risk factors. Despite the increased interest in their potential as druggable targets they remain underutilized, and their physiology as well as involvement in neuronal pathologies remains poorly understood.
Several nAchR subtypes expressed in the signaling pathway affected in Parkinson's disease have been identified, including the α4β2*, α6β2*, α4β2β3, and α4α6β2β3 subtypes. The α4α6ββ3 subtype is significantly affected even in moderate degeneration, making it a particularly relevant target for PD therapeutics. However, because of the complexity of the signaling pathway, a lack of optimal tools to study it, and a lack of highly selective receptor ligands, their exact role in PD is not fully understood. It remains unclear whether nAchR ligands exert their beneficial effects via receptor activation or blockage, leaving unresolved the question whether agonist or antagonist ligands would prove most beneficial for the treatment of PD symptoms.
The CNEA provides an ideal platform to elucidate their function and screen a multitude of potential therapeutic compounds in a high-throughput fashion in primary mammalian neurons, which cannot be studied with currently available high-throughput techniques. The CNEA can be used to comprehensively identify and classify the nAchR subtypes affected in PD and their corresponding phenotype using, for example, neurons extracted from validated Parkinsonian mouse models that recapitulate the symptoms and pathological features of PD. The CNEA can also be used to identify therapeutic compounds (e.g., compounds targeted at α4β2* and α6β2*) by screening and profiling the effects of the compounds on nAchR-subtype mediated currents. In particular, to characterize the modulatory effects of drug candidates, the modulation of the peak and steady state component of these currents as a function of drug concentration and treatment protocol can be measured and evaluated.
Another major line of research in drug discovery efforts for PD is focused on targeting pre- and postsynaptic sites in dopaminergic neurons. The rationale for such work stems from recent research suggesting that impairment in synaptic plasticity (activity-dependent changes in synaptic efficacy such as long-term potentiation (LTP) and long-term depression (LTD)) can result in the onset and progression of PD19. Electrophysiological measurements via whole-cell patch clamping in slices generated from PD mouse models have begun to elucidate the pre- and postsynaptic properties of direct-pathway and indirect-pathway synapses on medium spiny neurons. These pathways have been identified to contribute directly to the pathophysiologies of PD. In addition, efforts have been made to identify neuromodulators that can rescue normal synaptic modulation in PD mouse models aiming to identify potential targets for therapeutic treatment. However, these efforts have been limited by the low throughput of whole-cell patch clamp experiments. The CNEA, being able to simultaneously stimulate and record the activity of multiple connected neurons in dissociated cultures and tissue slice preparations, provides a well-suited platform to study and characterize these synaptic pathways at a much higher throughput, thus expediting the process of discovery of more potential drug targets as well as that of screening the effect of novel therapeutic compounds. The change in synaptic efficacy can be characterized by studying the change in amplitude as well as in the rising slope of evoked postsynaptic potentials (PSPs). The CNEA can be utilized to evoke and monitor PSPs in a spatially and temporally well-controlled manner. Studies in Parkinsonian mouse models have demonstrated that alterations in the subunit composition of N-methyl-D-aspartate (NMDA) receptors result in the impairment of synaptic plasticity, which in turn contributes to the pathological characteristics of PD. The CNEA can be used to screen therapeutic compounds targeting NMDA receptors with the goal of identifying compounds that can rescue normal LTP and/or LTD in PD models. Previous studies have demonstrated that endocannabinoids mediate LTD rescue in a PD mouse model, inspiring efforts towards the development of therapeutic compounds that modulate the levels of endocannabinoids being produced.
In addition to using the CNEA with mouse neurons, the CNEA can be used with human neurons derived from induced pluripotent stem cells (iPSCs) or directly induced from fibroblasts obtained from PD patients in order to validate and further characterize the most promising compounds in human-derived cells. Recently, iPSCs derived from PD patients have been successfully used to generate a broad variety of neuronal cell types and isolate the ones that are specifically involved in PD. These human-derived neurons offer an ideal system to screen novel therapeutic compounds in addition to validating findings of experiments with mouse models. Moreover, they enable the study and characterization of patient-specific disease phenotype and allow the development of personalized treatments. Accordingly, the CNEA platform enables high-throughput electrophysiological experiments with human-derived neurons in addition to allowing full integration with a variety of cellular assays, making possible truly multiplexed experiments.
EXAMPLE 8This example describes the fabrication of an integrated nanowire-CMOS device. The generation of the front nanoelectrode cellular interface array was achieved via a multi-level and complex nanofabrication process. The complexity of the nanofabrication process was due to the complementary metal-oxide-semiconductor (CMOS) technology, which typically can withstand full functionality if exposed only to temperatures below 450° C. In addition, the functional goals of the final device layout—a cellular interface that was intracellular, individual, and parallel—further extended the nanofabrication requirements and limitations. The fabrication process, summarized in
Initially, to prevent any functional or physical damage to the CMOS chip, the fabrication process began by protecting the CMOS exposed Aluminum-metal-layer-4 (Al-4) via sputter deposition of a Titanium (Ti) and Platinum (Pt) metal layer. The optimally thick and high-resolution Ti-Pt protection layer ensured: (1) inhibition of any chemical attacks of the exposed Al-4 possible during etch processing, (2) prevention of the Al-4 diffusion to the top of the protection layer during high temperature processes, and (3) generation of a high-quality underlying material for the generation of the top nanowire electrodes.
Second, to facilitate the generation of high-quality structural material for the nanowire electrodes and prevent any impairment of the CMOS chip, a plasma-enhanced chemical vapor deposition (PECVD) was developed to deposit silicon dioxide (SiO2) at a temperature of only 350° C. The developed PECVD process included: (1) ensuring a highly clean substrate, (2) stabilizing the chamber vacuum, (3) ensuring a plasma chamber uniformity, (4) establishing a stable plasma prior to the deposition start, and (5) maintaining a low silane to nitrous ratio. To fabricate the vertical nanowire electrode array for interfacing two-dimensional in vitro cultures, a 3.5 μm-thick layer of SiO2 was deposited via this PECVD process, which gave rise to an excellent uniformity and structural quality material with strong adhesion to the underlying pixel metal.
Subsequently, a stepper lithography process was developed to allow the generation of an accurately aligned, widely uniform (across the large pixel array), and high quality etch mask. The stepper lithography process was used to generate the array of the etch mask consisting of photoresist discs 1 μm in diameter—aligned centrally on top of the active pixel array. Such an etch mask facilitated the generation of the highly uniform array of vertical nanoelectrodes via reactive ion etching (RIE) of the surrounding SiO2 surface. Once the characteristics of the RIE process were characterized and subsequently improved, a highly selective and reproducible SiO2 etching was achieved that facilitated the generation of initial vertical structures with high aspect ratio and the designed vertical etch profile. Subsequently, SiO2 isotropic wet etching was used to achieve the final structural profile of the vertical nanowire (length, 3 μm; diameter, 100 nm).
Next, electrical activation of the tips of the vertical nanowire electrodes in addition to conductive connection with the underlying metallized pixel was achieved through selective and conformal metallization. Contact lithography followed by sputtered metallization allowed the generation of a small grain metal layer with high conductivity and small grain size. The chip surface and nanowire sidewalls were then selectively passivated with 200-nm Al2O3 and 20-nm SiO2, respectively, so that only the upper portion of each metalized nanowire was exposed. The final results of the fabrication process are summarized in
The design, development, and optimization of the nanofabrication process flow facilitated the generation of an efficient interface between biological neuronal networks and the underlying electronic circuitry. First, the final profile geometry of the vertical nanowires made possible the intracellular interface of individual neurons. Secondly, the electrical properties of these nanoelectrodes (e.g., electrically conductive nanowire tips, selectively insulated base) provided direct electrical access to the cell's interior with minimal effect on cellular viability. Thirdly, the fabrication of the uniform nanoelectrode array (geometrically and electrically) across the CNEA chip allowed the generation of 1,024 independently addressable recording/stimulation sites at a 84-μm pitch in a 25-mm2 area.
EXAMPLE 9Intracellular recording is important in electrophysiology because it allows high fidelity study of ion channel activities in electrogenic cells. Concurrent recording of a large number of cells is desired for examining network dynamics and function. This example illustrates a solid-state electronic chip as a new concept electrophysiology tool that can address the long-standing intracellular vs. parallel dichotomy. The chip construct in this example is an array of vertical metallic nanowire electrodes (NWE) on the surface of a custom-designed CMOS integrated circuit (IC). The small electrodes can penetrate the cellular membrane, attaining intracellular access. Their top-down implementation into the large-scale array (1,024 sites) offers parallelism. It is the in situ electronic functions—amplification, stimulation, and multiplexing—of the underlying CMOS IC that may make possible the parallel operation of the intracellular nano-bio interface array.
This example demonstrates the parallel and intracellular recording/stimulation ability of this particular device with in vitro neonatal rat ventricular myocytes (NRVM) cultured on the chip. Network level analysis including action potential propagation is performed in this example using intracellular recordings from 364 NRVMs in the same tissue. Moreover, intracellular recording allows for investigation of important fine details of membrane potentials—such as early afterdepolarizations (EADs) caused by a Na+ channel toxin, ATX-II—whereas parallel recording maps corresponding spatial propagations. The high-fidelity intracellular interrogation of large-scale electrogenic networks demonstrated in the present example can benefit not only pharmacological screening of ion channel drugs (used here as a demonstrational example) for cardiac and neuronal diseases, but also other applied and fundamental studies in electrophysiology.
The ICs were custom designed IC in 5.0 V 0.35 micrometer CMOS technology (as shown in
The CMOS-nanowire electrode array chip were then packaged to form a microfluidic well for cell culture (
The design of the CMOS pixel circuitry in the device presented challenges due to the high impedance (˜gigaohms) intracellular nanoelectrodes to which it had to interface (
The pixel circuit of
To verify the pixel circuit's functions and the NWE's intracellular capability, experiments were performed using single isolated NRVMs (
After single-pixel verification, network level recording was performed on heating monolayer-dominated in vitro NRVM tissue cultures to investigate the device's capability for parallel electrophysiology. Extracellular recordings from 968 pixels were first performed where the tissue showed a spatially homogenous propagation across the tissue (
Using the network level extracellular and intracellular capabilities of the device, the effects of various drugs on NRVM tissue were then characterized using these devices (
With the intracellular network-level recording capability, it was also possible to monitor the development of drug induced arrhythmias, triggered activity (TA), and propagation of early after depolarizations (EADs) within NRVM tissue (
This example shows parallel intracellular interrogation, combining the intracellular capability of NWEs with the scalability of CMOS IC technology. Harnessing advances in CMOS fabrication techniques, it is possible to implement a larger number of pixels and smaller pitch size for higher spatial resolution.
While several embodiments of the present invention have been described and illustrated herein, those of ordinary skill in the art will readily envision a variety of other means and/or structures for performing the functions and/or obtaining the results and/or one or more of the advantages described herein, and each of such variations and/or modifications is deemed to be within the scope of the present invention. More generally, those skilled in the art will readily appreciate that all parameters, dimensions, materials, and configurations described herein are meant to be exemplary and that the actual parameters, dimensions, materials, and/or configurations will depend upon the specific application or applications for which the teachings of the present invention is/are used. Those skilled in the art will recognize, or be able to ascertain using no more than routine experimentation, many equivalents to the specific embodiments of the invention described herein. It is, therefore, to be understood that the foregoing embodiments are presented by way of example only and that, within the scope of the appended claims and equivalents thereto, the invention may be practiced otherwise than as specifically described and claimed. The present invention is directed to each individual feature, system, article, material, kit, and/or method described herein. In addition, any combination of two or more such features, systems, articles, materials, kits, and/or methods, if such features, systems, articles, materials, kits, and/or methods are not mutually inconsistent, is included within the scope of the present invention.
All definitions, as defined and used herein, should be understood to control over dictionary definitions, definitions in documents incorporated by reference, and/or ordinary meanings of the defined terms.
The indefinite articles “a” and “an,” as used herein in the specification and in the claims, unless clearly indicated to the contrary, should be understood to mean “at least one.”
The phrase “and/or,” as used herein in the specification and in the claims, should be understood to mean “either or both” of the elements so conjoined, i.e., elements that are conjunctively present in some cases and disjunctively present in other cases. Multiple elements listed with “and/or” should be construed in the same fashion, i.e., “one or more” of the elements so conjoined. Other elements may optionally be present other than the elements specifically identified by the “and/or” clause, whether related or unrelated to those elements specifically identified. Thus, as a non-limiting example, a reference to “A and/or B”, when used in conjunction with open-ended language such as “comprising” can refer, in one embodiment, to A only (optionally including elements other than B); in another embodiment, to B only (optionally including elements other than A); in yet another embodiment, to both A and B (optionally including other elements); etc.
As used herein in the specification and in the claims, “or” should be understood to have the same meaning as “and/or” as defined above. For example, when separating items in a list, “or” or “and/or” shall be interpreted as being inclusive, i.e., the inclusion of at least one, but also including more than one, of a number or list of elements, and, optionally, additional unlisted items. Only terms clearly indicated to the contrary, such as “only one of” or “exactly one of,” or, when used in the claims, “consisting of,” will refer to the inclusion of exactly one element of a number or list of elements. In general, the term “or” as used herein shall only be interpreted as indicating exclusive alternatives (i.e. “one or the other but not both”) when preceded by terms of exclusivity, such as “either,” “one of,” “only one of,” or “exactly one of.” “Consisting essentially of,” when used in the claims, shall have its ordinary meaning as used in the field of patent law.
As used herein in the specification and in the claims, the phrase “at least one,” in reference to a list of one or more elements, should be understood to mean at least one element selected from any one or more of the elements in the list of elements, but not necessarily including at least one of each and every element specifically listed within the list of elements and not excluding any combinations of elements in the list of elements. This definition also allows that elements may optionally be present other than the elements specifically identified within the list of elements to which the phrase “at least one” refers, whether related or unrelated to those elements specifically identified. Thus, as a non-limiting example, “at least one of A and B” (or, equivalently, “at least one of A or B,” or, equivalently “at least one of A and/or B”) can refer, in one embodiment, to at least one, optionally including more than one, A, with no B present (and optionally including elements other than B); in another embodiment, to at least one, optionally including more than one, B, with no A present (and optionally including elements other than A); in yet another embodiment, to at least one, optionally including more than one, A, and at least one, optionally including more than one, B (and optionally including other elements); etc.
When the word “about” is used herein in reference to a number. it should be understood that still another embodiment of the invention includes that number not modified by the presence of the word “about.”
It should also be understood that, unless clearly indicated to the contrary, in any methods claimed herein that include more than one step or act, the order of the steps or acts of the method is not necessarily limited to the order in which the steps or acts of the method are recited.
In the claims, as well as in the specification above, all transitional phrases such as “comprising,” “including,” “carrying,” “having,” “containing,” “involving,” “holding,” “composed of,” and the like are to be understood to be open-ended, i.e., to mean including but not limited to. Only the transitional phrases “consisting of” and “consisting essentially of” shall be closed or semi-closed transitional phrases, respectively, as set forth in the United States Patent Office Manual of Patent Examining Procedures, Section 2111.03.
Claims
1. An article, comprising:
- a plurality of upstanding nanowires on a substrate, in electrical communication with an integrated circuit.
2. The article of claim 1, wherein the substrate is physically connected to the integrated circuit.
3. The article of any one of claims 1-2, wherein the substrate is substantially planar.
4. The article of any one of claims 1-3, wherein the integrated circuit is substantially planar.
5. The article of any one of claims 1-4, wherein the substrate is adjacent the integrated circuit.
6. The article of any one of claims 1-5, wherein the integrated circuit comprises a CMOS.
7. The article of any one of claims 1-6, wherein at least some of the nanowires are individually addressable via the integrated circuit.
8. The article of any one of claims 1-7, wherein each of the nanowires are individually addressable via the integrated circuit.
9. The article of any one of claims 1-8, wherein the nanowires are attached to the substrate along a substantially vertical direction relative to the substrate.
10. The article of any one of claims 1-9, wherein at least some of the nanowires are silicon oxide nanowires.
11. The article of any one of claims 1-10, wherein the integrated circuit comprises a plurality of connection sites in electrical communication with one or more nanowires of the plurality of nanowires.
12. The article of claim 11, wherein at least a portion of the connection sites comprise an amplifier unit and/or a stimulator unit.
13. The article of claim 12, wherein at least a portion of the amplifier units comprise a high-pass filter comprising a plurality of diodes.
14. The article of any one of claims 11-13, wherein the integrated circuit comprises at least about 1,000 connection sites.
15. The article of any one of claims 12-14, wherein the integrated circuit comprises at least about 1,000 amplifier units and/or at least about 1,000 stimulator units.
16. The article of any one of claims 1-15, wherein the plurality of upstanding nanowires comprises at least about 1,000 nanowires.
17. The article of any one of claims 1-16, wherein the average length of the nanowires is 0.1-10 micrometers (μm).
18. The article of any one of claims 1-17, wherein the average diameter of the nanowires is 50-300 nm.
19. The article of any one of claims 1-18, wherein the density of the nanowires is 0.05-5 nanowires per micrometer2 (μm2).
20. The article of any one of claims 1-19, further comprising a cell in electrical communication with one or more nanowires of the plurality of nanowires.
21. The article of any one of claims 1-20, further comprising a cell penetrated by one or more nanowires of the plurality of nanowires.
22. The article of claim 21, wherein the cell is a neuron or a cardiomyocyte.
23. The article of any one of claims 1-22, wherein the substrate is a silicon substrate.
24. The article of any one of claims 1-23, wherein the upstanding nanowires form an angle with respect to the substrate, on average, of between about 80° and about 100°.
25. A method, comprising:
- inserting one or more nanowires into a cell, wherein the one or more nanowires are upstanding nanowires on a substrate and are in electrical communication with an integrated circuit.
26. The method of claim 25, further comprising recording an electrical signal from the cell through at least one of the nanowires.
27. The method of any one of claims 25-26, further comprising applying an electrical stimulus to the cell through at least one of the nanowires.
28. The method of any one of claims 25-27, wherein the substrate is physically connected to the integrated circuit.
29. The method of any one of claims 25-28, wherein the substrate is substantially planar.
30. The method of any one of claims 25-29, wherein the integrated circuit is substantially planar.
31. The method of any one of claims 25-30, wherein the substrate is adjacent the integrated circuit.
32. The method of any one of claims 25-31, wherein the integrated circuit comprises a CMOS.
33. The method of any one of claims 25-32, wherein at least some of the nanowires are individually addressable via the integrated circuit.
34. The method of any one of claims 25-33, wherein each of the nanowires are individually addressable via the integrated circuit.
35. The method of any one of claims 25-34, wherein the nanowires are attached to the substrate along a substantially vertical direction relative to the substrate.
36. The method of any one of claims 25-35, wherein at least some of the nanowires are silicon oxide nanowires.
37. The method of any one of claims 25-36, wherein the integrated circuit comprises a plurality of connection sites in electrical communication with one or more of the nanowires.
38. The method of claim 37, wherein at least a portion of the connection sites comprise an amplifier unit and/or a stimulator unit.
39. The method of claim 38, further comprising recording an electrical signal from the cell through an amplifier unit.
40. The method of any one of claims 38-39, further comprising applying an electrical stimulus to the cell through a stimulator unit.
41. The method of any one of claims 25-40, wherein the average length of the nanowires is 0.1-10 micrometers (μm).
42. The method of any one of claims 25-41, wherein the average diameter of the nanowires is 50-300 nm.
43. The method of any one of claims 25-42, wherein the density of the nanowires is 0.05-5 nanowires per micrometer2 (μm2).
44. The method of any one of claims 25-43, wherein the cell is in electrical communication with at least one of the nanowires.
45. The method of any one of claims 25-44, wherein the cell is a neuron or a cardiomyocyte.
46. The method of any one of claims 25-45, wherein the substrate is a silicon substrate.
47. The method of any one of claims 25-46, wherein the upstanding nanowires form an angle with respect to the substrate, on average, of between about 80° and about 100°.
48. A method, comprising:
- applying electroporation and/or voltage to a cell using one or more nanowires inserted into a cell, wherein the one or more nanowires are upstanding nanowires on a substrate and are in electrical communication with an integrated circuit.
49. The method of claim 48, further comprising recording one or more electrical signals from the cell through at least one of the nanowires.
50. The method of any one of claims 48-49, wherein the substrate is physically connected to the integrated circuit.
51. The method of any one of claims 48-50, wherein the substrate is substantially planar.
52. The method of any one of claims 48-51, wherein the integrated circuit is substantially planar.
53. The method of any one of claims 48-52, wherein the substrate is adjacent the integrated circuit.
54. The method of any one of claims 48-53, wherein the integrated circuit comprises a CMOS.
55. The method of any one of claims 48-54, wherein at least some of the nanowires are individually addressable via the integrated circuit.
56. The method of any one of claims 48-55, wherein each of the nanowires are individually addressable via the integrated circuit.
57. The method of any one of claims 48-56, wherein the nanowires are attached to the substrate along a substantially vertical direction relative to the substrate.
58. The method of any one of claims 48-57, wherein at least some of the nanowires are silicon oxide nanowires.
59. The method of any one of claims 48-58, wherein the average length of the nanowires is 0.1-10 micrometers (μm).
60. The method of any one of claims 48-59, wherein the average diameter of the nanowires is 50-300 nm.
61. The method of any one of claims 48-60, wherein the density of the nanowires is 0.05-5 nanowires per micrometer2 (μm2).
62. The method of any one of claims 48-61, wherein the cell is in electrical communication with at least one of the one or more nanowires.
63. The method of any one of claims 48-62, wherein the cell is a neuron or a cardiomyocyte.
64. The method of any one of claims 48-63, wherein the substrate is a silicon substrate.
65. The method of any one of claims 48-64, wherein the upstanding nanowires form an angle with respect to the substrate, on average, of between about 80° and about 100°.
66. A method, comprising:
- exposing a plurality of cells to one or more compounds, wherein at least some of the cells are penetrated with one or more nanowires, wherein the one or more nanowires are upstanding nanowires on a substrate and are in electrical communication with an integrated circuit.
67. The method of claim 66, further comprising recording one or more electrical signals from at least a portion of the cells through at least a portion of the nanowires.
68. The method of any one of claims 66-67, further comprising applying an electrical stimulus to at least a portion of the cells through at least a portion of the nanowires.
69. The method of any one of claims 66-68, wherein the substrate is physically connected to the integrated circuit.
70. The method of any one of claims 66-69, wherein the substrate is substantially planar.
71. The method of any one of claims 66-70, wherein the integrated circuit is substantially planar.
72. The method of any one of claims 66-71, wherein the substrate is adjacent the integrated circuit.
73. The method of any one of claims 66-72, wherein the integrated circuit comprises a CMOS.
74. The method of any one of claims 66-73, wherein at least some of the nanowires are individually addressable via the integrated circuit.
75. The method of any one of claims 66-74, wherein each of the nanowires are individually addressable via the integrated circuit.
76. The method of any one of claims 66-75, wherein the nanowires are attached to the substrate along a substantially vertical direction relative to the substrate.
77. The method of any one of claims 66-76, wherein at least some of the nanowires are silicon oxide nanowires.
78. The method of any one of claims 66-77, wherein the average length of the nanowires is 0.1-10 micrometers (μm).
79. The method of any one of claims 66-78, wherein the average diameter of the nanowires is 50-300 nm.
80. The method of any one of claims 66-79, wherein the density of the nanowires is 0.05-5 nanowires per micrometer2 (μm2).
81. The method of any one of claims 66-80, wherein at least some of the cells are in electrical communication at least one of the nanowires.
82. The method of any one of claims 66-81, wherein the cell is a neuron or a cardiomyocyte.
83. The method of any one of claims 66-82, wherein the substrate is a silicon substrate.
84. The method of any one of claims 66-83, wherein the upstanding nanowires form an angle with respect to the substrate, on average, of between about 80° and about 100°.
85. The method of any one of claims 66-84, wherein the one or more compounds includes one or more drug candidates suspected of interacting with at least some of the cells.
86. The method of any one of claims 66-85, wherein the one or more compounds include one or more drug candidates suspected of affecting an ion channel.
87. The method of any one of claims 66-86, wherein the one or more compounds include one or more drug candidates suspected of affecting a neuronal nicotinic acetylcholine receptor.
88. A method of fabricating a device, comprising:
- depositing a nanowire-material-comprising layer on an integrated circuit;
- generating an etch mask;
- etching the nanowire-material-comprising layer to form one or more nanowires; and
- depositing a conformal coating comprising an electrically conductive material on the one or more nanowires.
89. The method of claim 88, wherein the nanowire-material-comprising layer comprises SiO2.
90. The method of any one of claims 88-89, further comprising depositing a protective layer on an integrated circuit prior to the step of depositing the nanowire-material-comprising layer on the integrated circuit.
91. The method of claim 90, wherein the protective layer comprises Pt and/or Ti.
92. The method of any one of claims 88-91, further comprising depositing a passivation layer on the one or more nanowires coated with an electrically conductive material.
93. The method of claim 92, wherein the passivation layer comprises SiO2 and/or Al2O3.
94. The method of any one of claims 92-93, further comprising etching the tips of the one or more nanowires to remove the passivation layer and expose the electrically conductive material.
95. The method of any one of claims 88-94, wherein the electrically conductive material comprises a metal.
Type: Application
Filed: Jan 8, 2016
Publication Date: Jun 21, 2018
Applicant: President and Fellows of Harvard College (Cambridge, MA)
Inventor: Hongkun Park (Lexington, MA)
Application Number: 15/542,197