Power supply with dual inputs

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Description

FIG. 1 is a perspective view of a first embodiment of a power supply with dual inputs showing our new design;

FIG. 2 is another perspective view of the power supply with dual inputs of FIG. 1;

FIG. 3 is a front view of the power supply with dual inputs of FIG. 1;

FIG. 4 is a rear view of the power supply with dual inputs of FIG. 1;

FIG. 5 is a left view of the power supply with dual inputs of FIG. 1;

FIG. 6 is a right view of the power supply with dual inputs of FIG. 1;

FIG. 7 is a top view of the power supply with dual inputs of FIG. 1;

FIG. 8 is a bottom view of the power supply with dual inputs of FIG. 1;

FIG. 9 is an enlarged view of Part C of FIG. 1;

FIG. 10 is an enlarged view of Part D of FIG. 2;

FIG. 11 is a perspective view of a second embodiment of a power supply with dual inputs showing our new design;

FIG. 12 is another perspective view of the power supply with dual inputs of FIG. 11;

FIG. 13 is a left view of the power supply with dual inputs of FIG. 11;

FIG. 14 is a perspective view of a third embodiment of a power supply with dual inputs showing our new design;

FIG. 15 is another perspective view of the power supply with dual inputs of FIG. 14;

FIG. 16 is a left view of the power supply with dual inputs of FIG. 14;

FIG. 17 is a perspective view of a fourth embodiment of a power supply with dual inputs showing our new design;

FIG. 18 is another perspective view of the power supply with dual inputs of FIG. 17; and,

FIG. 19 is a left view of the power supply with dual inputs of FIG. 17.

The broken lines shown in FIG. 6 contain lightly shaded areas that depict the portions of the power supply with dual inputs that form no part of the claimed design.

The dash-dot broken lines that encase portions of FIGS. 1 and 2 and that border the FIGS. 9 and 10 indicate the boundary of the enlarged areas of the figures and form no part of the claimed design.

Claims

The ornamental design for a power supply with dual inputs as shown and described.

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Patent History
Patent number: D1089091
Type: Grant
Filed: Sep 30, 2024
Date of Patent: Aug 19, 2025
Assignee: Delta Electronics (Shanghai) Co., Ltd. (Shanghai)
Inventors: Yucai Zhao (Shanghai), Bing Fan (Shanghai), Kai Dong (Shanghai), Liangsong Che (Shanghai), Junlai Huang (Shanghai)
Primary Examiner: Derrick E Holland
Application Number: 29/965,863
Classifications