Computer or similar article
Latest Honeywell Information Systems, Inc. Patents:
- Multiple shared memory arrangement wherein multiple processors individually and concurrently access any one of plural memories
- Apparatus for controlling concurrent operations of a system control unit including activity register circuitry
- Address boundary detector
- Interactive terminal system using a prepoll prior to transferring information from the controller to the work station
- Computer memory apparatus
Description
FIG. 1 is a front perspective view of a computer or similar article embodying my new design;
FIG. 2 is a top plan view of the same;
FIG. 3 is a right elevational side view thereof;
FIG. 4 is a rear elevational side view of the same; and
FIG. 5 is a front elevational view thereof.
The left side, which is not shown, is the same as the right side view.
The dotted line showing of an alphonumeric notation is shown for illustrative purposes only and forms no part of the claimed design.
Referenced Cited
U.S. Patent Documents
Other references
D238685 | February 1976 | Walters |
D239293 | March 1976 | Carroll |
- Telephony, July 22, 1974, p. 42, Model 560 message center.
Patent History
Patent number: D243254
Type: Grant
Filed: Jan 19, 1976
Date of Patent: Feb 1, 1977
Assignee: Honeywell Information Systems, Inc. (Waltham, MA)
Inventor: Dennis C. Coon (Acton, MA)
Primary Examiner: Susie J. Mercer
Assistant Examiner: Christine M. Nucker
Attorney: Ronald T. Reiling
Application Number: 5/650,205
Type: Grant
Filed: Jan 19, 1976
Date of Patent: Feb 1, 1977
Assignee: Honeywell Information Systems, Inc. (Waltham, MA)
Inventor: Dennis C. Coon (Acton, MA)
Primary Examiner: Susie J. Mercer
Assistant Examiner: Christine M. Nucker
Attorney: Ronald T. Reiling
Application Number: 5/650,205
Classifications
Current U.S. Class:
D26/5C
International Classification: D1402;
International Classification: D1402;