Semi-conductor substrate with conducting pattern
Latest Ibiden Co., Ltd. Patents:
Description
FIG. 1 is a top perspective view of a substrate with conducting pattern showing our new design;
FIG. 2 is a bottom perspective view thereof;
FIG. 3 is a right side elevational view thereof;
FIG. 4 is a left side elevational view thereof;
FIG. 5 is a rear elevational view thereof; and
FIG. 6 is a front elevational view thereof;
FIG. 7 is a top plan view thereof; and
FIG. 8 is a bottom plan view thereof.
Referenced Cited
U.S. Patent Documents
Foreign Patent Documents
4288841 | September 8, 1981 | Gogal |
4437141 | March 13, 1984 | Prokop |
4513355 | April 23, 1985 | Shroeder et al. |
0232837 | August 1987 | EPX |
644662 | February 1985 | JPX |
647072 | March 1985 | JPX |
647074 | March 1985 | JPX |
647078 | March 1985 | JPX |
673983-1 | March 1986 | JPX |
673983 | March 1986 | JPX |
673984 | March 1986 | JPX |
0035653 | February 1987 | JPX |
Patent History
Patent number: D319045
Type: Grant
Filed: Apr 13, 1988
Date of Patent: Aug 13, 1991
Assignee: Ibiden Co., Ltd. (Ogaki)
Inventors: Terutomi Hasegawa (Ogaki), Nobumichi Goto (Seki)
Primary Examiner: Susan J. Lucas
Assistant Examiner: Joel Sincavage
Law Firm: Lorusso & Loud
Application Number: 7/181,256
Type: Grant
Filed: Apr 13, 1988
Date of Patent: Aug 13, 1991
Assignee: Ibiden Co., Ltd. (Ogaki)
Inventors: Terutomi Hasegawa (Ogaki), Nobumichi Goto (Seki)
Primary Examiner: Susan J. Lucas
Assistant Examiner: Joel Sincavage
Law Firm: Lorusso & Loud
Application Number: 7/181,256
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)