Wafer boat or rack for holding semiconductor wafers
Description
FIG. 1 is a front elevational view of a wafer boat or rack for holding semiconductor wafers showing my new design;
FIG. 2 is a rear elevational view thereof;
FIG. 3 is a right side view thereof, the left side view being a mirror image and, therefore, not being shown;
FIG. 4 is a top view thereof;
FIG. 5 is a bottom view thereof;
FIG. 6 is an enlarged sectional view on section 6--6 in FIG. 1; and,
FIG. 7 is an enlarged sectional view of on section 7--7 in FIG. 1.
Referenced Cited
Patent History
Patent number: D361752
Type: Grant
Filed: Sep 17, 1993
Date of Patent: Aug 29, 1995
Assignees: Tokyo Electron Kasbushiki Kaisha (Tokyo), Tokyo Electron Tohoku Kabushiki Kaisha (Esashi)
Inventor: Kenichi Yamaga (Sagamihara)
Primary Examiner: Joel Sincavage
Law Firm: Ladas & Pasrry
Application Number: 0/13,079
Type: Grant
Filed: Sep 17, 1993
Date of Patent: Aug 29, 1995
Assignees: Tokyo Electron Kasbushiki Kaisha (Tokyo), Tokyo Electron Tohoku Kabushiki Kaisha (Esashi)
Inventor: Kenichi Yamaga (Sagamihara)
Primary Examiner: Joel Sincavage
Law Firm: Ladas & Pasrry
Application Number: 0/13,079
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)