Outer tube for use in a semiconductor wafer heat processing apparatus
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Description
FIG. 1 a perspective view of a outertube for use in a semiconductor wafer heat processing apparatus;
FIG. 2 a front elevational view thereof;
FIG. 3 a top plan view thereof;
FIG. 4 a bottom plan view thereof; and,
FIG. 5 a cross-sectional view taken along line V-V in FIG. 3 .
Referenced Cited
U.S. Patent Documents
4587689 | May 13, 1986 | Lee |
5046909 | September 10, 1991 | Murdoch |
5314574 | May 24, 1994 | Takahashi |
5320218 | June 14, 1994 | Yamashita et al. |
5407449 | April 18, 1995 | Zinger |
5516732 | May 14, 1996 | Flegal |
5518360 | May 21, 1996 | Toda et al. |
5536128 | July 16, 1996 | Shimoyashiro et al. |
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5752796 | May 19, 1998 | Muka |
Patent History
Patent number: D404368
Type: Grant
Filed: Feb 2, 1998
Date of Patent: Jan 19, 1999
Assignee: Tokyo Electron Limited (Tokyo-to)
Inventor: Tomohisa Shimazu (Shiroyama-Machi)
Primary Examiner: Brian N. Vinson
Law Firm: Ladas & Parry
Application Number: 0/82,978
Type: Grant
Filed: Feb 2, 1998
Date of Patent: Jan 19, 1999
Assignee: Tokyo Electron Limited (Tokyo-to)
Inventor: Tomohisa Shimazu (Shiroyama-Machi)
Primary Examiner: Brian N. Vinson
Law Firm: Ladas & Parry
Application Number: 0/82,978
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;
International Classification: 1303;