Inner tube for use in a semiconductor wafer heat processing apparatus
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Description
FIG. 1 a perspective view of an inner tube for use in a semiconductor wafer heat processing apparatus;
FIG. 2 a front elevational view thereof;
FIG. 3 a top plan view thereof; and,
FIG. 4 a cross-sectional view taken along line IV--IV in FIG. 3.
Referenced Cited
Patent History
Patent number: D407696
Type: Grant
Filed: Feb 2, 1998
Date of Patent: Apr 6, 1999
Assignee: Tokyo Electron Limited (Tokyo-to)
Inventor: Tomohisa Shimazu (Shiroyama-machi)
Primary Examiner: Brian N. Vinson
Law Firm: Ladas & Parry
Application Number: 0/82,977
Type: Grant
Filed: Feb 2, 1998
Date of Patent: Apr 6, 1999
Assignee: Tokyo Electron Limited (Tokyo-to)
Inventor: Tomohisa Shimazu (Shiroyama-machi)
Primary Examiner: Brian N. Vinson
Law Firm: Ladas & Parry
Application Number: 0/82,977
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;
International Classification: 1303;
