Inner wall shield for a process chamber for manufacturing semiconductors

- Tokyo Electron Limited
Skip to: Description  ·  Claims  ·  References Cited  · Patent History  ·  Patent History
Description

FIG. 1 atop/left-side/rear perspective view of a first embodiment of an inner wall shield for a process chamber for manufacturing semiconductors;

FIG. 2 a front elevational view thereof;

FIG. 3 a rear elevational view thereof;

FIG. 4 a right side elevational view thereof;

FIG. 5 a left side elevational view thereof;

FIG. 6 a top plan view thereof;

FIG. 7 a bottom plan view thereof;

FIG. 8 a cross-sectional view thereof taken along line 8—8 in FIG. 2;

FIG. 9 a cross-sectional view there taken along line 9—9 in FIG. 4

FIG. 10 an enlarged view of a right-end portion of FIG. 9.

FIG. 11 a top/left-side/rear perspective view of a second embodiment of an inner wall shield for a process chamber for manufacturing semiconductors;

FIG. 12 a front elevational vie thereof;

FIG. 13 a rear elevational view thereof;

FIG. 14 a right side elevational view thereof;

FIG. 15 a left side elevational view thereof;

FIG. 16 a top plan view thereof;

FIG. 17 a bottom plan view thereof;

FIG. 18 a cross-sectional view taken alone line 8—8 in FIG. 2;

FIG. 19 a cross-sectional view taken along 9—9 in FIG. 4; and,

FIG. 20 an enlarged view taken along line 10—10 in FIG. 9.

The inner wall shield for a process chamber for manufacturing semiconductors is typically attached along the inner wall of the process chamber of an etching device. When sufficient high frequency power is connected to upper and lower electrodes of the process chamber, plasma is generated between the electrodes and the inner wall shield prevents the plasma from damaging the inner wall of the process chamber. One or more of the five small circles in one or more of the cross patterns shown in FIGS. 1, 3, 3 and 4 (two patterns), for example, are through holes that are disclaimed in other embodiments (not shown). The outer diameters of the embodiments are preferably about 670 mm, the height of the first embodiment is preferably about 110 mm and the height of the second embodiment is preferably about 150 mm.

Claims

I claim the ornamental design for inner wall shield for a process chamber for manufacturing semiconductors, as shown and described.

Referenced Cited
U.S. Patent Documents
6432203 August 13, 2002 Black et al.
6630201 October 7, 2003 Chiang et al.
Patent History
Patent number: D491963
Type: Grant
Filed: May 20, 2003
Date of Patent: Jun 22, 2004
Assignee: Tokyo Electron Limited (Tokyo)
Inventor: Shigeki Doba (Nirasaki)
Primary Examiner: Antoine D. Davis
Attorney, Agent or Law Firm: Ladas & Parry
Application Number: 29/182,142
Classifications
Current U.S. Class: Heat Treatment, Welding Or Brazing (D15/144)
International Classification: 1509;