Semiconductor module
Latest Murata Manufacturing Co., Ltd. Patents:
Description
FIG. 1 is a front view of a semiconductor module showing our new design;
FIG. 2 is a rear view thereof;
FIG. 3 is a top plan view thereof;
FIG. 4 is a bottom plan view thereof;
FIG. 5 is a left side view thereof; and,
FIG. 6 is a right side view thereof.
The broken lines shown in the drawings are for illustrative purposes only and form no part of the claimed design.
Claims
The ornamental design for a semiconductor module, as shown and described.
Referenced Cited
U.S. Patent Documents
D318461 | July 23, 1991 | Hasegawa et al. |
5994772 | November 30, 1999 | Shin |
6127729 | October 3, 2000 | Fukuda |
6373447 | April 16, 2002 | Rostoker et al. |
6781239 | August 24, 2004 | Yegnashankaran et al. |
6836002 | December 28, 2004 | Chikawa et al. |
6992395 | January 31, 2006 | Fukasawa |
20060043544 | March 2, 2006 | Tsukamoto et al. |
20060097374 | May 11, 2006 | Egawa |
20060131715 | June 22, 2006 | Satou et al. |
Patent History
Patent number: D540272
Type: Grant
Filed: Sep 22, 2005
Date of Patent: Apr 10, 2007
Assignee: Murata Manufacturing Co., Ltd.
Inventor: Kazuaki Higashibata (Yasu)
Primary Examiner: Selina Sikder
Attorney: Dickstein, Shapiro, LLP.
Application Number: 29/238,804
Type: Grant
Filed: Sep 22, 2005
Date of Patent: Apr 10, 2007
Assignee: Murata Manufacturing Co., Ltd.
Inventor: Kazuaki Higashibata (Yasu)
Primary Examiner: Selina Sikder
Attorney: Dickstein, Shapiro, LLP.
Application Number: 29/238,804
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)