Semiconductor manufacturing apparatus

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Description

FIG. 1 is a front, top and left side perspective view of semiconductor manufacturing apparatus showing our new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a right side elevational view thereof;

FIG. 4 is a left side elevational view thereof;

FIG. 5 is a top plan elevational view thereof;

FIG. 6 is a bottom plan elevational view thereof; and,

FIG. 7 is a rear elevational view thereof.

Claims

The ornamental design for a semiconductor manufacturing apparatus, as shown.

Referenced Cited
U.S. Patent Documents
D365584 December 26, 1995 Nakagome et al.
6050891 April 18, 2000 Nering
6454472 September 24, 2002 Kim et al.
6942738 September 13, 2005 Nelson et al.
20020150449 October 17, 2002 Nelson et al.
20030002961 January 2, 2003 Davis et al.
20030136513 July 24, 2003 Lee et al.
20040197169 October 7, 2004 Soraoka et al.
Patent History
Patent number: D546354
Type: Grant
Filed: Aug 26, 2005
Date of Patent: Jul 10, 2007
Assignee: Hitachi High-Technologies Corporation (Tokyo)
Inventors: Hideki Kihara (Kudamatsu), Minoru Soraoka (Shunan), Yuzo Ohirabaru (Kudamatsu), Nobuo Nagayasu (Kudamatsu)
Primary Examiner: Antoine D. Davis
Assistant Examiner: Patricia Palasik
Attorney: Antonelli, Terry, Stout & Kraus, LLP.
Application Number: 29/237,008
Classifications
Current U.S. Class: Miscellaneous (D15/199)