Chips display module

- Behr Process Corporation
Skip to: Description  ·  Claims  ·  References Cited  · Patent History  ·  Patent History
Description

FIG. 1 is a front perspective of the chips display module;

FIG. 2 is a front plan view of the chips display module; and,

FIG. 3 is a left side cross-sectional side view of the chips display module, the right side cross-sectional side view being a mirror image.

The broken lines shown in the drawings are for illustrative purposes only and form no part of the claimed design.

Claims

The ornamental design for a chips display module, as shown and described.

Referenced Cited
U.S. Patent Documents
D213076 December 1968 Emery et al.
3838266 September 1974 Jonathan
D278954 May 28, 1985 Bolyn
6331858 December 18, 2001 Fisher
6563510 May 13, 2003 Rice et al.
6632093 October 14, 2003 Rice et al.
D481882 November 11, 2003 Richardson et al.
D481883 November 11, 2003 Richardson et al.
D481884 November 11, 2003 Richardson et al.
D482207 November 18, 2003 Richardson et al.
D488001 April 6, 2004 Richardson et al.
D488318 April 13, 2004 Richardson et al.
D488633 April 20, 2004 Richardson et al.
D493045 July 20, 2004 Richardson et al.
D497269 October 19, 2004 Richardson et al.
D497495 October 26, 2004 Richardson et al.
D527934 September 12, 2006 Lee et al.
D528835 September 26, 2006 Lee et al.
D532416 November 21, 2006 Lee et al.
7204376 April 17, 2007 Richardson et al.
20050100210 May 12, 2005 Rice et al.
Patent History
Patent number: D557041
Type: Grant
Filed: Jan 11, 2005
Date of Patent: Dec 11, 2007
Assignee: Behr Process Corporation (Santa Ana, CA)
Inventors: Thomas R. Lee (Mission Viejo, CA), Joseph Thomas Richardson (Irvine, CA)
Primary Examiner: Janice E. Seeger
Assistant Examiner: Sydney R Buffalow
Attorney: Greenberg Traurig LLP
Application Number: 29/221,166
Classifications
Current U.S. Class: D6/468