Pattern formed on the ground layer of a multilayer printed circuit board

- Nitto Denko Corporation
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Description

FIG. 1 shows a front view of the design according to a first embodiment of the present invention.

FIG. 2 shows a back view of the design according to a first embodiment of the present invention.

FIG. 3 shows a top plan view of the design according to a first embodiment of the present invention.

FIG. 4 shows a bottom plan view of the design according to a first embodiment of the present invention.

FIG. 5 shows a left side view of the design according to a first embodiment of the present invention.

FIG. 6 shows a right side view of the design according to a first embodiment of the present invention.

FIG. 7 shows a partial view of FIG. 1 corresponding to the area indicated by the dashed box in FIG. 1.

FIG. 8 shows a detailed view of an enlarged portion of FIG. 7 indicated by the dashed box in FIG. 7.

FIG. 9 shows a sectional view along the line 99 indicated in FIG. 7.

FIG. 10 shows a front plan view of the design according to a second embodiment of the present invention. In this embodiment, the ground layer is transparent.

FIG. 11 shows a back view of the design according to a second embodiment of the present invention.

FIG. 12 shows a top plan view of the design according to a second embodiment of the present invention.

FIG. 13 shows a bottom plan view of the design according to a second embodiment of the present invention.

FIG. 14 shows a right side view of the design according to a second embodiment of the present invention.

FIG. 15 shows a left side view of the design according to a second embodiment of the present invention.

FIG. 16 shows a partial view of FIG. 11 corresponding to the area indicated by the dashed box in FIG. 11.

FIG. 17 shows a detailed view of an enlarged portion of FIG. 17 indicated by the dashed box in FIG. 17; and,

FIG. 18 shows a sectional view along the line 1919 indicated in FIG. 17.

The broken lines represent unclaimed subject matter.

Claims

The ornamental design for a pattern formed on the ground layer of a multilayer printed circuit board, as shown and described.

Referenced Cited
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5855988 January 5, 1999 Matsuo
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D457146 May 14, 2002 Yamamoto et al.
6385035 May 7, 2002 Matoba et al.
20020075660 June 20, 2002 Samant et al.
20050018409 January 27, 2005 Hirakata
20060175082 August 10, 2006 Tanaka
20060246268 November 2, 2006 Honjo et al.
Patent History
Patent number: D574339
Type: Grant
Filed: Dec 22, 2005
Date of Patent: Aug 5, 2008
Assignee: Nitto Denko Corporation (Osaka)
Inventors: Mitsuru Honjo (Osaka), Hiroshi Yamazaki (Osaka), Toshiki Naito (Osaka)
Primary Examiner: Selina Sikder
Attorney: Osha Liang LLP
Application Number: 29/245,352