Decorative panel
Latest Samsung Electronics Patents:
- INTEGRATED CIRCUIT INCLUDING TEST CIRCUIT
- SPLITTER AND PHOTONIC INTEGRATED CIRCUIT INCLUDING THE SAME
- SUBSTRATE PROCESSING APPARATUS
- METHOD AND DEVICE WITH PATTERN IMAGE GENERATION
- PHASE-LOCKED LOOP CIRCUIT, STORAGE DEVICE INCLUDING THE PHASE-LOCKED LOOP CIRCUIT, AND OPERATION METHOD OF THE STORAGE DEVICE
Description
The broken lines are for environmental purpose only and form no part of the claimed design.
Claims
The ornamental design for a decorative panel, as shown and described.
Referenced Cited
U.S. Patent Documents
| D37913 | March 1906 | McNab |
| D62876 | August 1923 | Boynton |
| D531326 | October 31, 2006 | Folliard |
| D572489 | July 8, 2008 | Ko et al. |
| D611255 | March 9, 2010 | Ko et al. |
| D630441 | January 11, 2011 | Wiwi et al. |
| D634555 | March 22, 2011 | Koz |
| D650996 | December 27, 2011 | Davis et al. |
| D695552 | December 17, 2013 | Gatto |
| 20130091788 | April 18, 2013 | Lee et al. |
Patent History
Patent number: D726787
Type: Grant
Filed: May 13, 2013
Date of Patent: Apr 14, 2015
Assignee: Samsung Electronics Co., Ltd. (Suwon-si)
Inventors: Hea-Me Lee (Seoul), Ji-Dam Hong (Seoul)
Primary Examiner: Stella Reid
Assistant Examiner: Khawaja Anwar
Application Number: 29/454,693
Type: Grant
Filed: May 13, 2013
Date of Patent: Apr 14, 2015
Assignee: Samsung Electronics Co., Ltd. (Suwon-si)
Inventors: Hea-Me Lee (Seoul), Ji-Dam Hong (Seoul)
Primary Examiner: Stella Reid
Assistant Examiner: Khawaja Anwar
Application Number: 29/454,693
Classifications
Current U.S. Class:
Element Or Attachment (D15/89)