PC
Latest Samsung Electronics Patents:
- INTEGRATED CIRCUIT INCLUDING TEST CIRCUIT
- SPLITTER AND PHOTONIC INTEGRATED CIRCUIT INCLUDING THE SAME
- SUBSTRATE PROCESSING APPARATUS
- METHOD AND DEVICE WITH PATTERN IMAGE GENERATION
- PHASE-LOCKED LOOP CIRCUIT, STORAGE DEVICE INCLUDING THE PHASE-LOCKED LOOP CIRCUIT, AND OPERATION METHOD OF THE STORAGE DEVICE
The broken lines illustrating portions of the PC are for environmental purpose only and form no part of the claimed design.
The shade lines in the Figures transparency and not surface ornamentation.
Claims
I claim, the ornamental design for a PC, as shown and described.
| D309743 | August 7, 1990 | Chan |
| D502197 | February 22, 2005 | Imai |
| D502199 | February 22, 2005 | Imai |
| 7057662 | June 6, 2006 | Malzbender |
| 7286181 | October 23, 2007 | Cha |
| D561807 | February 12, 2008 | Ogura et al. |
| 7500794 | March 10, 2009 | Clark |
| D629031 | December 14, 2010 | Su et al. |
| D641388 | July 12, 2011 | Shih et al. |
| D643456 | August 16, 2011 | Won et al. |
| D654942 | February 28, 2012 | Khamsepoor et al. |
| D675660 | February 5, 2013 | Su |
| D680569 | April 23, 2013 | Lee et al. |
| 8466999 | June 18, 2013 | Shiau et al. |
| D688718 | August 27, 2013 | Tsai |
| 8542264 | September 24, 2013 | Lu et al. |
| D708248 | July 1, 2014 | Son et al. |
| D708249 | July 1, 2014 | Kim et al. |
| 20090231484 | September 17, 2009 | Lee et al. |
Type: Grant
Filed: Jul 3, 2013
Date of Patent: Jan 12, 2016
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ho-Young Seoc (Yongin-si)
Primary Examiner: Deanna L Pratt
Assistant Examiner: Katie Mroczka
Application Number: 29/459,842