Electronic device
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Broken lines shown in the figures depict environment only, and form no part of the claimed design.
Claims
The ornamental design for an electronic device, as shown and described.
| 5103376 | April 7, 1992 | Blonder |
| 5268816 | December 7, 1993 | Abell, Jr. |
| 6067224 | May 23, 2000 | Nobuchi |
| D499727 | December 14, 2004 | Kondo |
| D607882 | January 12, 2010 | Nakada |
| D615539 | May 11, 2010 | Jen |
| 7986517 | July 26, 2011 | Jiang |
| D646677 | October 11, 2011 | Moon |
| 8089748 | January 3, 2012 | Chiang |
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Type: Grant
Filed: Dec 26, 2014
Date of Patent: Jan 17, 2017
Assignee: Intel Corporation (Santa Clara, CA)
Inventors: Lily Kolle (Hillsboro, OR), Jered H. Wikander (Portland, OR)
Primary Examiner: Freda S Nunn
Application Number: 29/513,117