Intel Patents

Intel Corporation designs and manufactures microprocessors and chipsets for computing and communications equipment manufacturers. Its products may be found in desktops, servers, tablets, smartphones and other devices.

Intel Patents by Type

  • Intel Patents Granted: Intel patents that have been granted by the United States Patent and Trademark Office (USPTO).
  • Intel Patent Applications: Intel patent applications that are pending before the United States Patent and Trademark Office (USPTO).
  • Publication number: 20170359499
    Abstract: In one example, a system for modifying transmission of image data includes a processor to detect a camera management command to transmit to an image sensor via a camera serial interface link. The processor can also transmit the camera management command to the image sensor via the camera serial interface link, and receive image data from the image sensor via the camera serial interface link.
    Type: Application
    Filed: August 10, 2016
    Publication date: December 14, 2017
    Applicant: Intel Corporation
    Inventor: Haran Thanigasalam
  • Publication number: 20170359588
    Abstract: Methods, apparatuses and systems may provide for a video transmitter that generates a primary bitstream based on a video signal, wherein the primary bitstream is encoded with subsampled chroma information, and detects a static condition with respect to the video signal. Additionally, a plurality of auxiliary bitstreams may be generated, in response to the static condition, based on the video signal. Each of the plurality of auxiliary bitstreams may be encoded with full resolution chroma information. In one example, a video receiver may detect that the auxiliary bitstreams are associated with the primary bitstream, decode the primary bitstream and the plurality of auxiliary bitstreams to obtain luma information and the full resolution chroma information, and multiplex the luma information with the full resolution chroma information.
    Type: Application
    Filed: June 13, 2016
    Publication date: December 14, 2017
    Applicant: Intel Corporation
    Inventors: Jason Tanner, Paul S. Diefenbaugh, Radhakrishnan Sankar, Sang-Hee Lee
  • Publication number: 20170359549
    Abstract: Video capture is described in which the video frame rate is based on an estimate of motion periodicity. In one example, a period of motion of a moving object is determined at a sensor device. A frame capture rate of a video camera that is attached to the moving object is adjusted based on the period of motion. Video frames are captured at the adjusted frame rate, and the captured video frames are stored.
    Type: Application
    Filed: June 9, 2016
    Publication date: December 14, 2017
    Applicant: Intel Corporation
    Inventors: Stanley J. Baran, Barnan Das, Richmond Hicks
  • Publication number: 20170357831
    Abstract: Techniques are disclosed for processing rendering engine workload of a graphics system in a secure fashion, wherein at least some security processing of the workload is offloaded from software-based security parsing to hardware-based security parsing. In some embodiments, commands from a given application are received by a user mode driver (UMD), which is configured to generate a command buffer delineated into privileged and/or non-privileged command sections. The delineated command buffer can then be passed by the UMD to a kernel-mode driver (KMD), which is configured to parse and validate only privileged buffer sections, but to issue all other batch buffers with a privilege indicator set to non-privileged.
    Type: Application
    Filed: April 24, 2017
    Publication date: December 14, 2017
    Applicant: INTEL CORPORATION
    Inventors: HEMA C. NALLURI, ADITYA NAVALE, MURALI RAMADOSS
  • Publication number: 20170358065
    Abstract: Methods, apparatuses and systems may provide for applying an image to a filter, wherein the filter includes data-adaptive weights. Additionally, an output scaling factor may be determined based on one or more statistical operators applied to the data-adaptive weights and the output scaling factor may be applied to an output of the filter.
    Type: Application
    Filed: June 14, 2016
    Publication date: December 14, 2017
    Applicant: Intel Corporation
    Inventor: Rastislav Lukac
  • Publication number: 20170357031
    Abstract: An image sensor is described that has photodetectors with reduced reflections. In one example the image sensor has a plurality of photodetectors on a silicon substrate.
    Type: Application
    Filed: June 9, 2016
    Publication date: December 14, 2017
    Applicant: Intel Corporation
    Inventors: Khaled Ahmed, Richmond Hicks
  • Publication number: 20170356468
    Abstract: Some embodiments of an apparatus and system are described for a volumetric resistance blower. An apparatus may comprise a motor, a rotor comprising a cylindrical foam block, and a casing having one or more inlets arranged in an axial direction of the rotor and one or more outlets arranged in a radial direction of the rotor. Other embodiments are described.
    Type: Application
    Filed: August 28, 2017
    Publication date: December 14, 2017
    Applicant: INTEL CORPORATION
    Inventor: Mark MacDonald
  • Publication number: 20170357584
    Abstract: A processor includes a memory management unit and a front end including a decoder. The decoder includes logic to receive a flush-on-commit (FoC) instruction to flush dirty data from a volatile cache to a persistent memory upon commitment of a store associated with the FoC instruction. The memory management unit includes logic to, based upon a flush-on-fail (FoF) mode, skip execution of the flush-on-commit instruction and to flush the dirty data from the volatile cache upon a subsequent FoF operation.
    Type: Application
    Filed: August 28, 2017
    Publication date: December 14, 2017
    Applicant: Intel Corporation
    Inventors: Sanjay K. KUMAR, Rajesh M. Sankaran, Subramanya R. Dulloor, Andrew V. Anderson
  • Publication number: 20170359333
    Abstract: Generally, this disclosure provides devices, systems, methods and computer readable media for context based switching to a secure OS environment including cloud based data synchronization and filtration. The device may include a storage controller to provide access to the secure OS stored in an initially provisioned state; a context determination module to monitor web site access, classify a transaction between the device and the website and identify a match between the web site and a list of web sites associated with secure OS operation or a match between the transaction classification and a list of transaction types associated with secure OS operation; and an OS switching module to switch from a main OS to the secure OS in response to the identified match. The switch may include updating state data associated with the secure OS, the state data received from a secure cloud-based data synchronization server.
    Type: Application
    Filed: August 1, 2017
    Publication date: December 14, 2017
    Applicant: Intel Corporation
    Inventors: Faraz A. Siddiqi, Jasmeet Chhabra
  • Publication number: 20170355275
    Abstract: A vehicular inductive power transfer system includes a power transmission unit and a power receiving unit. The distance between the units and the overall alignment of the units with respect to each other determines the overall efficiency of the energy transfer between the power transmission unit and the power receiving unit. Magnetic fields produced by the inductive power transfer system may exceed allowable standards or regulations for human exposure to electromagnetic fields. An inductive power transfer control circuit autonomously causes an actuator to position at least one of the power transmission unit or the power receiving unit in a three-dimensional space based on one or more measured power transfer parameters. Such positioning may occur while the vehicle is moving or stationary. The control circuit may further autonomously adjust one or more power transfer parameters to maintain magnetic field exposure levels at or below industry standards or governmental regulations.
    Type: Application
    Filed: June 14, 2016
    Publication date: December 14, 2017
    Applicant: Intel Corporation
    Inventors: ROBERT F. KWASNICK, SURAJ SINDIA, SONGNAN YANG, ZHEN YAO
  • Publication number: 20170359246
    Abstract: A zombie server can be detected. Detecting a zombie server can include labeling a plurality of processes as utility software, calculating a utilization of utility software on the plurality of processes executed in one or more processing resources during an interval of time, and calculating a server utilization of the one or more processing resources during the interval of time. Detecting the zombie server can also include determining whether a difference between the utilization of utility software and the server utilization is greater than a threshold, and identifying a server that hosts the processing resource as a zombie server based on a determination that the difference is smaller than the threshold.
    Type: Application
    Filed: June 13, 2016
    Publication date: December 14, 2017
    Applicant: INTEL CORPORATION
    Inventors: Devadatta Bodas, Justin J. Song, Muralidhar Rajappa, Andy Hoffman
  • Publication number: 20170357379
    Abstract: A display that includes energy sensors within the display itself is disclosed. An Organic Light Emitting Diode (OLED) can be made to operate both as a light emitter and as an energy detector. When forward biased with an appropriate driving signal, the OLED emits light via electroluminescence, which can be used to make a portion of an image on the display. In another mode, the OLED can detect energy by converting incoming photons or energy into an electrical signal by the photoelectric effect. By operating OLEDs in the display in both emissive and sensing modes, energy that shines on the display, such as from an outside source can be detected at the same time an image is shown. Additionally, a display including OLEDs can detect light energy generated by the display itself.
    Type: Application
    Filed: May 18, 2017
    Publication date: December 14, 2017
    Applicant: Intel Corporation
    Inventors: Lawrence A. Booth, Daniel Seligson
  • Publication number: 20170359099
    Abstract: In one example a controller comprises logic, at least partially including hardware logic, configured to implement a first iteration of an interference test on a communication interconnect comprising a victim lane and a first aggressor lane by generating a first set of pseudo-random patterns on the victim lane and the aggressor lane using a first seed and implement a second iteration of an interference test by advancing the seed on the first aggressor lane. Other examples may be described.
    Type: Application
    Filed: August 1, 2017
    Publication date: December 14, 2017
    Applicant: Intel Corporation
    Inventors: Alexey Kostinsky, Tomer Levy, Paul S. Cheses, Danny Naiger, Theodore Z. Schoenborn, Christopher P. Mozak, Nagi Aboulenein, James M. Shehadi
  • Publication number: 20170357462
    Abstract: In one embodiment, an apparatus comprises a storage device to receive, from a computing host, a request to append data to a data log. The storage device is further to identify a memory location after a last segment of the data log, append the data to the data log by writing the data to the memory location after the last segment of the data log, and provide, to the computing host, a key comprising an identification of the memory location at which the data was appended to the data log.
    Type: Application
    Filed: June 8, 2016
    Publication date: December 14, 2017
    Applicant: Intel Corporation
    Inventors: Benjamin L. Walker, August A. Camber, Jonathan Bryan Stern, Sanjeev Trika, Richard P. Mangold, Jawad Basit Khan, Anand Ramalingam
  • Publication number: 20170359226
    Abstract: A zombie server can be detected. Detecting a zombie server can include receiving, at a server, network traffic and calculating a percentage of the network traffic as being productivity software layer 7 protocols every first time interval. Detecting a zombie server can also include marking the server as a zombie server based on the percentage every second time interval and processing the network traffic at the server to perform a number of actions by the productivity software.
    Type: Application
    Filed: June 13, 2016
    Publication date: December 14, 2017
    Applicant: INTEL CORPORATION
    Inventors: Devadatta Bodas, Justin J. Song, Muralidhar Rajappa, Andy Hoffman
  • Patent number: 9841491
    Abstract: The disclosure generally relates to an enhanced positioning system and method using a combination or hybrid filter. In one embodiment, Time-Of-Flight (ToF) measurements are used to determine an approximate location for a mobile device in relationship to one or more Access Points. The ToF combined with known and unknown variables are then processed through a hybrid filter system to determine location of the mobile device. The hybrid filter system may include a Kalman Filter (KF) for processing linear models and generally Gaussian noise distribution. The KF assumes that the state probability of mobile device location is Gaussian. Such variables include, for example, WiFi ToF bias. The hybrid filter system may include a Bayesian Filter (BF) for processing variables having non-Gaussian noise distribution and non-linear models. Such variables include, for example, the coordinates of the mobile device. A probability determination from each of the KF and BF is then applied to estimate the mobile device location.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Yuval Amizur, Uri Schatzberg
  • Patent number: 9841920
    Abstract: Methods and apparatus to provide heterogeneous memory die stacking for energy efficient computing are described. In one embodiment, a Phase Change Memory with Switch (PCMS) die is coupled to a Dynamic Random Access Memory (DRAM) die and a Central Processing Unit (CPU) die. CPU checkpointing state data is stored in the PCMS die first before transferring the checkpointing data to a backup media at a later and more extended time. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventor: Pete D. Vogt
  • Patent number: 9841803
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Patent number: 9841807
    Abstract: Embodiments of the invention relate to a method and apparatus for a zero voltage processor sleep state. A processor may include a dedicated cache memory. A voltage regulator may be coupled to the processor to provide an operating voltage to the processor. During a transition to a zero voltage power management state for the processor, the operational voltage applied to the processor by the voltage regulator may be reduced to approximately zero and the state variables associated with the processor may be saved to the dedicated cache memory.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Sanjeev Jahagirdar, Varghese George, John Conrad, Robert Milstrey, Stephen A. Fischer, Alon Naveh, Shai Rotem
  • Patent number: 9842046
    Abstract: A method of an aspect includes receiving an instruction indicating a first source packed memory indices, a second source packed data operation mask, and a destination storage location. Memory indices of the packed memory indices are compared with one another. One or more sets of duplicate memory indices are identified. Data corresponding to each set of duplicate memory indices is loaded only once. The loaded data corresponding to each set of duplicate memory indices is replicated for each of the duplicate memory indices in the set. A packed data result in the destination storage location in response to the instruction. The packed data result includes data elements from memory locations that are indicated by corresponding memory indices of the packed memory indices when not blocked by corresponding elements of the packed data operation mask.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Andrew T. Forsyth, Dennis R. Bradford, Jonathan C. Hall
  • Patent number: 9841784
    Abstract: Described is an apparatus which comprises: an antenna to sense or receive energy from an external source; a harvesting module to harvest power according to the sensed or received energy; a decoder coupled to the harvesting module, the decoder to decode the sensed or received energy and to generate one or more commands; and one or more switches operable to turn on or off according to the one or more commands.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventor: Andrey Belogolovy
  • Patent number: 9842015
    Abstract: A processor includes a logic to determine an error condition reported in an error bank. The error bank is communicatively coupled to the processor and is associated with logical processors of the processor. The processor includes another logic to generate an interrupt indicating the error condition. The processor includes yet another logic to selectively send the interrupt to a single one of the logical processors associated with the error bank.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Ashok Raj, Mohan J. Kumar, Jose A. Vargas, William G. Auld, Cameron B. McNairy, Theodros Yigzaw, James B. Crossland, Anthony E. Luck
  • Patent number: 9842800
    Abstract: Methods of forming conductive interconnect structures are described. Those methods/structures may include providing a package substrate comprising a substrate core, and forming at least one conductive interconnect structure disposed on the substrate core. The conductive interconnect structure may comprise a first side that is directly disposed on a surface of the substrate core, and a second side opposite the first side, wherein the second side comprises a greater length than a length of the first side.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventor: Robert A. May
  • Patent number: 9842021
    Abstract: A check bit read mode enables a memory device to provide internal check bits to an associated host. A memory controller of a memory subsystem can generate one or more read commands for memory devices of the memory subsystem. The read command can include address location information. The memory devices include memory arrays with memory locations addressable with the address location information. The memory locations have associated data and internal check bits, where the check bits are generated internally by the memory for error correction. If the memory device is configured for check bit read mode, in response to the read command, it sends the internal check bits associated with the identified address location. If the memory device is not configured check bit read mode, it returns the data in response to the read command without exposing the internal check bits.
    Type: Grant
    Filed: December 26, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: John B Halbert, Kuljit S Bains
  • Patent number: 9843352
    Abstract: The disclosure generally relates to a method, apparatus and system for identifying non-compliant radio emissions and for enforcing compliance. In one embodiment, the disclosure relates to a dynamic radiation control of a radio by measuring a signal attribute for an outbound signal having a protocol; comparing the signal attribute with a predefined mask, the predefined mask governed by at least one of a radio location or a signal protocol; and determining whether to transmit the outbound signal.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Hossein Alavi, Farhana Sheikh, Markus Dominik Mueck, Vladimir Ivanov
  • Patent number: 9842241
    Abstract: An embodiment includes an ultrasonic sensor system comprising: a backend material stack including a first metal layer between a substrate and a second metal layer with each of the first and second metal layers including a dielectric material; a ultrasonic sensor including a chamber, having a negative air pressure, that is sealed by first and second electrodes coupled to each other with first and second sidewalls; an interconnect, not included in the sensor, in the second metal layer; wherein (a) a first vertical axis intersects the substrate, the chamber, and the first and second electrodes, (b) a second vertical axis intersects the interconnect and the substrate, (c) a first horizontal axis intersects the chamber, the interconnect, and the first and second sidewalls, and (d) the first and second electrodes and the first and second sidewalls each include copper and each are included in the second metal layer.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Mondira D. Pant, Mohamed A. Abdelmoneum, Tanay Karnik
  • Patent number: 9842005
    Abstract: A system for executing instructions using a plurality of register file segments for a processor. The system includes a global front end scheduler for receiving an incoming instruction sequence, wherein the global front end scheduler partitions the incoming instruction sequence into a plurality of code blocks of instructions and generates a plurality of inheritance vectors describing interdependencies between instructions of the code blocks. The system further includes a plurality of virtual cores of the processor coupled to receive code blocks allocated by the global front end scheduler, wherein each virtual core comprises a respective subset of resources of a plurality of partitionable engines, wherein the code blocks are executed by using the partitionable engines in accordance with a virtual core mode and in accordance with the respective inheritance vectors. A plurality register file segments are coupled to the partitionable engines for providing data storage.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventor: Mohammad Abdallah
  • Patent number: 9842832
    Abstract: A microelectronic package of the present description may comprises a first microelectronic device having at least one row of connection structures electrically connected thereto and a second microelectronic device having at least one row of connection structures electrically connected thereto, wherein the connection structures within the at least one first microelectronic device row are aligned with corresponding connection structures within the at least one second microelectronic device row in an x-direction.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Omkar G. Karhade, John S. Guzek, Johanna M. Swan, Christopher J. Nelson, Nitin A. Deshpande, William J. Lambert, Charles A. Gealer, Feras Eid, Islam A. Salama, Kemal Aygun, Sasha N. Oster, Tyler N. Osborn
  • Patent number: 9842213
    Abstract: Various systems and methods for locking computing devices are described herein. In an example, a portable device comprises an electro-mechanical lock; and a firmware module coupled to the electro-mechanical lock, the firmware module configured to: receive an unlock code; validate the unlock code; and unlock the electro-mechanical lock when the unlock code is validated. In another example, device for managing BIOS authentication, the device comprising an NFC module, the NFC module comprising an NFC antenna; and a firmware module, wherein the firmware module is configured to: receive an unlock code from an NFC device via the NFC antenna; validate the unlock code; and unlock a BIOS of the device when the unlock code is validated.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Saurabh Dadu, Gyan Prakash, Rajesh Poornachandran, Jiphun Satapathy, Farid Adrangi
  • Patent number: 9844054
    Abstract: An evolved node (eNB) operable to transmit a Time Division Duplex (TDD) uplink-downlink (UL-DL) reconfiguration in a heterogeneous network (HetNet) is disclosed. The eNB can receive, from a user equipment (UE), a UE capability report that indicates the UE supports a TDD UL-DL reconfiguration functionality. The eNB can transmit, to the UE, a configuration to enable TDD UL-DL reconfiguration at the UE. The eNB can transmit, to the UE, a TDD UL-DL reconfiguration signal in a downlink control information (DCI) message. The UE can be configured to update a TDD UL-DL configuration of the UE based on the TDD UL-DL reconfiguration signal transmitted on a physical downlink control channel (PDCCH) in preconfigured downlink or special (DL/S) subframes by the eNB.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: December 12, 2017
    Assignee: INTEL CORPORATION
    Inventors: Hong He, Alexey Khoryaev, Sergey Panteleev, Jong-Kae Fwu
  • Patent number: 9841997
    Abstract: An apparatus and method for performing high performance instruction emulation. One embodiment of the invention includes a processor to process an instruction set including high-power and standard instructions comprising: an analysis module to determine whether a number of high-power instructions within a specified window are above or below a specified threshold; an execution mode selection module to select a native execution of the high-power instructions if the number of high-power instructions are above the specified threshold or to select an emulated execution of the high-power instructions if the number of high-power instructions are below the specified threshold.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: December 12, 2017
    Assignee: INTEL CORPORATION
    Inventors: Ankush Varma, Kristoffer D. Fleming, Eugene Gorbatov, Robert E. Gough, Krishnakanth V. Sistla
  • Patent number: 9843367
    Abstract: Embodiments of an enhanced Node B (eNB) and method for precoding with reduced quantization error are generally described herein. In some embodiments, first and second precoding-matrix indicator (PMI) reports may be received on an uplink channel and a single subband precoder matrix may be interpolated from precoding matrices indicated by both the PMI reports. Symbols for multiple-input multiple output (MIMO) beamforming may be precoded using the interpolated precoder matrix computed for single subband for a multiple user (MU)-MIMO downlink orthogonal frequency division multiple access (OFDMA) transmission. In some embodiments, each of the first and second PMI reports includes a PMI associated with a same subband that jointly describes a recommended precoder.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Yuan Zhu, Qinghua Li, Xiaogang Chen
  • Patent number: 9841783
    Abstract: This disclosure is directed to a system to account for irregular display surface physics. In one embodiment, an example device may comprise a display including at least one curved surface on which content may be presented. The content may be presented based at least on simulated physical behavior associated with the curved surface. For example, the device may determine the display surface configuration, determine the simulated physical behavior in the content and present the content based at least on these determinations. The content may then appear to behave in accordance with the physics of the curved surface. The device may also comprise sensors to determine at least one of device or environmental condition such as, for example, gravitational force direction, device motion, etc. The device may then take into account the physical behavior associated with the curved surface in view of sensed device or environmental condition when presenting the content.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: December 12, 2017
    Assignee: INTEL CORPORATION
    Inventor: Glen J. Anderson
  • Patent number: 9843214
    Abstract: Systems and methods may provide for wireless charging device of an electronic device powered by a rechargeable battery. The wireless charging device may include a charging station having a charging surface with a power transmitter and a contour that concentrically interfaces with a corresponding contour of an inner surface of the electronic device in a manner that facilitates an initiation of a power charging sequence at the charging surface when the charging station detects an operational coupling between the power transmitter and a power receiver of the electronic device.
    Type: Grant
    Filed: December 28, 2013
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Gregory A. Peek, Mark R. Francis, Torrey W. Frank
  • Patent number: 9843474
    Abstract: Methods, systems, and storage media for telemetry adaptation are disclosed herein. In an embodiment, a networking device may include a data collector agent module to receive measurement data from measurement sources according to an initial telemetry policy and to provide the measurement data to the one or more servers of the monitoring system. The networking device may include an anomaly detection module to receive measurement data from the data collector agent module, to detect an anomaly in the measurement data, and to provide an indication of the anomaly to the data collector agent module for the data collector agent module to provide a first modified telemetry policy for the measurement sources.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Giovani Estrada, Victor Bayon-Molino, Michael J. McGrath, Joseph Butler
  • Patent number: 9843850
    Abstract: Small-scale audio speakers of various shapes are installed in parent devices. Inner casings, and the surrounding vibration-damping zone often required between such casings and the surrounding parent-device walls, are omitted from the assembly. During integration with the parent device, each un-encased speaker and its signal lines are sealed into a single-walled enclosure that incorporates a parent-device wall as at least one side. The entire interior of the single-walled enclosure becomes a back volume for the speaker. The single-walled enclosure may incorporate seals at the speaker's audio-output aperture, at the pass-through for the signal lines, and at the interface between the parent-device wall(s) and the added side(s) constituting the single-walled enclosure. Optional adhesive-free sealing options include sliding tabs held by a snap-lock latch.
    Type: Grant
    Filed: September 26, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Devon Worrell, David A. Rittenhouse
  • Patent number: 9844144
    Abstract: Apparatuses, systems and methods associated with electrical fast transient tolerant input/output (I/O) communication (e.g., universal serial bus (USB)) design are disclosed herein. In embodiments, an apparatus to mount an integrated circuit (IC) package, may include a printed circuit board (PCB), a plurality of pogo pins, and a mounting mechanism. The plurality of pogo pins may be mounted to electrical contacts of the PCB, the plurality of pogo pins may be coupled to the electrical contacts at first ends of the plurality of pogo pins and may be to couple to the IC package at second ends of the plurality of pogo pins. The mounting mechanism may position the IC package on the second ends of the plurality of pogo pins. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Emad Al-Momani, Jack Mumbo, Srikanth Mothukuri
  • Patent number: 9842944
    Abstract: A solid source-diffused junction is described for fin-based electronics. In one example, a fin is formed on a substrate. A glass of a first dopant type is deposited over the substrate and over a lower portion of the fin. A glass of a second dopant type is deposited over the substrate and the fin. The glass is annealed to drive the dopants into the fin and the substrate. The glass is removed and a first and a second contact are formed over the fin without contacting the lower portion of the fin.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Walid M. Hafez, Chia-Hong Jan
  • Patent number: 9843958
    Abstract: Technology for communicating power preference indication (PPI) message is described. A user equipment (UE) may receive PPI configuration information, from an evolved node B (eNB), wherein the PPI configuration information includes a predetermined threshold for a number of PPI messages that the UE can communicate to the eNB during a defined time window. The UE may communicate a plurality of PPI messages after sending a low power consumption configuration to the eNB during the defined time window, wherein the plurality of PPI messages each indicate a change in preferred power consumption configuration. The UE may detect that the plurality of PPI messages exceeds the predetermined threshold for the number of PPI messages that the UE can communicate to the eNB during the defined time window as defined in the PPI configuration information.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: December 12, 2017
    Assignee: INTEL CORPORATION
    Inventors: Ali T. Koc, Satish C. Jha, Rath Vannithamby, Maruti Gupta
  • Patent number: 9843956
    Abstract: A prioritized cell identification and measurement method is disclosed. The method classifies frequency layers to be monitored and measured by an user equipment into normal- and reduced-performance groups. Several different embodiments are described. Where appropriate, the corresponding signaling design is also suggested. User equipment can adopt one or several of these embodiments, and can change configurations in a semi-static manner based on operating conditions.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel IP Corporation
    Inventors: Yang Tang, Rui Huang, Candy Yiu
  • Patent number: 9843768
    Abstract: Embodiments of a system and method for indicating audience engagement are generally described herein. A method may include sending speech from a speaker to be played for a plurality of members of an audience, receiving audience reaction information, for the plurality of members of the audience, from a plurality of sensors, the audience reaction information captured by the plurality of sensors while the speech is playing for the plurality of members of the audience, processing the audience reaction information to aggregate the audience reaction information, determining, using the processed information, an engagement factor, and sending an aggregated engagement level indicator to a speaker device, the aggregated engagement level indicator based on the engagement factor and indicating overall engagement of the audience to the speech.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Ansuya Negi, Igor Tatourian, Rita H Wouhaybi
  • Patent number: 9843959
    Abstract: Described herein are technologies related to an implementation for dynamic adjustment of an out-of-band emission in a wireless modem, including spurious emissions, such as a Wi-FI modem, to minimize interference on a collocated or co-running downlink reception of another wireless modem residing on the same device by dynamically adjustment of a power consumption.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel IP Corporation
    Inventors: Michael Kerner, Uri Parker, Avi Gazneli, Nati Dinur
  • Patent number: 9842624
    Abstract: Image stitching is described for multiple camera video by placing seams for objects in the scene. An object of interest is identified within an overlap between two images each from a different adjacent camera of a multiple camera system. An identified object of interest is placed within an identified one of the two images. A seam is placed between the two images so that the object of interest is within the identified image and not within the other of the two images. The two images are joined at the placed seam and the two joined images are rendered as a single image joined at the placed seam.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: December 12, 2017
    Assignee: INTEL CORPORATION
    Inventors: Barnan Das, Stanley Baran, Richmond Hicks, Sean Pyo, Kanghee Lee
  • Patent number: 9842065
    Abstract: A data processing system (DPS) uses platform protection technology (PPT) to protect some or all of the code and data belonging to certain software modules. The PPT may include a virtual machine monitor (VMM) to enable an untrusted application and a trusted application to run on top of a single operating system (OS), while preventing the untrusted application from accessing memory used by the trusted application. The VMM may use a first extended page table (EPT) to translate a guest physical address (GPA) into a first host physical address (HPA) for the untrusted application. The VMM may use a second EPT to translate the GPA into a second HPA for the trusted application. The first and second EPTs may map the same GPA to different HPAs. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Rajesh P. Banginwar, Sumanth Naropanth, Sunil K. Notalapati Prabhakara, Surendra K. Singh, Arvind Mohan, Ravi L. Sahita, Rahil Malhotra, Aman Bakshi, Vasudevarao Kamma, Jyothi Nayak, Vivek Thakkar, Royston A. Pinto
  • Patent number: 9842022
    Abstract: Technologies for reducing latency in read operations include an apparatus to perform a read attempt of a target data set from a memory, to obtain a candidate data set. A controller performs the read attempt using an initial read parameter, such as an initial read reference voltage. The controller is also to determine a candidate ratio of instances of data values in a portion of the candidate data set, compare the candidate ratio to a predefined reference ratio, determine whether the candidate ratio is within a predefined range of the predefined reference ratio, and, in response to a determination that the candidate ratio is not within the predefined range, adjust the read parameter and perform a subsequent read attempt of the target data set with the adjusted read parameter.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventor: Ravi H. Motwani
  • Patent number: 9842082
    Abstract: In one embodiment, a processor includes a plurality of cores each including a first storage to store a physical identifier for the core and a second storage to store a logical identifier associated with the core; a plurality of thermal sensors to measure a temperature at a corresponding location of the processor; and a power controller including a dynamic core identifier logic to dynamically remap a first logical identifier associated with a first core to associate the first logical identifier with a second core, based at least in part on a temperature associated with the first core, the dynamic remapping to cause a first thread to be migrated from the first core to the second core transparently to an operating system. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Ankush Varma, Krishnakanth V. Sistla, Guy G. Sotomayor, Andrew D. Henroid, Robert E. Gough, Tod F. Schiff
  • Patent number: 9842056
    Abstract: Systems and methods for non-blocking implementation of cache flush instructions are disclosed. As a part of a method, data is accessed that is received in a write-back data holding buffer from a cache flushing operation, the data is flagged with a processor identifier and a serialization flag, and responsive to the flagging, the cache is notified that the cache flush is completed. Subsequent to the notifying, access is provided to data then present in the write-back data holding buffer to determine if data then present in the write-back data holding buffer is flagged.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Karthikeyan Avudaiyappan, Mohammad Abdallah
  • Patent number: 9842156
    Abstract: In accordance with some embodiments, classification of input/output requests from a database to a storage system may be performed. Each input/output request may be associated with a database class, and each database class may be mapped to a quality of service policy. Thus, quality of service may be enforced such that different data blocks within the storage system of the database may be afforded appropriate quality of service.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Michael P. Mesnier, Tian Luo, Feng Chen
  • Patent number: 9844068
    Abstract: Techniques are disclosed that dynamically allocate communications resources in a wireless communications network, such as a wireless personal area network (WPAN). For instance, a wireless communications device may obtain a resource allocation. This resource allocation includes a time slot (e.g., a TDMA time slot) within a wireless communications medium. The device determines a first portion of the time slot in which it intends to transmit data. Also, the wireless communications device relinquishes a second portion of the time slot that occurs after the first portion of the time slot. Based on this relinquishment, a central controller device may reallocate the second portion of the time slot.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Solomon Trainin, Herbert Liondas
  • Patent number: D805046
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Sayan Lahiri, Nicholas J. Klein, Brian A. Wilk, Christine Kim, Jianfang Zhu, Aleksander Magi