Abstract: An element that prevents the formation of a channel is arranged in a level of the channel region (Kaa) at one of two opposite sidewalls of a semiconductor structure that has a source/drain region (S/D1a) and a channel region (Kaa) of a vertical selection transistor arranged therebelow. The source/drain region as well as a respective word line (W1a) adjoin at both sidewalls. For folded bit lines (B1a), respectively two word lines (W1a) can be formed in the trenches (G2a). The elements of semiconductor structures neighboring along one of the trenches (G2a) are then arranged in alternation at a sidewall of the trench (G2a) and at a sidewall of a neighboring trench (D2a). A storage capacitor can be arranged over a substrate (1a) or can be buried in the substrate (1a). The connection of the selection transistor to a bit line (B1a) can ensue in many ways.

Abstract: A nonvolatile memory device utilizing a program junction region of a p-type impurity and oxide grown thereon. In one aspect, the device comprises a programming structure and a program junction separated from said programming structure by a field oxide region. A program junction oxide layer overlies said program junction region. A floating gate is provided over the oxide which covers said programming structure, said program junction oxide layer, and in some embodiments the gate oxide of a sense transistor.

Abstract: A nonvolatile memory includes a first conductive type of semiconductor region and a second conductive type of impurity diffusion layer. The impurity diffusion layer is formed by doping into a predetermined region of the semiconductor region, impurity of the second conductive type that differs from the first conductive type. The impurity diffusion layer is used as a bit line. The impurity diffusion layer has a specific layer in which an impurity density is substantially equal to or higher than 1×1018 cm−3, and wherein B>A where A is a diffusion length in a lateral direction from the predetermined region and B is a thickness of the specific layer in a depth direction.

Abstract: A non-volatile semiconductor memory device includes memory cells each having a duplicate gate structure in which a floating gate and a control gate are stacked.

Abstract: A method of manufacture of self-aligned floating gate, flash memory device on a semiconductor substrate includes the following steps. Form a blanket silicon oxide layer over the substrate. Form a blanket floating gate conductor layer over the silicon oxide layer. Pattern the blanket silicon oxide layer, the floating gate conductor layer and the substrate in a patterning process with a single floating gate electrode mask forming floating gate electrodes from the floating gate conductor layer and the silicon oxide layer; and simultaneously form trenches in the substrate adjacent to the floating gate electrode and aligned with the floating gate electrodes thereby patterning the active region in the substrate. Form a blanket dielectric layer on the device filling the trenches and planarized with the top surface of the floating gate electrodes. Form an interconductor dielectric layer over the device including the floating gate electrodes. Form a control gate conductor over the interconductor dielectric layer.

Abstract: A read-only memory structure and method of manufacture comprising the steps of sequentially forming a tunneling oxide layer, a first polysilicon layer, a bottom oxide layer and a silicon nitride layer over a semiconductor substrate having field oxide layers already formed thereon. A mask is used to pattern the various layers above the semiconductor substrate forming a floating gate out of the first polysilicon layer. Thereafter, a doped region in formed in the semiconductor substrate, and then a chemical vapor deposition method is used to form a top oxide layer and a second silicon nitride layer over the first silicon nitride layer. Subsequently, the second silicon nitride layer is etched back to form spacers on the sidewalls of the floating gate. Next, thermal oxidation is carried out so that the doped region is oxidized into an etching barrier layer while a silicon oxy-nitride layer is formed over the surface of the spacers. Thereafter, an annealing operation is performed to densify the oxide layer.

Abstract: In a non-volatile semiconductor memory device according to the present invention, a p type source region and a p type drain region are formed in the surface of an n well. A floating gate electrode and a control gate electrode are formed on a channel region with a tunnel oxide film interposed therebetween. According to this structure, a negative potential is applied to the drain region and a positive potential is applied to the control gate electrode when data is programmed, whereby electrons are injected from the drain region to the floating gate electrode by a band-to-band tunnel current induced hot electron injection current in the drain region. As a result, a non-volatile semiconductor memory device is provided which can prevent deterioration of the tunnel oxide film and which can be miniaturized.

Abstract: This invention discloses a vertical DMOS transistor cell formed in a semiconductor substrate of a first conductivity type with a top surface and a bottom surface. The vertical DMOS transistor cell includes a trenched gate comprising polysilicon filling a trench opened from the top surface disposed substantially in a middle portion of the cell. The DMOS transistor cell further includes a source region of the first conductivity type surrounding the trenched gate near the top surface of the substrate. The DMOS transistor cell further includes a body region of a second conductivity type encompassing the source region. The body region surrounding the trenched gate and extends vertically to about one-half to two-third of the depth of the trenched gate. The body region further includes a body-dopant redistribution-compensation region under the source region near the trenched gate having a delta-increment body dopant concentration distribution higher than remaining portions of the body region.

Abstract: The present invention is a method of utilizing microwave energy for annealing of ion implanted wafers. By controlling the time, power density and temperature regime, it is possible to substantially fully anneal the wafer while limiting (and substantially preventing) the diffusion of dopant into the silicon, thereby producing higher performance scaled semiconductor devices. It is also possible, using different conditions, to allow and control the dopant profile (diffusion) into the silicon. Another aspect of the present invention is a method of forming a PN junction in a semiconductor wafer having a profile depth less than about 50 nm and a profile wherein the net doping concentration at said PN junction changes by greater than about one order of magnitude over 6 nm wherein the surface concentration of said dopant is greater than about 1×1020/cm3.

Abstract: A MOS transistor including a gate electrode on a gate oxide over a channel region between a source region and a drain region also includes a shield electrode at least partially on the gate oxide adjacent to, self-aligned with, and at least partially coplanar with the gate electrode and between the gate electrode and drain region. Placing the shield electrode on the gate oxide improves the gate-drain shielding, reduces the gate-drain capacitance, Cgd, and reduces hot electron related reliability hazard.

Abstract: A circuit device that includes a gate overlying an area of a semiconductor substrate, a well formed in the substrate proximate a first edge of the gate and doped with a first concentration of a first dopant, a channel region doped with a first concentration of a second dopant underlying a portion of the gate adjacent the well, a non-conducting region formed in the first portion of the well, and a contact to the second portion of the well distal from the first edge of the gate.

Abstract: An integrated circuit includes a plurality of transistors formed to include insulative punchthrough regions. Each of the plurality of transistors includes a channel formed upon a substrate, an insulative punchthrough region formed below the channel, a source formed upon the insulative punchthrough region residing adjacent a first end of the channel, a drain formed upon the insulative punchthrough region residing adjacent a second end of the channel, a gate oxide formed above the channel and a gate conductor formed above the gate oxide. Isolation regions may also be formed in the substrate that have an etch stop defination that was formed upon formation of the insulative punchthrough region. A voltage threshold region may be formed between the gate oxide and the channel and lightly doped regions may be formed adjacent the channel. The insulative punchthrough region may be and oxide layer formed within the substrate in an oxygen implant step that also formed the etch stop defination.

Abstract: An electrostatic discharge protection circuit triggered by a transistor having a floating base is disclosed. The electrostatic discharge protection circuit in accordance with the present invention comprises: an N-type semiconductor layer, a floating P-type semiconductor layer, a first P-type doped region, a first N-type doped region, a second N-type doped region, and a third N-type doped region. The floating P-type semiconductor layer is in contact with the N-type semiconductor layer so as to establish a junction there between. The first P-type doped region and the first N-type doped region are formed in the N-type semiconductor layer, both of which are connected to a first node. The second N-type doped region is formed in the P-type semiconductor layer and connected to a second node, while the third N-type doped region spans the junction. In addition, there is formed a gate structure overlying a portion of the P-type semiconductor layer between the second and third N-type doped regions.

Abstract: An SCR provides for increased holding voltage by decoupling the pnp and npn parasitic bipolar transistors of the SCR. In one embodiment, a N+ region is placed between the n+ region and the p+ region normally associated with conventional SCR devices, to formulate a new resistance. The new resistance is manifested to allow more current to flow through the new resistance rather than through the SCR parasitic pnp bipolar transistor. Since the parasitic pnp bipolar transistor no longer turns on as strongly as it would otherwise without the low resistance path through the new resistor, the holding voltage of the SCR is raised.

Abstract: A semiconductor device includes: a semiconductor substrate; a well region of a first conductivity type formed; a well region of a second conductivity type; a trench isolation region; a source region and a drain region of the first conductivity type; a channel region formed; a gate insulating film; and a gate electrode being electrically connected to the well region of the second conductivity type, wherein the product &tgr;, i.e.

Abstract: An MOS device and the method of making the device which includes a semiconductor substrate having a well therein of predetermined conductivity type. A tank having a surface is disposed within the well. The tank has a highly doped region of opposite conductivity type and a lightly doped region of opposite conductivity type between the highly doped region and the surface of tank. The lightly doped region in the tank is doped both the predetermined conductivity type and the opposite conductivity type with a resulting net lightly opposite conductivity type doping. A drain region of opposite conductivity type is disposed in the region of the tank between the highly doped region and the surface and disposed at the surface and a source region of opposite conductivity type is disposed in the well and spaced from the tank.

Abstract: An integrated circuit fabrication process is provided in which a gate electrode including a gate dielectric and a gate conductor is formed upon a semiconductor substrate. Preferably, the gate dielectric has a dielectric constant greater than the dielectric constant of silicon dioxide. In an embodiment, sidewall spacers are formed laterally adjacent opposed sidewall surfaces of the gate electrode. An interlevel dielectric is then formed above the semiconductor substrate and selectively removed from above active regions of the semiconductor substrate to form an opening. Source and drain implant areas are formed self-aligned with the opposed sidewall spacers. A metal silicide layer may be formed across upper surfaces of the gate conductor and source and drain areas, a second interlevel dielectric deposited in the opening, and contacts formed through the second interlevel dielectric to the metal silicide.

Abstract: The invention relates to a radiation-sensitive device comprising a thin radiation-sensitive element (2), in particular a thin photodiode (2). The device includes a substrate (1) on which a photodiode (2) is provided. The surface (5) of the photodiode serves as a semi-pervious mirror (5) through which the radiation (100) enters; a reflecting layer (6) situated between the photodiode (2) and the substrate (1) also serves as a mirror (6). As a result, a so-called resonant cavity effect is possible, resulting, inter alia, in wavelength selectivity of the device. The known device has insufficient wavelength selectivity, which, in addition, cannot readily be set in an accurate and reproducible manner. A device in accordance with the invention is characterized in that the reflecting layer (6) is a metal layer (6) and in that the photodiode (2) is secured to the substrate (1) by means of an adhesive layer (7).

Abstract: A semiconductor wafer is disclosed including a set of alignment marks and buffer structure. The buffer structure may collect or trap fabrication and/or processing materials and/or contaminants that may arise in the further fabrication steps and that may adversely affect the alignment marks. The buffer structure thus helps to preserve the alignment marks such that, e.g., lithographic masks used in fabricating the semiconductor wafer may be accurately aligned during further processing.

Abstract: A collective substrate of active-matrix substrates is divided into a first block and a second block. In cells of the first block and the second block, from a corresponding signal input pad group, an inspection scanning signal is inputted via a scanning-line short ring connecting line to scanning lines, an inspection display signal is inputted via a signal-line short ring connecting line to signal lines, and an auxiliary capacity wire signal is inputted via an auxiliary capacity wire main wire connecting line to auxiliary capacity wires. This arrangement makes it possible to perform an electrical inspection with high accuracy and efficiency on a large-format active-matrix substrate, and to manufacture an inspection probe frame in a simple manner at low cost.

Abstract: A self-aligned structure and method of etching contact holes in the self-aligned structure are described. The dielectric materials, etching methods, and etchants are chosen to provide high selectivity etching. The structure comprises an electrode with a silicon oxy-nitride cap and silicon oxy-nitride spacers on the sidewalls of the electrode and the cap. An etch stop layer of silicon nitride is deposited over the substrate covering the spacers and cap. A layer of silicon oxide is deposited over the etch stop layer. Etching methods and etchants are used which provide a ratio of the etching rate of silicon oxide to the etching rate of silicon nitride or silicon oxy-nitride of at least eight and a ratio of the etching rate of silicon nitride to the etching rate of silicon oxy-nitride of at least two.

Abstract: A high frequency microelectronic package suitable for high-frequency microelectronic devices includes a base which is at least partially conductive and attached to an RF substrate with a cavity formed at its center. The base may be metal or ceramic with a metal layer deposited thereon. A pattern of conductive paths for providing interconnection from the inside to the outside of the package are formed on the surface of the RF substrate. These conductive patterns are designed to have a constant impedance when uncovered, regardless of the dielectric property of the material used to cover the conductive patterns. Namely, a sealing cap or a lid, made from a variety of dielectric materials, may be attached to the RF substrate by a non-conductive adhesive, such as a polymer adhesive or low temperature seal glass, to seal the package once the microelectronic device has been mounted inside.

Abstract: The present invention relates to a chip package and to methods of testing a chip package wherein contact to chip leads is made by a configuration of testing probes in such a manner so as to allow for shorter, tighter-pitch, and more robust chip leads that will not short out into neighboring adjacent chip leads. The present invention also relates to a chip package wherein the terminal ends of the chip leads are constrained in a dielectric medium such that package testing may be carried out before final sizing of chip lead lengths.

Abstract: An interconnected apparatus for producing a low loss, reproducible electrical interconnection between a semiconductor device and a substrate includes a rod and rod receptor. The rod, generally cylindrically shaped, is attached to the semiconductor device and includes an outer circumferential wall which comes into contact with the rod receptor during a bonding process. A lip portion is formed on one end of the rod receptor for interlocking engagement with the rod. The rod receptor is plated on the substrate and includes a generally circularly shaped body which forms a centrally disposed well for receiving the rod. A lip portion is formed on one end or mouth of the rod receptor for interlocking engagement with the rod. When the rod and corresponding receptor are aligned and brought together, the rod deforms and interlocks with its corresponding rod receptor. A thermo-compression bonding process is utilized to bond the rod to the rod receptor, thereby producing a strong interlocking bond.

Abstract: Disclosed is a thin plate member for forming a semiconductor package, having a recess for receiving a semiconductor chip. The thin plate is composed of sintered metal, e.g. sintered copper or sintered alluminum alloy. A sintered metal body being porous and having a shape which is close to the shape of the thin plate member is prepared, and it is sized into the shape of the thin plate member. The sintered alluminum alloy comprises 0.4 to 0.8% by weight of magnesium, 0.2 to 0.6% by weight of silicon and the balance aluminum and has a structure comprising an aluminum phase being formed of aluminum particles and an alloy phase being composed of magnesium, silicon and aluminum and interposing between the aluminum particles, and the sintered copper has a metallographic structure comprising a phase of copper particles.

Abstract: It is intended to provide a heat sink unit and an electronic apparatus capable of efficiently cooling a plurality of semiconductor devices and taking action for unnecessary electromagnetic waves. There are provided a plurality of fan units and electromagnetic shielding means for cutting off electromagnetic waves on a heat sink substrate. It is also provided a heat sink substrate, a unit having a fan for supplying fluid to the heat sink substrate and driving means for rotating the fan, and electromagnetic shielding means provided for the heat sink substrate.

Abstract: An integrated semiconductor device is formed by bonding the conductors of one fabricated semiconductor device having a substrate to the conductors on another fabricated semiconductor device having a substrate, flowing an etch-resist in the form of a photoresist between the devices, allowing the etch-resist to dry, and removing the substrate from one of the semiconductor devices. Preferably the etch-resist is retained to impart mechanical strength to the device. More specifically, a hybrid semiconductor device is formed by bonding the conductors of one or more GaAs/AlGaAs multiple quantum well modulators to conductors on an IC chip, flowing a photoresist between the modulators and the chip, allowing the photoresist to dry, and removing the substrate from the modulator.

Abstract: In a semiconductor device constructed of bare chips stacked together and improved in reliability in connection and in yield in production, used therein is the wiring built-in insulation film assuming a linearly elongated shape containing a series of, for example, five unit films linearly arranged. Each of the unit films corresponds to each of the chips. The film is bent through an angle of approximately 180 degrees at every unit film alternately to the right and the left in a zigzag manner so that each of the chips is packaged in each of the unit films, whereby all the chips are stacked together in the direction of thickness dimensions of the chips through the film having its end portion fixed to the lowermost one of the chips in a manner such that all the chips are wrapped up in the film to form the semiconductor device.

Abstract: The present invention is a method and apparatus for a very low profile ball grid array package. A substrate is provided with an aperture. A thin sheet material is secured to the substrate, covering the aperture, so as to form a cavity. A semiconductor die is mounted in the formed cavity on the thin sheet material. The semiconductor die is encapsulated with the thin sheet material supporting it during encapsulation. The use of the thin sheet material to form the cavity is a cost effective way to construct a ball grid array package having a very low profile.

Abstract: An ohmic contact including a gallium arsenide substrate having an epitaxially grown crystalline layer of indium arsenide on the substrate. The crystalline material and the substrate define an interface, layers are n-doped with silicon close to the interface.

Abstract: The present invention relates to the formation of a protective intermetallic layer 15 on the surface of damascene metal interconnects 12 during semiconductor fabrication. The intermetallic layer 15 prevents problems associated with formation of an oxide layer on the surface of the interconnect. The intermetallic layer is formed by depositing a metal on the surface of the interconnect that will both reduce any present metal oxide layer and form an intermetallic with the interconnect metal.

Abstract: A manufacturing method of a semiconductor device for mounting an LSI bare-chip component, or a bare chip, on a printed circuit board, or a substrate, with flip-chip bonding technology, comprises a recess forming step of forming recesses on substrate pads of the substrate, an adhesive coating step of applying adhesive to a location on the substrate at which the bare chip is to be placed, a chip mounting step of placing the bare chip on the substrate while aligning the positions of the bumps formed on the chip pads of the bare chip and the substrate pads of the substrate, and an adhesive hardening step of hardening the applied adhesive. Also disclosed is a semiconductor device manufactured with the above-mentioned manufacturing method.

Abstract: A layer-type ball grid array (BGA) semiconductor package, module and methods of manufacturing same is provided that expands the capability of the package in a limited area. The BGA semiconductor package and method of manufacturing same includes a substrate having a cavity formed therein and an interconnection pattern layer that has a plurality of conductive interconnections forming electric channels between or electrically coupling upper and lower surfaces of the substrate is attached to an external surface of the substrate. The interconnection pattern layer extends from the upper surface to the lower surface of the substrate. A semiconductor chip is provided in bottom of the cavity and a plurality of conductive wires electrically couple the semiconductor chip to one of the conductive interconnections. A molding part fills in the cavity for sealing the semiconductor chip and wires.

Abstract: In order to form a hollow portion in a resin block after a molding operation, a projection for forming a hollow portion in a resin block is formed on an upper die. A front face of the projection is processed into a mirror finished face (smoothed flat face). Recess portions are formed in the front face of the projection. The position of the recess portions correspond to wire bonding regions of a lead frame. The lead frame is clamped between an upper die and a lower die. A molding resin is injected into a space between the upper and lower dies. As a result, an excellent wire bonding face can be secured at regions on the lead frame in correspondence with the recess portions.

Abstract: An encapsulated optocomponent has an optocomponent assembly having an optical interface at one side, which has guide pins for positioning a connected optical component or optical connector. The assembly is attached to the outermost portion of a flexible tongue, which is an integral part of a dielectric carrier such as a polymer carrier. On or inside the carrier and the tongue thereof electrical conductive paths are arranged which are connected to the optoassembly and to electrical driver circuits in a driver circuit assembly, so that the carrier also has the function of a conventional lead frame. The entire device is molded into encapsulating plastic material.

Abstract: An energy platform system for generating electrical energy from the weight of a moving vehicle. The system comprises a fluid bed containing a volume of fluid which is compressible by the weight of the moving vehicle driven thereover. A circulation system is in fluid communication with the fluid bed for receiving the fluid forced from within the bladder. The circulation system is operable is operable to translate the energy of the fluid circulated therethrough into mechanical energy. The platform system additionally comprises a generator cooperatively engaged to the circulation assembly and operable to convert the mechanical energy of the circulation system into electrical energy. It is further contemplated that electricity may be produced by the movement of a vehicle over a platform mechanically coupled to a linear generator. Accordingly, the linear generator moves in relation to the movement of the platform such that the linear generator is operative to generate an electrical current thereby.

Abstract: An electric energy supply system for a vehicle includes a power output shaft electric power generation unit and an exhaust gas electric power generation unit for generating electric power by utilizing a power energy and an exhaust gas energy. A storage battery, a driving condition judgment unit for judging a driving condition of the vehicle, an electricity storage condition judgment unit for judging an electricity storage condition of the storage battery, and an electric power control unit for controlling a supply amount of electric energy to be used in the vehicle are provided. Under the control of the electricity power control unit, the amount of electric power generated by each of the power output shaft electric power generation unit and the exhaust gas electric power generation unit is controlled in accordance with information obtained from the driving condition judgement unit and the electricity storage condition judgement unit.

Abstract: A digital control system and method for monitoring, acquiring data, and controlling the operation of a generator set. The digital control system comprises a computer that receives multiple discrete parameter inputs representing values of analog characteristics and digital characteristics of a generator set. The computer runs a software program to interpret the received inputs as measurements of analog characteristics and status of digital characteristics of the generator set. The computer is capable of graphically displaying and monitoring the measurements and status of the generator set. A method of monitoring and controlling a generator set comprises receiving multiple discrete parameter inputs representing the value of analog and digital characteristics of a generator set, interpreting the received inputs as measurements of analog characteristics and status of digital characteristics of the generator set, and graphically displaying the measurements and status of the generator set.

Abstract: A system for recovering energy from the natural and man made sources of wind, water and sunshine provides within a given local area wind, water and solar apparatuses for converting all three wind, water and solar energies to electrical power to provide a reasonably steady supply of electrical power at all times. The wind and water apparatuses may be double speed Savonius rotor electrical generating apparatuses each of which includes two Savonius type rotors mounted adjacent to one another for rotation about a common axis with the blades of the rotor units being arranged so that the rotor units rotate in opposite directions relative to one another under the influence of a given wind or flow of water.

Abstract: A device for locking and unlocking a door of a motor vehicle. The device includes a transmitting unit located on the motor vehicle and at least one transponder with an access authorization code assigned to a user. To allow flexible adjustment to different situations, the information exchanged between the transmitting unit and transponder contains not only an access authorization code but also a driving authorization code. In addition to the transponder, at least one additional storage device is provided in or on the vehicle for storing the driving authorization.

Abstract: The present invention provides an improved vehicle entry transmitter that can be used as a transmitter to lock and unlock vehicle doors, turn an alarm on and off, and/or disable and enable the vehicle. The present invention provides a vehicle entry transmitter that uses a contact switch/probe tip combination (referred to a “switch tip” in this application). When the switch tip is pressed against a vehicle the switch is activated and the vehicle entry transmitter sends a control signal through the switch tip and into the vehicle, where it can be picked up by a receiver. The receiver can then lock/unlock vehicle doors, turn an alarm on/off, and/or disable/enable the vehicle. In the preferred embodiment, the switch tip comprises a conformable and conductive material.

Abstract: An automatic transfer switch apparatus for use with a stand-alone generator, for supplying emergency power to a residence or small business. The automatic transfer switch apparatus is configured to sense a utility line failure, start up and stabilize the generator, and switch over the household circuits from the utility to the generator, and switch back when the utility recovers. A load-shedding feature is provided for shedding and restoring different circuits within the residence, that represent loads of different priority, with loads being shed and restored, according to their priority.

Abstract: In an alternating current generator and fans thereof in accordance with the invention, the cooling efficiency of the alternating current is improved by fans fixed to a rotor. When the fans are formed during a press working operation, the blades are formed directly from the fans by cut-raising the fans toward a bracket side to form blades and simultaneously cut-raising protruding potions toward a rotor side to form protrusions. This design allows for both improvement in cooling efficiency of the alternating current generator and ease of manufacture of the fans.

Abstract: An automotive alternator in which a lead wire of a rotor coil extends along a wall formed in a root portion between claw-shaped magnetic poles so as to be substantially parallel to the axis of a shaft.

Abstract: A flywheel power source device for converting electric energy into kinetic energy and for storing the kinetic energy by rotating a flywheel of which rotary shaft is rotatably supported by a bearing mounted in a casing at high speed, wherein the kinetic energy is reconverted into electric energy when necessary; the flywheel power source device is provided with a rotational fulcrum at a bottom of the rotary shaft and a center of gravity of the flywheel being positioned on a line of action of a resultant force of magnetic attractive forces acting on the flywheel.

Abstract: A technique is provided for sealing a bearing cavity in a rotating machine such as an electric motor. The bearing cavity is defined by annular elements on either side of an antifriction bearing set. Seals are provided on the sides of the bearing cavity and are secured to a support structure, such as the motor housing, and include elements which ride against the rotating shaft during operation. The seals exert a sealing force against the rotating element which results at least partially from internal pressure within the bearing cavity provided by a pressurized lubricant stream. The lubricant stream is provided in the form of an airborne oil mist.

Abstract: A motor for a power tool adapted to be powered by either an AC power source or a DC power source. The motor 12 includes a permanent magnet field 30 having an armature 34 disposed within the field. The armature 34 includes a shaft 36 having a DC commutator 38 disposed at one end of the shaft. The DC commutator is coupled to a first armature winding. An AC commutator 42 is disposed coaxially over a portion of the DC commutator 38 and is coupled to a second armature winding 44. A first pair of brushes 46 are disposed on the DC commutator 38 for coupling power from a DC power source to the first armature winding 40. A second pair of brushes 48 couple rectified AC power to the second armature winding 44. A power module including an AC/DC selector switch 26 enables a user to select whether AC or DC power is to be used to power the tool.

Abstract: A two-phase permanent-magnet electric rotating machine in which vibration and noise are less is provided. The machine is constituted by: a stator having 2n main poles (n being an integer satisfying n≧2) each of which has at its end portion a predetermined number of magnetic teeth and has a winding provided thereon; and a rotor having permanent magnets formed so that N (north) and S (south) equal in number of the permanent magnets are alternately disposed in a direction of rotation of the rotor; wherein 2(n−1) alternate ones of the main poles are made to be in-phase and a half ones of the in-phase main oles have a polarity which is opposite to a polarity of the other ones. It is preferable to make the number of the magnetic pole pairs of N and S of the rotor be 4m±1 (m being an integer satisfying m≧1) when the value n is set to 2. It is preferable to form the windings so that the in-phase main poles of the stator are made to be alternately inverted in polarity.

Abstract: A cylindrical yoke 8 bonded to an inner surface 44 of a cylindrical portion 43 of a rotor case 40 of a motor has a yoke separating slit 85 for separating the yoke 8 in the circumferential direction. A cylindrical rotor magnet 9 is partially bonded to an inner surface 81 of the yoke 8 at a plurality of bonded portions 10 formed apart from one another for the same intervals in the circumferential direction. When the cylindrical portion 43 has been expanded by heat, the yoke separating slit 85 is expanded and the yoke 8 follows the non-bonded portion of the cylindrical portion 43. Therefore, distortion of the cylindrical portion 43 can be prevented. In the non-bonded portions 11 between the yoke 8 and the rotor magnet 9, deformation occurs such that an inner surface 81 of the yoke 8 is separated from an outer surface 92 of the rotor magnet 9. Thus, damage of the rotor magnet 9 can be prevented.

Abstract: A rotor magnet includes a first polarized layer alternately polarized into different poles while being circumferentially divided into n parts, and a second polarized layer alternately polarized into different poles. An advance phase angle as &thgr;1 with respect to the first polarized layer is set and the magnet is circumferentially divided into n parts. First and second coils are disposed in an axial direction of the rotor magnet. A first outer magnetic pole and a first inner magnetic pole, which are a first stator excited by the first coil, are opposed to an outer peripheral surface and an inner peripheral surface of the rotor, and a second outer magnetic pole, and a second inner magnetic pole which are a second stator excited by the second coil, are opposed to an outer peripheral surface and an inner peripheral surface of the rotor.