Patents Issued in June 28, 2001
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Publication number: 20010005320Abstract: A linear compressor driving device for linear compressor driving a piston in a cylinder by means of a linear motor to generate a compressed gas, hasType: ApplicationFiled: November 30, 2000Publication date: June 28, 2001Applicant: Matsushita elecric Industrial Co., Ltd.Inventors: Misuo Ueda, Kaneharu Yoshioka, Hideki Nakata, Hiroshi Hasegawa
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Publication number: 20010005321Abstract: A power converter system includes: a circuit breaker having one terminal connected to a power system and another terminal connected to a load; a transformer for interconnection; a power converter; and a controller for controlling the power converter, wherein, during a return to grid connected operation, the power converter is controlled such that the phase of an output voltage of the power converter matches the phase of the system voltage, and the circuit breaker is closed, so as to prevent an overcurrent during a changeover from the self commutated operation to the grid connected operation of the power converter.Type: ApplicationFiled: December 27, 2000Publication date: June 28, 2001Inventors: Masaya Ichinose, Motoo Futami, Shigeta Ueda, Kazuo Suzuki, Akira Maekawa, Yasuhiro kiyofuji
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Publication number: 20010005322Abstract: A d.c.-to-d.c. converter of the kind having a step-up or step-down transformer with a primary to be connected to a d.c. power supply via an electronic switch, and a secondary to be connected to a load via a smoothing and rectifying circuit. The voltage being applied to the load is detected and fed back to a switch control circuit whereby the switch is controlled to keep constant the converter output voltage. Connected in parallel with the transformer primary, a surge suppressor circuit has a serial connection of a surge-absorbing capacitor and a rectifying diode and a resistor for absorbing a surge developing across the transformer primary winding each time the switch is turned off.Type: ApplicationFiled: December 11, 2000Publication date: June 28, 2001Inventor: Akihiro Uchida
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Publication number: 20010005323Abstract: A power circuit for rectifying and smoothing a commercial voltage to obtain a direct-current voltage. The power circuit comprises a smoothing choke coil inductance varying circuit for variably controlling an inductance value of a smoothing choke coil within a smoothing circuit. The smoothing choke coil inductance varying circuit flows a current through a secondary winding of the smoothing choke coil to provide induction based on an output voltage from a diode bridge such that an inductance value of a primary winding of the smoothing choke coil is at the maximum when the output voltage from the diode bridge is zero volt, is reduced with an increase in the output voltage, reaches a predetermined value when the output voltage is at the maximum, and is increased with a reduction in the output voltage.Type: ApplicationFiled: December 21, 2000Publication date: June 28, 2001Inventor: Manabu Yamaguchi
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Publication number: 20010005324Abstract: An electrically erasable and programmable read only memory (EEPROM) or other memory integrated circuit (IC) includes memory cells arranged in N blocks. The number of blocks, N, is selected to maximize utilization of the space available in a standard IC package. The number of blocks need not be an even power of two. More than log2(N) address bits are used to select between the blocks. A plurality of such memory ICs forms an array addressed by a memory controller, providing a number of directly addressable memory locations that need not be an even power of two. Addressing is provided for decoding chip select lines, block select lines, and other address lines. Staggered block decode lines associated with the memory blocks allow juxtaposition of the blocks to form a row in which connections are easily verified.Type: ApplicationFiled: February 2, 2001Publication date: June 28, 2001Applicant: Micron Technology, Inc.Inventor: Christophe J. Chevallier
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Publication number: 20010005325Abstract: A semiconductor memory device according to the invention comprises a first memory cell region, a second memory cell region, and a sense-amplifier row region disposed between the first and second memory cell regions, wherein the sense-amplifier row region has therein a plurality of transistor rows constituting a plurality of sense-amplifiers, at least one power-supply side sense-amplifier driver transistor disposed on the side f the first memory cell region of the plurality of transistor rows, and at least one ground side sense-amplifier driver transistor disposed on the side of the second memory cell region of the plurality of transistor rows.Type: ApplicationFiled: December 12, 2000Publication date: June 28, 2001Applicant: NEC CorporationInventors: Makoto Kitayama, Yukio Fukuzo, Takashi Obara, Yasuji Koshikawa, Toru Chonan, Yasushi Matsubara, Hideki Mitou
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Publication number: 20010005326Abstract: A method is described for reading and writing a ferroelectric memory. In ferroelectric memories, changes in a hysteresis curve on account of aging of the ferroelectric material are reduced or prevented by virtue of the fact that during reading and writing a complementary state is also written in and a capacitor voltage is reduced to 0 V before a memory cell is deactivated.Type: ApplicationFiled: December 18, 2000Publication date: June 28, 2001Inventor: Georg Braun
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Publication number: 20010005327Abstract: A negative resistance device (NRD) has a MOSFET-like structure, and is biased by:Type: ApplicationFiled: December 22, 2000Publication date: June 28, 2001Inventors: Russell Duane, Alan Mathewson, Ann Concannon
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Publication number: 20010005328Abstract: A threshold voltage distribution D2 apparently decreases to a distribution D3 when there is a distribution D1 of memory cells having deep depletion. After an erase is performed utilizing an erase determination level 1 higher than a desired erase determination level 2, only data in memory cells of distribution D1 is rewritten utilizing a rewrite determination level 1 lower than a desired rewrite determination level 2. The erase is performed utilizing erase determination level 2 since the threshold voltage distribution shifts a distribution D7 by canceling the effect caused by the memory cells having deep depletion, and only data in the memory cells having shallow depletion is rewritten.Type: ApplicationFiled: December 21, 2000Publication date: June 28, 2001Applicant: NEC CorporationInventor: Nobutoshi Tsunesada
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Publication number: 20010005329Abstract: A failure analyzing method using a failure-analyzing semiconductor device includes a first step of manufacturing a semiconductor device adapted for product in predetermined numbers during a first interval and a second step of manufacturing a failure-analyzing semiconductor device in predetermined numbers every second interval during the first interval. The first step includes a step of forming memory cells in a first semiconductor substrate. The second step includes a step of forming memory cells in a second semiconductor substrate and a step of forming first and second digitated interconnections at the same level above the second semiconductor substrate, which are connected to the memory cells and arranged so that the fingers of each of the first and second interconnections are interleaved with those of the other with a predetermined space therebetween.Type: ApplicationFiled: December 28, 2000Publication date: June 28, 2001Inventor: Itaru Tamura
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Publication number: 20010005330Abstract: A NAND-type flash memory device and a method of operating the same are provided. The NAND-type flash memory device includes a cell array area, which is composed of a plurality of cell blocks sharing m bit lines, and a row decoder driving the cell array area. Each of the cell blocks includes a string select line, n word lines and a ground select line which cross the m bit lines. The row decoder includes a plurality of block drivers connected to the plurality of cell blocks, respectively. Each of the block drivers includes a first group of word driver transistors, which are connected to the odd numbered word lines, respectively, and a second group of word driver transistors, which are connected to the even numbered word lines, respectively. The gate electrodes of the word driver transistors in the first group are connected to a first driver control line, and the gate electrodes of the word driver transistors in the second group are connected to a second driver control line.Type: ApplicationFiled: December 8, 2000Publication date: June 28, 2001Applicant: Samsung.Inventor: Jung-dal Choi
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Publication number: 20010005331Abstract: A read circuit for semiconductor storage cells (10, 50) including dual read bitlines (23, 24, 51, 52) driven by the cell to full ‘zero’ signals and ‘weak one’ signals comprises a read head circuit (53) which includes an inverter (56) in one of the bitlines (52). The inverter serves to turn a ‘weak one’ signal to a full ‘zero’ signal. A bit select circuit is integrated into the read head circuit (53) and connects the output of the inverter and the other one of the bitlines (51) through bit select switches (57, 58) to the single line output (XT1) of the read head circuit (53).Type: ApplicationFiled: December 8, 2000Publication date: June 28, 2001Inventors: Juergen Pille, Klaus Helwig, Dieter Wendel
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Publication number: 20010005332Abstract: The present invention provides a tunnel barrier structure comprising: a first semiconductor ridged portion having a first top surface, and said first semiconductor ridged portion being defined by a groove; an insulating layer burying the groove, and the insulating layer having a first upper surface which is higher in level than the first top surface of the first semiconductor ridged portion, and the insulating layer having side walls extending upwardly from edges of the first top surface of the first semiconductor ridged portion; side wall insulating films provided on the side walls; and a tunnel insulating film provided on the first top surface of the first semiconductor ridged portion, and the tunnel insulating film being defined by the side wall insulating films.Type: ApplicationFiled: December 26, 2000Publication date: June 28, 2001Applicant: NEC Corporation,Inventor: Yukimasa Koishikawa
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Publication number: 20010005333Abstract: A semiconductor non-volatile memory device that includes memory cells and selection transistors. The memory cells each include a floating gate transistor having an active area, source and drain regions, a floating gate, and a control gate, and each of the floating gate transistors is serially coupled to one of the selection transistors. A contact to the control gate is located above the active area. In a preferred embodiment, the contact is substantially aligned with a central portion of the active area. A method for manufacturing a non-volatile memory device on a semiconductor substrate is also provided. According to the method, a poly1 layer is deposited, an interpoly dielectric layer is deposited above the poly1 layer, and a poly2 layer is deposited above the interpoly dielectric layer. A mask is provided to define the control gate, and a Self-Aligned poly2/interpoly/poly1 stack etching is used to define a gate stack structure that includes the control gate and the floating gate.Type: ApplicationFiled: January 16, 2001Publication date: June 28, 2001Applicant: STMicroelectronics S.r.l.Inventors: Giovanna Dalla Libera, Federico Pio
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Publication number: 20010005334Abstract: A memory cell array is provided to a semiconductor memory device, and a plurality of memory cells composes a column in the memory cell array. The plurality of memory cells are commonly connected to a plurality of bit line pairs. The plurality of bit line pairs are commonly connected to an I/O line pair. A pre-charge circuit is also provided to the semiconductor memory device. The pre-charge circuit pre-charges the I/O line pair. The pre-charge circuit has a selection circuit which selects a pre-charge level of the I/O line pair from among a plurality of voltage levels.Type: ApplicationFiled: December 28, 2000Publication date: June 28, 2001Applicant: NEC CORPInventor: Shigeyuki Nakazawa
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Publication number: 20010005335Abstract: A row redundancy circuit for use in a semiconductor memory device of the present invention having a fuse box independent of banks so as to improve repair efficiency. The row redundancy circuit includes a fuse box coupled to a row address and a bank address from an address buffer in which a fuse corresponding to an address of a word line to be repaired blows-out, a row fuse decoder for AND-operating two outputs of the fuse box, and a bank row address latch coupled to the output of the row fuse decoder for determining a location of a redundant word line in a block to be repaired.Type: ApplicationFiled: December 21, 2000Publication date: June 28, 2001Inventors: Soo-Man Hwang, Chang-Ho Do
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Publication number: 20010005336Abstract: A plurality of sense amplifiers are provided between a plurality of memory cell arrays having a plurality of memory cells. These sense amplifiers are connected to bit lines of the respective memory cell arrays by array selection switches. Each of the sense amplifiers is connected to data lines by column switches. An array control portion is provided at each of the memory cell arrays. This array control portion selectively controls the array selection switches and column switches to transmit the data in an arbitrary memory cell in a memory cell array to the data lines through the sense amplifier.Type: ApplicationFiled: January 26, 2001Publication date: June 28, 2001Applicant: Kabushiki Kaisha ToshibaInventor: Haruki Toda
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Publication number: 20010005337Abstract: A delay locked loop (DLL) for use in a synchronous memory device includes: a first shift controller for generating a first shift-right signal in response to a first comparison signal; a first shift register for performing only a shift-right operation in response to the first shift-right signal; a first delay line unit for controlling each delay amount of internal signals in response to an output of the first shift register, wherein the first delay line unit includes a plurality of delay lines, each delay line having a first unit delay; a second shift controller for generating a second shift-right signal and a shift-left signal in response to a second comparison signal; a second shift register for performing a shift-right operation and a shift-left operation in response to the second shift-right signal and the shift-left signal, respectively; and a second delay line unit for controlling each delay amount of output signals of the first delay line means, wherein the second delay line unit includes a plurality ofType: ApplicationFiled: December 19, 2000Publication date: June 28, 2001Inventor: Hea-Suk Jung
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Publication number: 20010005338Abstract: The subject of the invention is a dynamic mixer for viscous compositions, in particular for components for dental impression compounds. The mixer consists of a mixer tube, a rotor located in the latter, and an end wall with inlet openings through which the components to be mixed pass into the mixer. In doing so, they first alternately fill chambers arranged on the rotor. The composition then flows out of the chambers through admission openings into the mixing channel, where it can be stirred by mixer blades.Type: ApplicationFiled: December 22, 2000Publication date: June 28, 2001Inventors: Wolfgang Muhlbauer, Hans Horth, Bernd Detje, Guido Meyer, Sven Meyer
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Publication number: 20010005339Abstract: A timepiece, whose hands move by mechanical energy of a mainspring transmitted through a wheel train, includes a winding-up portion for accumulating energy in the mainspring, an addition and subtraction wheel train driven by addition and subtraction of accumulated energy corresponding to an amount by which the mainspring is wound up and unwound, respectively, an addition and subtraction wheel, disposed in the addition and subtraction wheel train, that rotates in correspondence with an amount by which the mainspring is wound up and unwound, and a lock mechanism actuated in response to the rotation of the addition and subtraction wheel to limit winding up and unwinding of the mainspring to a selected range of windings of the mainspring. This controls the torque output by the mainspring to a fixed range. The addition and subtraction wheel train allows efficient use of space, and can be incorporated in a watch.Type: ApplicationFiled: January 31, 2001Publication date: June 28, 2001Inventors: Tatsuo Hara, Yoshihiko Momose
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Publication number: 20010005340Abstract: An optical information reproducing apparatus for reproducing information by irradiating a recording medium with a reproducing light beam includes a light source for generating the reproducing light beam, a reproducing circuit for reproducing a reproduction signal by using the light beam, and an adjusting circuit for adjusting the light beam power. The adjusting circuit adjusts the beam power to a value larger than the light beam power at which a value obtained by normalizing the reproduction signal with the beam power is maximized.Type: ApplicationFiled: November 30, 2000Publication date: June 28, 2001Inventor: Koichiro Nishikawa
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Publication number: 20010005341Abstract: A playback apparatus for reading a record carrier includes a drive unit for sending out audio sectors that were recorded on the record carrier, an ID extractor for extracting the ID codes of the audio sectors that were sent out by the drive unit, a retrieval controller for receiving the ID codes extracted by the ID extractor, and a sector data extractor for receiving data fields of the audio sectors that were sent out by the drive unit. The sector data extractor is controlled by the retrieval controller to extract the data fields of appropriate ones of the audio sectors when the ID codes thereof are recognized by the retrieval controller as belonging to a selected one of the audio programs.Type: ApplicationFiled: January 9, 2001Publication date: June 28, 2001Applicant: Winbond Electronics Corporation, a Taiwanese corporationInventor: Rong-Fuh Shyu
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Publication number: 20010005342Abstract: A device according to the invention for scanning a rotating information carrier (2) comprises a transducer (10) and control means (20, 22) for controlling a scanning parameter of the transducer (10), such as the radial position and the setting of a focus. The control means comprise difference signal generating means (20) for generating a difference signal (RE) which is indicative of a difference between a current value and a desired value of the scanning parameter, and correction signal generating means (22) for generating a correction signal (SC) in response to the difference signal. The correction signal generating means (22) comprise a delay loop (25) having first in first out memory means (36) for generating a delayed signal (SDL1) and feedback filter means (38) for filtering the delayed signal (SDL1).Type: ApplicationFiled: December 11, 2000Publication date: June 28, 2001Inventors: Anthonius L.J. Dekker, Antonius H.M. Akkermans
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Publication number: 20010005343Abstract: Optimum movement of first and last signal pulses based on the data pattern is determined before data recording to record marks in the correct position. A specific pattern signal is read from a disc track and digitized with an appropriate slice level by the digitizing circuit (115). A pulse position offset measuring circuit (120) then measures specific edge intervals in the resulting digital signal. Movement of the first and last pulse by the pulse moving circuit (110) is then set so that the offset between the measured edge interval and a predetermined standard edge interval is ideally zero.Type: ApplicationFiled: February 15, 2001Publication date: June 28, 2001Inventors: Mamoru Shoji, Takashi Ishida, Atsushi Nakamura, Junichi Minamino
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Publication number: 20010005344Abstract: An optical pick-up device for optically recording and/or reproducing information on an information record medium having plural record layers and guide tracking layers in the depth direction is disclosed.Type: ApplicationFiled: December 12, 2000Publication date: June 28, 2001Applicant: Olympus Optical Co., Ltd.Inventor: Osamu Nakano
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Publication number: 20010005345Abstract: An apparatus for manufacturing a disc drive comprises an adjusting element, put in contact with a disc table engaged with a rotational shaft of a drive motor via an engaging portion, for varying an inclination of the disc table which is swingable with a point of support at the engaging portion, a non-contact displacement measuring unit for detecting, the inclination of the disc table varied by the adjusting element, control unit for receiving a detection signal from the non-contact displacement measuring unit and stopping rotation of the drive motor when the inclination of the disc table has decreased to a predetermined value or less, and an adhesive supply unit for fixing the disc table to the rotational shaft of the drive motor which has been stopped by the control unit.Type: ApplicationFiled: December 13, 2000Publication date: June 28, 2001Inventors: Ichiro Yamamoto, Motoji Oono
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Publication number: 20010005346Abstract: A data recording apparatus capable of preventing easily copying of information is disclosed with which, even if information is copied, the copied information cannot be reproduced, the data recording apparatus having a terminal to which encoder ID specific for the data recording apparatus is input, a recording unit for recording at least the encoder ID on an optical disk, and an encoding circuit for, in accordance with the encoder ID, encoding data supplied through a terminal and required to be recorded so that encoded data is, together with the encoder ID, recorded on the optical disk.Type: ApplicationFiled: February 20, 2001Publication date: June 28, 2001Applicant: SONY CORPORATIONInventors: Yoichiro Sako, Akira Kurihara, Yoshitomo Osawa, Isao Kawashima, Hideo Owa
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Publication number: 20010005347Abstract: A CD cleaning and labeling device includes a basin-shaped upper case, a lower case engageable with the upper case, a base having a concave base center located inside the lower case for providing a CD supporting surface, and a movable sticking seat located inside the base center. The upper case is furnished with at least one CD cleaning means. The lower case has a base for carrying a CD or a CD label. The sticking seat has a brim for allowing a CD label with a center hole to be sleeved along and a top surface for resting the CD. The sticking seat is movable between an extension position and a retracting position. While in the retracting position, the top surface of the sticking seat is lower than the supporting surface of the base so as to allow the CD to rest upon the supporting surface of the base.Type: ApplicationFiled: January 10, 2001Publication date: June 28, 2001Inventor: Yun-Ming Kwang
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Publication number: 20010005348Abstract: Method for the removable sealing of a component housing, and apparatus to practice the method using an elastic or conformable sealing band. The present invention teaches a sealing band, preferably elastic, to apply a horizontal seal to the horizontal seam defined by vertically assembled component case elements. The seal is maintained in position over the seam by an alignment element disposed on at least one of the seal and the case. The sealing band is rendered electrically conductive by admixing therewith a conductive material, or by plating thereon a conductive coating. A retaining element may be further added to at least one of the sealing band and the case to minimize tampering with the sealing band once installed.Type: ApplicationFiled: December 11, 2000Publication date: June 28, 2001Inventors: Frederick Frank Kazmierczak, Michael John Raffetto, Michael Kenneth Andrews, Michael Alan Maiers
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Publication number: 20010005349Abstract: A loading device for an optical disk medium is described.Type: ApplicationFiled: December 20, 2000Publication date: June 28, 2001Inventor: Nobunari Maeda
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Publication number: 20010005350Abstract: The present invention provides an optical information recording medium includes a first information layer, a separating layer, a second information layer and a second substrate in this order on a first substrate. The first information layer comprises a multilayered thin film including a lower protective layer, a recording layer, an upper protective layer, a reflective layer and a transmittance improving layer in this order from the side near the first substrate. The reflectance in a mark portion formed at the time of focusing and irradiating the light beams incident from the first substrate side on the first information layer is higher than that in a space portion where no mark is formed, and 40% or more of the light beams pass through the first information layer and reach the second information layer.Type: ApplicationFiled: December 18, 2000Publication date: June 28, 2001Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Hideki Kitaura, Noboru Yamada
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Publication number: 20010005351Abstract: An objective lens and an optical head including the objective lens for reading information contained on substrates having different thicknesses using laser beams having different wavelengths. The objective lens includes an annular phase shifter for decreasing an aberration of a focused spot of each of the laser beams. The annular phase shifter can be optimally combined with the objective lens having inner and outer regions each having a different substrate thicknesses.Type: ApplicationFiled: January 25, 2001Publication date: June 28, 2001Inventors: Takeshi Shimano, Akira Arimoto
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Publication number: 20010005352Abstract: A recording/reproducing apparatus having an optical pickup device which is efficient in light use having little spherical aberration.Type: ApplicationFiled: February 22, 2001Publication date: June 28, 2001Inventors: Chul-woo Lee, Jang-hoon Yoo
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Publication number: 20010005353Abstract: An optical recording/reproducing apparatus for recording/reproducing information on a medium including a light source, an optical system for focusing and irradiating a light beam generated by the light source on the medium, a photodetector for detecting a reflected beam from the medium, and a circuit for reproducing information by using a signal from the photodetector. The medium includes a substrate with grooves and lands alternately formed on the substrate in a radial direction. The grooves and the lands both serve as recording tracks with the recording tracks being divided into recording units in the circumferential direction. Each recording unit has a prepit area in a non-groove portion of the substrate with a first prepit being represented as VFO information in the prepit area and a second prepit being represented as address information in the prepit area.Type: ApplicationFiled: February 28, 2001Publication date: June 28, 2001Inventors: Harukazu Miyamoto, Hiroyuki Minemura, Hisataka Sugiyama
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Publication number: 20010005354Abstract: The present invention provides an optical pickup device that is resistant to noise in a signal or an RF signal outputted from each light receiving member. Current signals outputted from the light receiving members are converted into voltage signals by I/V converters. The voltage signals are then added up by an adder, and then the added voltage signal is attenuated by an attenuator, so as to obtain an RF signal having the same signal level as the voltage signal outputted from each I/V converter. The RF signal is then transmitted from the optical pickup device to a circuit substrate through a signal line.Type: ApplicationFiled: December 15, 2000Publication date: June 28, 2001Inventor: Hiroshi Maegawa
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Publication number: 20010005355Abstract: A conventional disc changer uses separate elevating cams, separate connection mechanisms, and separate locking mechanisms to effect driving of the elevation and lowering of spindles constituting a disc holding means and of a disc clamp means at a recording/playing position. Thus, the apparatus is complicated and large, and loads on the elevating cams significantly vary when the drivings of the elevating and lowering of the spindles constituting the disc holding means and the disc clamp means are simultaneously carried out. Consequently, during the elevating driving, the driving force may become insufficient to cause unstable operations, while during the lowering driving, high operating noise may occur. According to the present invention, an elevating means for elevating and lowering the spindles constituting the disc holding means and a disc playing means is configured so that a single part simultaneously performs these operations.Type: ApplicationFiled: February 23, 2001Publication date: June 28, 2001Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Masahiko Nakamura, Seizo Miyoshi, Yukio Morioka, Takeshi Ota
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Publication number: 20010005356Abstract: An optical pick-up feeding device for easily adjusting an optical axis of an optical pick-up device to be perpendicular with respect to a surface of an optical disc. The optical pick-up feeding device includes a feeding section to feed the optical pick-up device, a guiding section to guide the optical pick-up device while it is fed by the feeding section, and an adjusting section to adjust the guiding section so that the optical axis of the optical pick-up device is perpendicular with respect to the surface of the optical disc. The feeding section has a lead screw to feed the optical pick-up device and a stepping motor to rotate the lead screw. The guiding section has a pair of guide shafts, and is adjusted by adjusting holders engaged with each end of one of the guide shafts and one end of the other guide shaft.Type: ApplicationFiled: November 17, 1998Publication date: June 28, 2001Inventor: Hee-Deuk PARK
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Publication number: 20010005357Abstract: A hybrid optical recording disc having a substrate and a recording layer disposed over the substrate, the substrate having a read-only (ROM) area in which a groove is modulated by depressions in the substrate and a recordable area in which the groove from the read-only area extends into the substrate in the recordable area. The groove in the read-only area forming wobbling tracks having a depth greater than 170 nm and wherein the depth d2 of the depression in the groove in the read-only area is in a range greater than 170 nm and less than 350 nm.Type: ApplicationFiled: December 18, 2000Publication date: June 28, 2001Applicant: Eastman Kodak CompanyInventors: Bruce Ha, James A. Barnard, Thomas C. Burgo
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Publication number: 20010005358Abstract: A packet protection method allowing rapid restoration in case of fault occurrence without undesired reduction in efficiency on the use of network bandwidth is disclosed. In a packet protection network having a working route and a reserved route set therein, when a failure occurs, a router on the working route sends an incoming packet to be protected back to the ingress router. The ingress router forwards the packet to be protected to the reserved route so that the packet to be protected travels through the reserved route around the failure.Type: ApplicationFiled: December 21, 2000Publication date: June 28, 2001Inventor: Kenichi Shiozawa
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Publication number: 20010005359Abstract: The present invention relates to a method for congestion control when setting up calls in a cellular CDMA-based communication system. A call setup request from a user equipment in a congested cell is prohibited by means of broadcasted call admission messages. However, the call admission information indicates permitted and/or restricted accesses for carrier frequencies and/or neighbored cells. Neighbored cells using the same carrier frequency as the congested cell are marked with a restricted access flag. Therefore, the user equipments in the congested cell will request for a call setup only in one of those neighbor cells without access restrictions. By this means, the user equipments will not contribute to the interference level in the congested cell.Type: ApplicationFiled: December 8, 2000Publication date: June 28, 2001Inventor: Jens Bergqvist
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Publication number: 20010005360Abstract: A method for monitoring a network state includes the steps of assigning a destination and a monitor period to a module for monitoring a state of a network installed in a source area; generating a specific packet for measuring a bandwidth and a degree of congestion of the network; transmitting the specific packet through a network layer to a designated destination; returning the packet received by the destination to the source area; analyzing a message transmitted from the destination and measuring a bandwidth and a degree of congestion of the network; and repeatedly performing the step of generating the packet and the following steps in every assigned monitor period during a predetermined time, thereby recognizing a network state.Type: ApplicationFiled: December 22, 2000Publication date: June 28, 2001Inventors: Kyoung-Woo Lee, Sang-Hyup Lee
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Publication number: 20010005361Abstract: A method of synchronising nodes of a telecommunication network in which a master node is coupled to a Primary Reference Clock (PRC) and a plurality of slave nodes are each arranged to synchronise their internal clock to the PRC using data received on incoming data link. The method comprises propagating Synchronisation Status Messages through the network from the master node, with each node through which a messages pass incorporating into the message its own identity, thereby generating in each message a node path which has been followed by the message. For each incoming link of each node, the path or path length of a Synchronisation Status Message received on that link is registered as an attribute for that link.Type: ApplicationFiled: December 14, 2000Publication date: June 28, 2001Inventor: Mikko Antero Lipsanen
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Publication number: 20010005362Abstract: A device operative in a digital communication system and adapted to receive digital signals and transmit them along a transmission path, characterized in that this device is capable of preventing the transmission of a message comprising a pre-defined sequence of signals that is indicative of a malfunction occurred at the transmission path.Type: ApplicationFiled: December 13, 2000Publication date: June 28, 2001Inventor: Haim Guata
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Publication number: 20010005363Abstract: The present invention relates to an AV apparatus having a plurality of connection terminals to which a plurality of apparatuses can be selectively connected and designed to control the apparatuses connected to the connection terminals. In the AV apparatus, identifiers are allocated to the connection terminals, respectively, each for designating a specific one of the apparatuses so that the apparatuses connected to the connection terminals are controlled in a priority order.Type: ApplicationFiled: December 22, 2000Publication date: June 28, 2001Inventor: Teruo Tajima
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Publication number: 20010005364Abstract: A method for synchronizing data between a mobile terminal and a computer is provided, in which schedule data can be synchronized between the mobile terminal and the computer using a radio network and Internet network. In this method, either a mobile terminal or a computer corresponding to a party for requesting data to synchronize transmits its head data to other party for synchronizing data through an Over-The-Air Function (OTAF) system. The party for synchronizing data compares the transmitted head data of the party requesting data to synchronize with its head data, and transmits its newest data and corresponding head data of the party for requesting data to synchronize to the party for requesting data to synchronize in accordance with the comparison result. The party for requesting data to synchronize stores the newest data from the party for requesting data, and transmits its newest data to the party for synchronizing data through the OTAF system.Type: ApplicationFiled: December 21, 2000Publication date: June 28, 2001Applicant: LG Electronics Inc.Inventor: Jung Sik Kang
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Publication number: 20010005365Abstract: A method of improving sound playback of digitized speech signals transmitted to a telecommunications terminal at the beginning of a telephone call set up over a communications network where the signals are transmitted in the form of packets, and in particular at the beginning of a VOIP call set up under Internet protocol, at the time said call is set up from a sending telecommunications terminal fitted with voice activity detection means so as to be capable of transmitting only those digitized signal packets that contain speech taken from a set of sound signals that are suitable for being transmitted in the form of packets after the sound has been digitized and encoded in the sending terminal. Signal packets are transmitted from the digitizing and encoding means during an initial call optimization stage without taking account of whether or not any speech signals are present. The invention also provides telecommunications hardware implementing the method.Type: ApplicationFiled: December 19, 2000Publication date: June 28, 2001Inventors: Luc Attimont, Jannick Bodin
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Publication number: 20010005366Abstract: The invention relates to a telephone controller that controls plural telephone sets via LAN connected to the Internet and the telephone controller is composed of a receiver that receives a message sent by a telephone set for requesting an IP address, a control circuit that generates the ID and the extension of the telephone set in case the message for requesting the IP address is received, an IP address allocation circuit that allocates the IP address of the telephone set, a memory that stores the ID, the extension and the IP address and a notifying unit that notifies the telephone set of the ID, the extension and the IP address.Type: ApplicationFiled: December 26, 2000Publication date: June 28, 2001Inventor: Yoshikazu Kobayashi
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Publication number: 20010005367Abstract: An ADSL physical transmission layer retrieves data to be transmitted from either a transmit data buffer, or a dummy cell buffer in the case when no actual data is being transmitted to maintain a continuous data stream in an ADSL data link. The ADSL physical transmission layer and an associated ATM protocol layer are implemented as an interrupt service routine and delayed procedure call respectively in an ADSL software modem application. Because the ATM protocol layer does not fill the transmit data buffer with dummy cell data, it is simpler and faster. Moreover, latency is minimized, and overall system throughput enhanced since the maximum latency is independent of any operating system latency, and is no greater than the size of the cell stored in the dummy cell buffer.Type: ApplicationFiled: February 20, 2001Publication date: June 28, 2001Inventors: Young Way Liu, Chin-I Huang, Ta-Yung Lee, Wen-Ching Andy Chou, Dean C. Wang, Ming-Kang Liu
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Publication number: 20010005368Abstract: In the distribution of broadcast messages in a communication system comprising one or more networks redundant distribution is reduced. Each network consists of two or more nodes interconnected by point-to-point links. When a broadcast message is received at a node, the node decides whether to send or not to send the broadcast message to other nodes In the case where it decides not to send the broadcast message, the node avoids redundant distribution of the broadcast message by sending a cancellation of broadcast message to other nodes in the system. The message includes the broadcast message to be cancelled. The cancellation of broadcast message is then handled at nodes receiving the cancellation of broadcast message in special ways. The communication system can e.g. comprises two or more networks, and then some of the nodes are forwarding nodes, which tie the networks together and which are able to forward messages from one of the networks to another one.Type: ApplicationFiled: December 6, 2000Publication date: June 28, 2001Inventor: Johan Rune
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Publication number: 20010005369Abstract: A method of operating a switch for frames in a computer network uses one or more indicia of frame type designation found in the received frame to derive a virtual local area network (derived VLAN) value. Also, an indicia of the receiving port may be used in constructing the derived VLAN value. The switch then uses the derived VLAN value in making forwarding decisions. Broadcast domains in the computer network may then be controlled by forwarding in response to the derived VLAN value.Type: ApplicationFiled: January 5, 2001Publication date: June 28, 2001Inventor: Raymond Kloth